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Table 1.1 - The Worldwide Electronics Market ($1,013 Billion) in 1992 [1] Category Share (%) Data processing hardware 23 Data processing software & services 18 Professional electronics 10 Telecommunications 9 Consumer electronics 9 Active components 9 Passive components 7 Computer integrated manufacturing 5 Instrumentation 5 Office electronics 3 Medical electronics 2 M I C R O E L E C T R O N I CIRCUIT DESIGN ©RICHARD C. JAEGER 6/5/97 Table 1.2 - Milestones in Electronics Year Event 1884 American Institute of Electrical Engineers (AIEE) formed 1895 Marconi first radio transmissions 1904 Fleming Valve (Diode Vacuum Tube) 1906 Pickard - Solid-state Point-contact diode (Silicon) 1906 Deforest - Triode Vacuum Tube (Audion) - Age of electronics begins 1910-1911 "Reliable" tubes fabricated 1912 Institute of Radio Engineers (IRE) Founded 1907-1927 Diodes and Triodes - First Radio Circuits 1920 Armstrong invents super heterodyne receiver 1925 TV demonstrated 1925 Lilienfeld files patent application on the field-effect device M I C R O E L E C T R O N I CIRCUIT DESIGN ©RICHARD C. JAEGER 6/5/97 1927-1936 Multigrid Tubes 1933 Armstrong invents FM modulation 1935 Heil receives British patent on a field-effect device 1940 Radar developed during World War II; TV in limited use 1947 Bipolar Transistors Invented by Bardeen, Brattain & Shockley at Bell Laboratories 1950 Color TV begins 1952 Shockley describes the unipolar field-effect transistor M I C R O E L E C T 1952 Commercial production of silicon bipolar transistors at Texas Instruments R O 1956 Bardeen, Brattain & Shockley Receive Nobel Prize for Invention of Bipolar Transistors N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M 1958 Simultaneous Development of the Integrated Circuit by Kilby at Texas Instruments & Noyce and Moore at I Fairchild Semiconductor C 1961 First commercial digital IC available from Fairchild R Semiconductor O 1963 AIEE and IRE Merge to become the Institute of E Electrical and Electronic Engineers (IEEE) Your L Professional Society! E 1967 First Semiconductor RAM (64 bits) discussed at the C IEEE International Solid-Sate Circuits Conference T (ISSCC) R 1968 Introduction of the first commercial IC operational O amplifier - the A-709 - by Fairchild Semiconductor N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN 1970 1-transistor dynamic memory cell invented by Dennard M at IBM 1971Introduction of the 4004 microprocessor I by Intel C 1972 First 8-bit Microprocessor - The Intel 8008 R 1974 First commercial 1 kilobit memory chip O 1974 Introduction of the 8080 microprocessor E 1978 First 16-bit Microprocessor L 1984 Megabit Memory chip E 1995 Experimental Gb Memory Chip Presented at the IEEE C ISSCC T R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN 10 10 Chip Density (Bits/Chip) M 10 9 I 10 8 C R 10 7 O 6 10 E 10 5 L 10 4 E C 10 3 T 10 2 1965 1970 1975 1980 1985 1990 1995 2000 R Year O F igu re 1.2 - Mem ory ch ip den s it y a s a fu n ct ion of t im e ba s ed u pon firs t N pa per pres en t a t ion a t t h e IE E E In t ern a t ion a l S olid-S t a t e Circu it s Con feren ce (IS S CC) I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN 10 7 Number of Transistors M P6 Pentium I 486DX 68040 C 10 6 R 386SX 68030 O 80286 5 10 E L 8086 E 10 4 8085 C 6800 8080 T 4004 3 10 R 1970 1975 1980 1985 1990 1995 2000 O Year N Figure 1.3 - Microprocessor complexity versus time I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN 10 1 Dynamic Memory Feature Size (um) M I C R O 10 0 E L E C T 10 -1 1970 1975 1980 1985 1990 1995 2000 R Year O F igu re 1.4 F ea t u re s ize in dyn a m ic m em ory ch ips vers u s t im e (Cou rt es y N IS S CC) I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN Table 1.3 - Levels of Integration M Date Historical Reference Components/chip I 1950 Discrete components 1-2 C 1960 SSI - Small-scale Integration < 102 R 1966 MSI - Medium-scale integration 102 - 103 O 1969 LSI - Large-scale integration 103 - 104 E 1975 VLSI - Very-large-scale integration 104 - 109 L 1990 ULSI - Ultra-large-scale integration > 109 E C T R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M I Amplitude C High R "1" Level O E L Low "0" E Level t C Figure 1.5 - A time varying binary digital signal T R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M I v(t) or i(t) C R O E L E t C T Figure 1.6 - An analog signal R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M I + C Digital-to-Analog VFS R VO Converter O (DAC) E L E C ( b 1, b2 , b3 , ...nb ) T Binary Input Data R Figure 1.7 - Block diagram representation for a D/A converter O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M I C + R Analog-to-Digital ( b 1, b2 , b3 , ...nb ) v X Converter O Binary Output Data (ADC) E L E + VFS C Figure 1.8 - Block diagram representation for a A/D converter T R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN Quantization Error (LSB) Binary Output Code 1.5 M I 111 C 110 0.5 R 101 O 100 E 011 -0.5 L 010 1 LSB 1 LSB E 001 C 000 -1.5 V V V V VFS 3VFS VFS 3V 0 0 FS FS FS FS FS T 4 2 2 4 4 4 Input Voltage Input Voltage R O 1.9 - (a) Input-output relationship and (b) quantization error for 3-bit ADC N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M + g m v1 i1 i 1 I v1 C R (a) VCCS (b) CCCS O E + L A v1 i1 i 1 v1 E C (c) VCVS (d) CCVS T F igu r e 1 .1 0 - Co n t r olled S o u r ces R (a ) Vo lt a ge- co n t r olled cu r r en t s ou r ce - (VCC S ) (b )Cu r r en t - co n t r olled cu r r en t s o u r ce - (CCC S ) O (c) Volt a ge- co n t r o lled vo lt a ge s o u r ce - (VC VS ) N (d) C u r r en t - co n t r olled volt a ge s o u r ce - (CC VS ). I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M I C R O E v S L E 10 V C T Fi gur e 1 .1 1 R O N I CIRCUIT DESIGN v + R 1 8 k 1 + R iS 2 v2 2 k - - A r e s i s t i ve vol t a ge di vi de r ©RICHARD C. JAEGER 6/5/97 M I i1 C i2 + R R R iS O 1 2 vs E 5 mA 3 k 2 k L E C F igure 1.12 - Current division in a simple network T R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN R 1 i1 M + 20 k R I S vO i 1 vS C 1 k R = 50 O E (a) L R TH E C v TH iN R TH T R (b) O (c) F igu r e 1 . 1 3 - (a ) Two-t er m in a l cir cu it a n d it s N (b ) Th éven in a n d (c) Nor t on equ iva len t s I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M I R 1 C i1 iX R 20 k O E (v = 0) R vX S S 1 k i L 1 E C = 50 T R F igu r e 1 .1 4 - A t es t s ou r ce vx is a p p lied t o t h e O n et wor k t o fin d R TH . N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M R 1 I C i1 20 k R O vS E L E C T R Figu re 1.15 - Circu it O N I CIRCUIT DESIGN 0 i 1 R S 1 k iN = 50 for det erm in in g sh ort -circu it ou t pu t cu rren t ©RICHARD C. JAEGER 6/5/97 M I C R = 282 TH R R = 282 i v TH O N TH E L -3 v TH = 0.718 v s i N = (2.55 x 10 S) v s E (a) (b) C Figure 1.16 - Completed Thévenin (a) and Norton (b) equivalent circuits for the twoT terminal network in Fig. 1.13 (a) R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M + iS gmv1 R I 1 v C 1 3 k 0.1 v R 1 O v S i2 E R L 2 E 2 k C T Figure 1.17 - Circuit containing a voltage-controlled current source R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M Amplitude I C R O E L E f C 0 4.5 MHz T Figure 1.18 - Spectrum of a television signal R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN Table 1.3 - Frequencies Associated with Common Signals M I Category Frequency Range C Audible sounds 20 Hz - 20 kHz Baseband video (TV) signal 0 - 4.5 MHz R AM radio broadcasting 540 - 1600 kHz O High frequency radio communications 1.6 - 54 MHz E VHF television (Channels 2-6) 54 - 88 MHz FM radio broadcasting 88 - 108 MHz L VHF television (Channels 7-13) 174 - 216 MHz E UHF television (channels 14 - 69) 470 - 806 MHz C Cellular telephones 824 - 892 MHz Satellite television 3.7 - 4.2 GHz T R O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M I C Amplitude Amplitude R O E VDC Vo L f E t 0 0 fo 2f o 3f o 4f o 5f o 2T 3T T C T (a ) (b) R Figu re 1.19 - A periodic s ign a l (a ) a n d it s a m plit u de s pect ru m (b) O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN M I C vs A R O E L Figu re 1.20 - E lect ron ic sym bol for a n E C T R O N I CIRCUIT DESIGN v o a m plifier wit h volt a ge ga in A ©RICHARD C. JAEGER 6/5/97 M I Antenna C R RF IF Audio FM Mixer O Amplifier Amplifier Amplifier Detector and F ilter and F ilter E (88 - 108 MHz) 10.7 M Hz 50 Hz - 15 kHz L Local E Oscillator C S peaker (77.3 - 97.3 MHz) T R Figure 1.21 - Block diagram for an FM radio Receiver O N I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN Amplitude A A A M I f f f C fL fH fH fL (c) (b) R (a) O Amplitude E L A A E C f f T fH fL R (e) (d) O F igu re 1.22 - Idea l a m plifier frequ en cy res pon s es : (a ) Low-pa s s (b) h igh pa s s (c) ba n d-pa s s (d) ba n d-reject a n d (e) a ll-pa s s N ch a ra ct eris t ics I ©RICHARD C. JAEGER 6/5/97 CIRCUIT DESIGN