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Transcript
CHAPTER 4 SERIES RESISTANCE, CHANNEL LENGTH AND WIDTH, AND THRESHOLD VOLTAGE 4.1 INTRODUCTION • Semiconductor devices is degraded by series resistance. • Series resistance depends on semiconductor resistivity, contact resistance, and the geometrical factors. 4.2 PN JUNCTION DIODES Current-Voltage Equivalent circuit of a diode. Log(Ι) versus V for a diode with series resistance. The upper dashed line is for rs=0 Open-Circuit Voltage Decay Open-circuit voltage decay of a pn junction showing the voltage discontinuity at t=0 Capacitance-Voltage 1. f low, such that 2πfrsC<<1, to obtain C 2. f high, such that 2πfrsC>>1, calculate rs from the data of Cm vs. f. 3. This method is used when DC method is unavailable, such as in MOS capacitor. 4.3 SCHOTTKY BARRIER DIODES Series Resistance The method of extracting rs for pn diode can also be used for Schottky diode. Norde function F is defined as: It can also be written as: For low voltage Irs<<V, dF/dV≒1/2-1=-1/2 For high voltage Irs ≒ V, dF/dV≒-1/2+1=1/2 Therefore, there exists a Fmin. From Fmin. to determine Vmin. and then find out Imin.. Another method is define H as: Plot H vs. I, the slope is rs and the intercept is nψB. A modified Norde function is defined as: Plot F1 vs. V for different Temp., each curve has a F1min , which has a corresponding Vmin and Imin. Plot the left side of the above equation vs. q/kT, then n and A* can be extracted from the slope and the intercept, respectively. 4.4 SOLAR CELLS SOLAR CELLS Equivalent circuit of a solar cell. Multiple Light Intensities Current-voltage characteristic of a solar cell. Series resistance determination of a solar cell. For Idk=Iph=Isc Constant Light Intensity This method (area method) is suitable for concentrator cells with high Iph, it overestimates rs at 1-sun. Constant Light Intensity For high intensity flash illumination method, neglecting rsh, I≒Voc/(RL+rs). By varying the load resistance RL at constant light intensity, we have RL should be on the order of rs. Shunt Resistance Rewrite the above equation as For rs<<rsh and Iscrs<<nkT/q, rs≒0.1Ω, Isc≦3mA it becomes At very low light intensities, the second term is neglected, then 4.5 BIPOLAR JUNCTION TRANSISTORS BIPOLAR JUNCTION TRANSISTORS An npn bipolar junction transistor and its parasitic resistances. The base resistance is composed of intrinsic and extrinsic resistance. Gummel plots showing the effects of emitter-base space -charge region recombination (n≈2), quasineutral region recombination (n≈1), and series resistance. Emitter Resistance RE≒1Ω for discrete BJT and around 5~100Ω for IC transistors. Emitter resistance measurement setup and IB -VCE plot. Emitter Resistance Another method is to supply current from B1 only, and no current flow through B2. Then VBE2=VBEeff+IERE. RE=(VBE2-VBEeff )/IE Where I B1 IC0 (exp( qVBEeff nkT )1) Collector Resistance Common emitter output characteristics. The two lines show the limiting values of RC . Base Resistance Plot ΔVBE/IB vs β has a slope of RE and an intercept on the ΔVBE/IB axis of RB+RE. But it is difficult to change β of a transistor without changing other parameters. Base Resistance Rewrite the equation of IB in the following form Measured device characteristics for a self-aligned, high-speed digital BJT. The βmust be varied in this measurements, and RBi/β must be a constant. Base Resistance The intrinsic base resistance for rectangular emitter with 1 contact is: RBi=RshiW/3L. The intrinsic base resistance for rectangular emitter with 2 contact is: RBi=RshiW/12L. Square emitter with contact on all sides: RBi=Rshi/32. (W=L) Circular emitter with contact all around: RBi=Rshi/8π. Equivalent emitter-base portion of the “two-base contact” BJT. Measured base resistance versus emitter window width as a function of base-emitter voltage. d is the deviation between emitter window and the effective base width. Rshi is a function of VBE due to base conductivity modulation. Frequency Measurements on RB The input impedance circle method measures the Zin as a function of frequency. The real axis intersections give: 4.6 MOSFETs Series Resistance and Channel Length— I-V ξ=0.37, 0.58, 0.75, 0.9; xch: channel thickness (a)A MOSFET with source and drain resistances, (b) device cross section showing the actual gate length L and Leff =L-∆L with ∆L=2δL. The substrate resistance is not shown. ID k (VGS VT )VDS 1 k (VGS VT ) RDS Method 1 Rm versus L as a function of gate voltage. • Short channel devices have a channel length dependent threshold voltage. • VG↗, Leff ↗, RSD↘. • Keep VG at a fixed value, change VT by changing VSB. Method 2 Plot E vs. (VGS-VT) as a function of L (a) E versus (VGS –VT )as a function of gate length. These lines have intercept Ei and slope m; (b) Ei and m versus gate length. Ei=0 when L=ΔL, and m=RSD when L=ΔL. The slopes give μo and θ. Method 3 (a)Rm versus 1/(VGS -VT), the slope is m=(L-ΔL)/WeffμoCox; Rmi=RSD+θm (b) slope m versus L, the slope is 1/WeffμoCox, (c) Rmi versus m. Method 4 ID k o (VGS VT )VDS 1 k o R(VGS VT ) Plot I D / gm vs. VGS the intercept gives VT and the slope gives ko. R R SD kO Plot 1/ ko vs. L, the intercept gives ΔL. R’ is obtained from ID= ko(VGS-VT)(VDS-IDR’) Plot R’ vs. 1/ ko, the intercept gives RSD and the slope gives θ. Method 5 For Vds1>>ID1RSD and Vds2>>ID2RSD Plot ID1/ID2 vs. (ID1-ID2), the slope is k1RSD/k2VDS, the intercept is k1/k2. If the assumption is not valid, then plot (VDS2/ID2-VDS1/ID1) vs. (VDS1/ID1), the intercept is RSD, the slope is (L2-L1)/(L1-ΔL) which gives ΔL. Method 6 gm and gd are measured at linear region for VDS= 25~50mV. Define r as A long channel device with Lref and a short channel device with L are required. Define Δλ as Plot Δλ vs. (VGS-VT), the intercept is ΔL, and Method 7 This shift and ratio method needs one large (Lo) and several constant width varying length (L) small devices. Redefine Rm as: Neglect the effect of dRDS/dVGS Plot S vs. VGS for the large and one small devices to obtain L and VT. Shift the curve by δ and calculate r(VGS)=S(VGS)/S(VGS- δ). When δ=VT1-VT2 r is almost a constant, and the mobility will be identical, which yields : The conventional I-V methods reach their limit when Leff≒0.1μm, because Rch is no longer a linear function of Leff due to short channel effects. Drain Induced Barrier lowering (DIBL) Channel Length--C-V CGC –VGS curse; W=10μm, tox =10nm, NA =1.6×1017 cm-3 . In order to determine the channel width, devices with constant length and varying width are used. The drain conductance is given by: Does a plot of gd vs. W gives ΔW? RS and RD varies with W!! The drain current can be written by: Plot ID vs. W gives ΔW for ID=0. The measured drain resistance is: From which ΔW can be obtained. Differentiating the above equation and define Plotting m vs. W gives ΔW. We may also use the oxide capacitance of constant length and varying width transistors to determine ΔW. 4.7 MESFETs AND MODFETs MESFETs AND MODFETs Method 1 Cross section of a MODFET showing the various resistances. RG is the resistance of the wide band gap semiconductor. Method 2 Define then the drain acts as a voltage probe. If ID=0, α≒0.5. For IG<<ID, Method 3 Devices with various channel lengths are used, and operated in linear region. I-V measurements are made with one of the electrodes floating. When the gate is floating, the resistances are: With source floating, Define where LG is the channel length, R and G are the resistance and conductance per unit length then Plot of RGS (fg), RGD (fg), RSD (fg) versus 1/ RGS (fg). Reprinted after Azzam et al.(Ref.92) by permission of IEEE. 4.8 THRESHOLD VOLTAGE THRESHOLD VOLTAGE ID -VGS curve of a MOSFET near the threshold voltage. Modeled using Leff 1.5μm, tox =25nm, VT,start =0.7V, VD =0.1V. W I D k (VGS VT 0.5VDS )VDS L Threshold voltage determination by the linear extrapolation technique. VDS =0.1V, tox =5.6nm, W/L=20μm/20μm. Plot (ID, sat)1/2 vs. VGS Plot gd/(gm)1/2 vs. VGS I D ,sat mW eff C OX L ( VGS VT ) 2 m is a function of doping density Threshold voltage determination by the saturation extrapolation technique; tox=5.6nm, W/L=20μm/20μm. I D WC OX ( VGS VT )v sat Threshold voltage determination by the threshold drain current technique. (a) Measurement circuit, (b) experimental data; tox=5.6nm, W/L=20μm/20μm, VBS=0. Data courtesy of Y. B. Park, Arizona State University; MOSFET courtesy of J. Sanchez, Intel Corporation. Threshold voltage determination by the subthreshold technique; tox=5.6nm, W/L=20μm/20μm.Data courtesy of Y. B. Park, Drain Current Ratio PSEUDO MOSFET