Download Carry-Skip in Pass and DCVSL - Courses

Carry Skip 4-Bit Blocks in
Pass and DCVSL Logic
Michael Morgan
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
Mississippi State University
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
Carry Skip
•
Poor Man’s Acceleration Method
•
Try to speed up worst case – propagate
• Pass transistor implementation adds 25 transistors
• DCVSL implementation adds 40 transistors
• 0 + 1 happens with 50% probability
• The average length of the carry chain in a k-bit
addition is log2(1.25k)1
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
Carry Skip Block Diagram
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
Pass Transistors Overview
•
•
Advantages
Control
• Low power
• Good for Mux logic
• Easily sized
In
• Sizes decrease down a path
Disadvantages
• No drive strength
•
•
•
• Signals degrade due to channel resistance—must buffer
PMOS cannot pull down to Gnd
NMOS cannot pull up to Vdd
Good for Mux logic only
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
Out
DCVSL Overview
•
Differential Cascade Voltage Switch Logic
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
2
DCVSL Overview (continued)
•
Advantages
•
Disadvantages
• 2 PMOS per logic gate
• Dual rail
• Dual rail
• Sizing – incorrect sizing will cause functional failures
• Power dissipated through crowbar current
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
Pass/DCVSL Raw Data
Pass
DCVSL
Tphl (ns)
48.69
19.17
Tplh (ns)
154.19
10.18
Power Dissipated
(W)
1.05E-18
3.08E-17
Switched Cap (F)
1.68E-27
1.23E-26
Transistor Count
105
144
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
Results
•
DCVSL is faster
•
Pass transistors consume 29% less power
• 200% for Tplh
• 25% for Tphl
• Why? Pass transistors have no drive
• Why? No drive
• Also, DCVSL has crowbar current
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
Conclusions
•
•
•
Stick to CMOS!
Pass transistors may seem novel, but must
buffer
• I used full buffers
DCVSL must be sized correctly, or gates will not
even function!
• Also crowbar current can be power-hungry and slow
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory
References
•
•
[1] Dr. J. C. Harden “Basic Addition,” Slide 14,
http://www.ece.msstate.edu/classes/ece8053/pr
esentations/08f02-basadd.ppt.
[2] Dr. B. Reese “DCVSL”, Slide 1,
http://www.ece.msstate.edu/~reese/EE8273/lec
tures/dcvsl/dcvsl_files/frame.htm.
Department of Electrical and Computer Engineering
Microsystems Prototyping Laboratory