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Instrumentation for Scientists
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640251 - Geoff Taylor and Paul Main
Brief History
Bipolar and MOSFET transistors
Digital Logic Primer
Logic Levels, Gates, Truth Tables
Decimal, Hexadecimal, Binary Arithmetic
Electronic Schematic Symbols & Logic
Lectures 10-12
10 April 2008
(c) Paul Main
A Short History of Computers
• The Abacus “Computing Tray” The first
mechanical calculating machine. 28?
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(c) Paul Main
Computing Tray
• Used by Babylonian priests to keep track of
their vast storehouses of grain. Still in use
today. Circa 3000BC.
• In Roman times the board was given
grooves to facilitate moving the counters in
the proper files.
• Circa 1300BC Wire & Bead Abacus
replaced the Chinese calculating rods.
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(c) Paul Main
Computing Tray
• A modern equivalent is an Accumulator or
Register: used to accumulate results of
arithmetic sums.
• Uses electronic (voltage) representation of
binary numbers
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John Napier
• 1612 John Napier uses the printed decimal
point, devised logarithms and used
numbered sticks - Napiers Bones - for
calculating.
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New Improved Abacus
• 1642AD: Blaise Pascal Invented the first
mechanical calculator constructed of 10
toothed gears, wheels & teeth called
“Pascalene”.
• The same principle was in use in
automobile’s odometer mechanism
• Same principle is the basis for all
mechanical calculators.
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(c) Paul Main
Joseph Marie Jacquard
• 1801: A linked
sequence of punched
cards programmed
Jacquard’s loom to
produce intricate
weaving patterns in
cloth.
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(c) Paul Main
By Royal Commission
• 1823: The royal Astronomical Society of
Great Britain commissioned Charles
Babbage to produce a programmable
calculating machine. He was aided by
Augusta Ada Byron, the countess of
Lovelace. The machine was to produce
navigational tables for the Royal Navy.
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(c) Paul Main
Babage’s Analytical Engine
1834 Babbage shifted his focus to
work on The Analytical Engine.
The mechanical computer stored
1000 20-digit decimal numbers and
a variable program that could
modify the function of the machine
to perform various tasks.
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(c) Paul Main
Babbage IO devices
• Input to his engine was through punched
cards (similar to punched cards of the
1950s-80s).
• It is assumed that he obtained the idea from
Frenchman, Joseph Jaquard, who used
punched cards as input to a weaving
machine that he invented in 1801.
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(c) Paul Main
Dreams Faded
• After many years of work, Babage’s dream
faded when he realised that the machinists
of the day were unable to create the parts
needed to complete his work.
• The analytical engine required 50 000
precision machined parts to allow his
engine to function reliably.
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(c) Paul Main
Michael Faraday
• Son of a Blacksmith, had limited formal
education but attended public lectures and
became an avid reader
• 1813 Started working life at the London
Royal Institution as a laboratory assistant
• 1821 demonstrated the electric motor effect.
• 1831 demonstrated EMF(current) induced
by motion of magnet by a nearby conductor.
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(c) Paul Main
Electric Motors
• Electric Motors became available.
• Motor driven adding machines based on
mechanical calculators developed by Blaise
Pascal became popular.
• Electrically driven mechanical calculators
were common office equipment until 1970s.
• 1844 - Samuel Morse sent a telegraph from
Washington to Baltimore.
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(c) Paul Main
George Boole
• Publishes “Laws of Thought”, describing a
system for symbolic & logical reasoning
which becomes the basis for computer
design.
• 1858 A telegraph cable spans the Atlantic
Ocean & provides service for a few days.
• 1876 Alexander Graham Bell invents, and
patents, the telephone.
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(c) Paul Main
William Shockley
• 1939 William Shockley observed P- and Ntype regions in Silicon. Shockley forecast that
a semiconductor amplifier was possible.
• WWII interrupted further work.
• 1945: John von Neumann described the
general-purpose, stored program computer.
• 1948: The invention of the Germanium
bipolar junction transistor at Bell Labs, by
William Shockley, John Bardeen & Walter
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(c) Paul Main
Brittain
First Electronic Computer
• June 1943: Alan Turing, Tommy Flowers &
MHA Newman made operational the first
electronic computer, Colossus
• Colossus was utilised to break the cipher
codes generated by the mechanical Enigma
Machine; German military communication
was compromised.
• British cm wavelength radar assisted to
provide military superiority.
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(c) Paul Main
The first point contact transistor
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The first IC
• TI commercialised the Transistor.
• In 1958 Jack Kilby at TI realised that Resistors formed by cutting small bars of
silicon, Capacitors formed by wafers
metalised on both sides, and silicon
transistors could all be made on the same
material.
• In september 1958 he created a phase-shift
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2008
oscillator
- the first(c) Paul
ICMain
on one wafer.
Intel 4004
• Intel went ahead with a general purpose
logic chip capable of being programmed for
instructions.
• First use of ‘Intelligence’ programmed by
software. Bought the design back from
Busicom.
• After 9 months development Intel’s first
microprocessor is born, the 4004.
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4004
November 1971
10 Micron technology
2300 Transistors
108 KHz Clock
60 000 Instructions/second
Bus width 4 bits
640 bytes addressable
12 Volt. Weighed < 1 Oz.
P-channel MOSFET
Applications: busicom calc
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(c) Paul Main
8008
April 1972
10 Micron technology
3500 Transistors
200 KHz Clock
0.06 Million Instructions
Per Second (MIPS)
Bus width 8 bits
12 Volt
Address: 16 Kbytes
Apps: Terminals,
Calculators, Bottling
10Machines
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(c) Paul Main
8080
April 1974
6 Micron Technology
4 500 transistors
2 MHz Clock
0.64 MIPS
Bus width: 8 bits
12 Volt
Addressable memory: 64 Kbytes
Apps: Traffic light controller,
Altair computer (first PC)
Performance = 10 x 8008
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8085
• March 1976
Clock speed: 5 MHz
0.37 MIPS
Number of transistors: 6,500 (3 microns)
8 bit data bus, 16 bit address bus.
Typical use: Toledo scale. From measured
weight and price the scale computed cost.
Single 5 volt power supply
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(c) Paul Main
8086 (8088)
June 1978/1979
3 Micron Technology
5, 8 &10 MHz clock
0.33, 0.66 & 0.75 MIPS
29 000 Transistors
16/8 bit data bus
20 bit address bus (1MB)
5 Volt
apps: IBM PCs & Clones
performance = 10 x 8080
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Segmented architecture, CISC
IBMPC
• 1981 The open-architecture IBM PC is
launched based on the Intel 8086
• 1980 PCDOS sold to IBM
• 1980 Ada emerged
• 1980 dBaseII popular
• 1982 First Clone PC
• 1982 AutoCAD
• 1983 TCP/IP
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80186 (80188)
• 1982 Original NMOS 80186
• 1987 80C186 converted to CMOS - uses
1/4 power at twice clock rate
• Used in Controllers
• Still popular
• Segmented architecture
• Software Backward Compatible with 8086
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(c) Paul Main
80286
February 1982
6 MHz -12 MHz clock
0.9 - 2.66 MIPS
1.5 micron technology
134 000 Transistors
16 bit data bus
16MB Physical, 1GB
Virtual
Performance =3 to 6 x 8086
Software Backward
Compatible with 8086
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Also V.20, AMD Cyrix etc(c) Paul Main
80386
October 17, 1985
16 MHz - 33MHz
5 to 11 MIPS
1 Micron technology
275 000 Transistors
Data Bus width: 32 bits
Addressable memory: 4 gigabytes
Virtual memory: 64 terabytes
Software Compatible with 8086
32 bit “Flat Mode” available
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(c) Paul Main
80486DX
April 1989 25 MHz, 20 MIPS
June 1991 50 MHz, 41 MIPS
1.2 Million Transistors
1-0.8 Micron Technology
Bus width: 32 bits
Addressable memory: 4 GB
Virtual memory: 64 TB
50X performance of the 8086.
Software Compatible with 8086
486DX first CPU to include floating
point maths co-processor.
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80486DX2 & DX4 - Overdrive
2 or 3 times overclocked cpu core,
with standard memory transfer rate.
Plugged directly into a 486SX or
486DX socket and acted as a double
or triple-clocked CPU.
Eg a 33MHz cpu replaced with an
DX4 processor would use a memory
transfer rate of 33MHz, and an
internal clock rate of 99MHz.
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(c) Paul Main
Pentium
March 1993
60 MHz 100 MIPS
66 MHz 112 MIPS
3.1 million transistors
0.8 Micron technology
64 bit external data bus 32-bit
microprocessor
32 bit address bus
4 GB physical
64 TB virtual
Software Compatible with
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(c) Paul Main
8086. BiCMOS
Pentium Pro
November 1995
150-200 MHz
5.5 million transistors
0.35 micron technology
64 bits front side bus
64 bits to L2 cache
Addressable memory: 64
gigabytes
Virtual memory: 64 terabytes
256K - 1MB L2 Cache
Software Compatible with
10
April 2008
8086
(c) Paul Main
NPN transistor cross-section
• IN IC form an NPN Bipolar Transistor is fabricated using a series of
photolithographic and chemical processes.
• The base wafer is p-type silicon substrate around 0.25mm thick.
• Boron is diffused to create a p type dopant, Phosphorous for n type.
• The Yellow area is insulating SiO2. Orange – Aluminium conductors.
• n+ indicates area of high conductivity
& high phosphorous
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(c) Paul Main
concentration..
BIPOLAR JUNCTION TRANSISTOR
Schematic circuit symbols for NPN transistor
B Base
E Emitter
C Collector
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(c) Paul Main
Bipolar Junction Transistor
• Simple Circuit to illustrate BJT switching
for an NPN transistor
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MOSFET
• Metal Oxide Semiconductor Field Effect Transistor
• N Channel MOSFET schematic symbol:
• G Gate
• S Source
• D Drain
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N CHANNEL MOSFET
IN IC form an NMOS Transistor is fabricated using a simpler
series of photolithographic and chemical processes than the
BJT. The resulting transistor area is also smaller.
For an animation of device fabrication see:
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(c) Paul Main
http://jas.eng.buffalo.edu/education/fab/NMOS/nmos.html
MOSFET
• The voltage on the gate-source causes an electric field
across the Drain-Source channel
• Above a threshold voltage, Electrons are attracted into the
channel causing a increase in Drain-Source conductance.
• In digital circuits we are only interested in the switching
ability of transistors.
• A voltage Vgs > threshold voltage will switch the
MOSFET ON
– low drain-source resistance.
• Vgs < threshold will switvh the MOSFET OFF
– high drain-source resistance.
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(c) Paul Main
MOSFET electrical properties
•
•
•
•
N-MOS
Behavior is
Switch-like
Vds fixed.
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N-MOS test circuit
• N-MOS switching test circuit
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Voltage vs 5V TTL Logic Levels
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True = Logic “1” = High Voltage Level
False = Logic “0” = Low Voltage Level
TTL “High” or “1” is 2.0V to 5V
TTL “Low” or “0” is 0V to 0.8V.
– Indeterminate Logic Level Between 0.8 & 2.0V
– Actual Valid High & Low voltages vary
depending on the logic family & power supply
voltage
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Inverter
• Buffer - Logic state is Maintained
• Inverter - Logic state is Inverted - NOT
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(c) Paul Main
Inverter
• Complementary MOS (CMOS) Inverter
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(c) Paul Main
2-Input AND Logic Symbol
Truth Table for : 2-Input AND Gate
Output will be 1, only if all inputs are 1
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(c) Paul Main
3-Input AND Logic Symbols
Truth Table for : 3-Input AND Gate
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(c) Paul Main
AND Gate Equivalents
• AND Gates
can be
constructed
using OR
Gates &
Inverters
• DeMorgans
Theorum
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(c) Paul Main
NAND GATE
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2-Input OR Logic Symbol
• OR - True of any input is True – 2-Input OR Gate Truth Table
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3-Input 0R Logic Symbol
• 3-Input OR Gate
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(c) Paul Main
Inverter Equivalents
• Inverters
may be
constructed
from NAND
gates or
NOR gates
with the
inputs tied
together
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(c) Paul Main
OR Gate Equivalents
• OR Gates
can be
constructed
using AND
Gates &
Inverters
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(c) Paul Main
XOR Logic Symbol
• Exclusive OR - True if one input is True
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(c) Paul Main
XOR Gate
• XOR Gates
can be
constructed
using AND
gates, OR
gates &
Inverters
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Logical Notation
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•
•
•
AND
OR
NOT
XOR
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A AND B = A  B = A & B
A OR B = A + B = A | B
NOT A = A
= A#
A XOR B = A  B = A ^ B
(c) Paul Main
Fundamental Data Types
Computers work in the binary number system.
The basic unit is the bit ("BInary digIT")
A bit can be either 1 or 0
The other basic units are:
Nybble
4 bits 0000 - 1111 (Binary), 0 - F (Hex)
Byte
8 bits 0000 0000 - 1111 1111 (Binary),
00 - FF (Hex)
Word
16 bits 0000 - FFFF (Hex)
Longword
32 bits 0000 0000 - FFFF FFFF (Hex)
Doubleword 64 bits 0000 0000 0000 0000 10 April 2008
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FFFF
FFFF FFFF FFFF (Hex)
Hexadecimal, Binary & Octal
Decimal
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0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Binary
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Hexadecimal
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
(c)FPaul Main
Octal
0
1
2
3
4
5
6
7
10
11
12
13
14
15
16
17
Signed Number Representation
Hex numbers may be signed or unsigned.
Unsigned numbers are positive only.
For 8 bits, they range from 0 .. 255 (0..FF hex)
Signed numbers are positive, negative or zero.
The most significant bit is used to represent the sign of
a number
For 8 bits, they range from -128 ..127 (80..7F hex)
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Negative Number representation
Byte numeric representation (8 bits = 1 byte)
Signed Unsigned
+127 127
-128 128
-4
252
-3
253
-2
254
-1
255
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Binary
0111 1111
1000 0000
1111 1100
1111 1101
1111 1110
1111 1111
(c) Paul Main
Hexadecimal Octal
7F
177
80
200
FC
374
FD
375
FE
376
FF
377
Hex & Binary Notation
Hexadecimal numbers often have either
a dollar sign '$‘ prefix or
a ’0x' prefix as in “C”
or a ‘H’ suffix (as in MASM/TASM)
to indicate the number base is 16.
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Binary Addition
0 + 0 = 0,
0 + 1 = 1,
1 + 0 = 1,
1 + 1 = 0, Carry 1
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Binary Addition
(1)
• Say for example we want to add two
numbers, 5 and 8 . Too easy!
• If we first convert these to binary we get
101 and 1000 .
• Adding these together we get 1101 .
• Converting back to decimal
• 1101 =23 + 22 + 0 + 20=8 + 4 + 0 + 1=13
• Simple - We knew(c)that
one!
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Paul Main
(dec)
(bin)
(dec)
(bin)
(bin)
(bin)
(dec)
Binary Addition
(2)
• Say for example we want to add two
numbers, 7 and 9 .
• If we first convert these to binary we get
111 and 1001 .
• Adding these together we get 10000 .
• Converting back to decimal
• 10000 = 24 = 16
• Hmm! So many ones
and zeroes!
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(c) Paul Main
(dec)
(bin)
(dec)
(bin)
(bin)
(bin)
(dec)
Hexadecimal
• In Hexadecimal (Hex for short) we use the
numbers 0..9 and A..F to represent groups
of 4 bits.
• A group of four bits is called a nibble, and a
group of 8 bits is called a byte.
• So any byte can be represented in 2 nibbles,
or two hex digits.
• For example 11111110 = 254(dec) = FE (hex)
(binary)
• April
Now2008
that’s easier to remember - FE FI FO(c)
FUM!
10
Paul And
Maintakes less letters than decimal!
•
What interesting words can you make just using four hex digits?
Claude Shannon
• Interests: Model Planes, Radio Controlled boats,
local telegraph, juggling, unicycling, and chess…
• Studied Boole’s work on Boolean Algebra
• Graduated with degrees in Electrical
Engineering and Mathematics.
• Utilised and extended boolean algebra to
operate on relays
• AND Invented the base 2 adder!
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(c) Paul Main
• He also contributed to cryptography theory!
Full Adder
• Full Adder Truth Table
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Who invented the base 2 adder?
(c) Paul Main
(1)
Full Adder
(2)
• A Full Adder adds two bits, A0 & B0, plus
the Carry-In as shown creating a Bit 0 Sum
and Carry Out.
Carry Out
Bit 0 Sum
Carry
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In
(c) Paul Main
8 Bit Adder
• 8 Full adders can be cascaded
to form an 8-bit ADDer
• The AVR assembly language
instructions “ADD” and
“ADC” configures the ALU to
use the logic shown.
• Carry in is set to 0 for ADD.
• Carry in is set to CF for ADC.
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One's complement
Invert bits - The NOT operation is performed
invert 1101 0101
->
0010 1010
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Two's complement
Take one's complement of a number and add 1
convert from positive to negative number
convert from negative to positive number
Example:
Negate
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1101 0101
->
0010 1010 + 0000 0001
=
0010 1011
(c) Paul Main
Two's complement
1) Start with
One's complement
Add 1
0000 0011
1111 1100
1111 1101
2) Start with
One's complement
Add 1
0000 0000
1111 1111
0000 0000
10 April 2008
(c) Paul Main
Equivalent Circuits
• To make a TTL inverter requires a single
NPN transistor, diode and 2 resistors.
• To make a simple Diode-Nor gate requires a
single transistor, 2 diodes and 3 resistors.
• It is possible to create AND gates using
NOR gates and Inverters. (deMorgans
theorum)
• Example Inverting the inputs to a NAND gate -> OR gate.
• Work Example - OR, AND, MUX, Latch
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(c) Paul Main
Terminology - Edge transitions
• Logic “1” -> Logic “0” = Falling Edge
• Logic “0” -> Logic “1” = Rising Edge
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(c) Paul Main
Memory Elements: 1 Bit Latch
• Latches can be created using NAND Gates
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(c) Paul Main
Registers
• A register can be created
using an array of latches
with their gates
connected together..
• The lower nibble of R01
R01.0..R01.3 can be
created using the latches
as shown here.
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(c) Paul Main
AVR Core Architecture
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(c) Paul Main
AVR Register Set
(1)
• The AVR contains 32 General Purpose
working registers - “Accumulators”
• The ALU supports 8 & 16 bit operations.
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(c) Paul Main
AVR Register Set
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(c) Paul Main
(2)
AVR Register Set
(3)
• The AVR contains 32 General Purpose
working registers.
• Most instructions have full access to all the
registers for 8 or 16 bit operations.
• The X, Y and Z registers have a special
function. They can be set to index anywhere
in memory, including any register as they
are also mapped into memory.
• I.e. X, Y and Z they can be used as pointers.
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(c) Paul Main
AVR Register Set
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(c) Paul Main
(4)
The status register
• In computer code we may wish to test if variables A
and B are equal.
• IF A=B, this means A – B = 0.
• So the compiler creates code to load registers with
the values of variables A and B, perform subtraction.
• If the result is Zero the “Zero flag” is set.
• Most computers can branch based on a “Zero flag”.
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(c) Paul Main
Status Register
Example “C” Code
If (A == B)
{ // A EQUALS B
i++;
}
else
{ // A NOT EQUAL B
}
Assume variables A, B and i
are of type char (1 byte).
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Equivalent Assembly Code
LD R0, A
; A -> R0
LD R1, B
; B -> R1
SUB R0, R1
; SUBTRACT B-A
BNEQ ABNEQUAL ; SKIP if not eq.
LD R0, I
INC R0
ST R0, I
ABNEQUAL:
(c) Paul Main
; i++;
Condition Codes Register: ZERO FLAG
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(c) Paul Main
AVR Status Register
•
•
•
Bit#7 - Interrupt - Cleared on interrupt
6 - T - biT for Bit Load & Store instructions
5 - H - Half Carry
• 4 - S - Sign
• 3 - V - oVerflow
• 2 - N - Negative
• 1 - Z - Zero
• 0 - C - Carry
10 April 2008
•
From Pages 9 & 10 of ATMEGA128 manual
(c) Paul Main
Multiplexor - Data Selector
• Multiplex (MUX) many inputs to one output
• Switch selects the one signal source from
many input signals.
• Like Stereo HiFi source selection switch
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(c) Paul Main
Two Input Multiplexor
Two Input Mux
Truth Table
Select Output
0 Input 0
1 Input 1
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Output = (Input0 & Select#)
| (Input1 & Select)
(c) Paul Main
Four Input Multiplexor
4 Input Multiplexor
Truth Table
Select Line:
1
0 Output
0
0 Input 0
0
1 Input 1
1
0 Input 2
1
1 Input 3
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(c) Paul Main
Eight Input Multiplexor
Eight Input Multiplexor
Truth Table
Select Line: Output
2
1
0
0
0
0 Input 0
0
0
1 Input 1
0
1
0 Input 2
0
1
1 Input 3
1
0
0 Input 4
1
0
1 Input 5
1
1
0 Input 6
1
1
1 Input 7
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(c) Paul Main
74F151 8-Input MUX
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(c) Paul Main
74F151 8-Input MUX
Pin Names and Loading / Fanout
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(c) Paul Main
Mux vs DeMux
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(c) Paul Main
74LS138 8-Output DEMUX
De-Multiplex one input to many
outputs -Reverse operation of a
multiplexor
74LS138 Truth Table
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(c) Paul Main
DeMultiplexor
• The 74LS138 can be
implemented by the
logic shown.
• The 54LS138 is identical in
function, but can operate over
the “Mil-spec” -55°C to
125°C Temperature Range.
• The 74LS138 can operate
over the Commercial 0°C 70°C Temperature Range.
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(c) Paul Main
ASCII & Extended IBM Graphics Character Set
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00
10
20
30
40
50
60
70
80
90
A0
B0
C0
D0
E0
F0
0123456789ABCDEF
(c) Paul Main
Acknowledgments & References
• Altium Protel 98, DXP or Altium 6 to create these schematic
diagrams and timing diagrams.
• Logic Timing Diagrams are from Texas Instruments (TI) Logic
Selection Guide - Digital Design Seminar
• National Semiconductor data sheets 74LS138.
• http://www.sea.vg/mic/2007/Atmel/Atmega128ManualDoc246
7.pdf
• IEEE timeline of Computing
• Interfacing Sensors to the IBM PC.Tompkins & Webster
• Microelectronic Circuits - Sedra & Smith
• Paul Main AVR lecture notes - sea.net.au - October 2007
10 April 2008
(c) Paul Main