Download The George Washington University School of Engineering and

The George Washington University
School of Engineering and Applied Science
Department of Electrical and Computer Engineering
ECE122
Lab 4: VTC & Power Consumption
Ritu Bajpai
September 18, 2008
1
Voltage Transfer Characteristic
• Vin on the X-Axis and Vout on the Y-Axis
5V
Vout
0V
0V
Vin
5V
2
Voltage Transfer Characteristic
• A symmetric VTC is one where the Vin vs
Vout curve crosses through the dead
center of the graph.
• Using 5V inputs and outputs this point is
2.5V in and 2.5V out
3
Lab activity
• First we will plot VTC for an inverter.
• Check if the VTC is symmetric or not.
• If VTC is not symmetric we will find
Wp/Wn such that the VTC for an inverter
is symmetric.
4
Step 1: Plotting the VTC
• The VTC curve gives us all the output
values of the inverter corresponding to all
the input values within the range of Gnd
and Vdd.
• The input varies from 0 (Gnd) to 5V (Vdd)
in our case and so does the output.
5
Replace the pulse input by a DC
source in the inverter test circuit.
6
Select DC sweep analysis and fill
in values to sweep source 1
7
Choose DC results
Insert command to print the DC
sweep voltages at input and
output
Set parameter M =1
8
Voltage Transfer Characteristic
of the inverter
9
Step 2: Is the VTC symmetric?
• The obtained VTC plot is not symmetric.
• For symmetric VTC, at intersection of input
and output curve, both input and output
should be equal to half the maximum
possible value.
10
Step 3: Obtaining symmetric VTC
• Keeping the length fixed and the width of
NMOS fixed we vary the width of PMOS to
obtain a symmetric curve.
• That means that we will perform DC
sweep that we performed earlier along
with the parametric sweep.
11
In simulation set up define parametric sweep
12
Defining pMOS width as a parameter
In the T-Spice code write the following command
.param width=4u
And in pMOS properties change
W=2.5u to W=‘width’
• Thus PMOS width is now defined by
parameter width while NMOS width remains
unchanged.
• The following slide shows the changes
incorporated in the T-Spice code.
13
T-Spice code
14
Parametric sweep analysis waveform
Each output plot corresponds to different width, width is varied in the steps of
.2u
15
Double click on the symmetric VTC
to obtain trace characteristics.
16
Designing for symmetric VTC
• Record the width of the pMOS
corresponding to symmetric operating
point.
• In this case width = 5.2u
• In S-Edit substitute this width for the
pMOS and perform transient analysis.
17
Rise time at symmetric operation
18
Fall time at symmetric operation
19
Power Consumption
• Next we will use Tanner Tools to estimate
the power consumption of a design.
• We will also identify the sources of power
consumption.
20
Power Consumption
• You already have the following test-bench:
21
Power Consumption
• Simulate the circuit over 2 periods with
fine resolution (2ns)
• Show the waveforms for:
– The input and output voltages
– The power provided by the power supply
– The currents drawn from the power supply
and the capacitor
22
Plotting power and current output from
transient results
23
Power Consumption
10pF Load & 10ns Rise and Fall Times
24
Power Consumption
• Lower the value of the capacitor to 1pF
and re-simulate.
25
Power Consumption
1pF Load & 10ns Rise and Fall Times
26
Power Consumption
• Decrease the rise and fall times of the
pulse source to 1ns.
27
Power Consumption
1pF Load & 1ns Rise and Fall Times
28
Analysis and Results
• Report numerical values of your results in
tabular form.
• Can we vary the width of NMOS instead of
PMOS in order to obtain symmetric VTC?
If yes, should we increase or decrease it’s
value keeping PMOS width fixed?
• On the VTC of the inverter show the
triode, saturation and cut off region. Which
region is used for digital design and which
one is used for analog design?
29
Analysis and Result
• Report numerical values of your results in
tabular form.
• Do you obtain different values of power
consumed on varying the load and rise
and fall time of the pulse? Compare and
analyze your results.
30