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CSCI-365
Computer Organization
Lecture 15
Note: Some slides and/or pictures in the following are adapted from:
Computer Organization and Design, Patterson & Hennessy, ©2005
Some slides and/or pictures in the following are adapted from:
slides ©2008 UCB
Below the Program
•
High-level language program (in C)
swap
}
•
C compiler
Assembly language program (for MIPS)
swap:
•
int v[], int k){
int temp;
temp = v[k];
v[k] = v[k+1];
v[k+1] = temp;
sll
add
lw
lw
sw
sw
jr
$2, $5, 2
$2, $4,$2
$15, 0($2)
$16, 4($2)
$16, 0($2)
$15, 4($2)
$31
assembler
Machine (object) code (for MIPS)
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000 . . .
?
What is “Computer Organization”?
Application (Netscape)
Compiler
Software
Hardware
Assembler
Operating
System
(MacOS X)
Processor Memory I/O system
Datapath & Control
Digital Design
Circuit Design
transistors
Coordination of many levels of abstraction
We’ll investigate lower abstraction layers!
(contract between HW & SW)
365
Instruction Set
Architecture
Synchronous Digital Systems
• A processor hardware implementation, such as the
MIPS, is an example of a Synchronous Digital System
• Synchronous
– Means all operations are coordinated by a central clock
• It keeps the “heartbeat” of the system!
• Digital
– Means all values are represented by discrete values
– Electrical signals are treated as 1’s and 0’s and grouped together
to form words
Clocks
• A microprocessor is composed of many different circuits
that are operating simultaneously – if each circuit X
takes in inputs at time TIX, takes time TEX to execute the
logic, and produces outputs at time TOX, imagine the
complications in coordinating the tasks of every circuit
• A major school of thought (used in most processors built
today): all circuits on the chip share a clock signal (a
square wave) that tells every circuit when to accept
inputs, how much time they have to execute the logic,
and when they must produce outputs
Clock Terminology
Rising clock edge
Cycle time
Falling clock edge
4 GHz = clock speed =
1
cycle time
=
1
.
250 ps
Logic Design
• Next we’ll study how a modern processor is built; starting
with basic elements as building blocks
• Why study hardware design?
– Understand capabilities and limitations of hardware in general
and processors in particular
– What processors can do fast and what they can’t do fast (avoid
slow things if you want your code to run fast!)
– There is just so much you can do with processors. At some point
you may need to design your own custom hardware
Integrated Circuits
Bare Die
• Primarily Crystalline Silicon
• 1mm - 25mm on a side
• 2007 feature size ~ 65 nm = 65 x 10-9 m
(then 45, 32, 22, and 16 [by yr 2013])
• 100 - 1000M transistors
• (25 - 100M “logic gates”)
Chip in Package
• Package provides:
– spreading of chip-level signal paths to
board-level
– heat dissipation.
• Ceramic or plastic with gold wires.
Jack Kilby
PowerPC Die Photograph
Let’s look
closer…
Transistor Circuit Rep. vs. Block diagram
• Chips composed of nothing but transistors and wires
• Small groups of transistors form useful building blocks
E.g., NAND gate
“1” (voltage source)
“0” (ground)
a
0
0
1
1
b
0
1
0
1
c
1
1
1
0
• Blocks are organized in a hierarchy to build higher-level
blocks: E.g., adders
The Clock Signal
• In graphical form, for a brief instant
• Distributed throughout the processor chip
• Synchronizes all activities
• Typical rate is 1GHz  1ns (1 x 10-9 sec)
Signals and Waveforms
•
Observations
– Signals spend most of
time around high or low
voltage
– Signal value not exactly
at voltage extremes
– Changes are
synchronized to clock
signal
– Low voltage / high
voltage  0 / 1
– Circuits have
“restoration” property
– Clock controls when
signals take on new
values
Signals and Waveforms: Grouping
4-bit work on 4 wires
4-bit bus
• Lower case (x) for
single bit, Upper case
(X) for bit vector or
word
• 4 wires transmits
different word values
at different times
• Bus signal waveform
shown at bottom
Signals and Waveforms: Circuit Delay
• All circuits generate
valid output after
some delay (< T)
• Without delay
computers would run
infinitely fast!
• Actual delay value
depends on
– IC technology
– Adder architecture,
transistor circuit
details, layout
– Data values
Types of Circuits
• Synchronous Digital Systems are made up of
two basic types of circuits
– Combinational Logic Blocks (CL)
– State Elements (registers)
Combinational Logic (CL) circuits
yi = fi(x0, ...., xn-1), where x,y are {0,1}
• Our previous adder circuit is an example
• Output is a function of the inputs only
• Similar to a pure function in mathematics, y=f(x). No way
to store information, no side effects
• If we change X, Y will change immediately (after a short
delay)
• Very important: This is not like a function call! f is active
and doing what it does continuously. It is not “invoked” or
“called”
State Elements: circuits that store info
• Examples: registers, memories
• Under the control of the “LOAD” signal, the register captures the
input value and stores it indefinitely
• The value stored by the register appears on the output (after a small
delay)
• Until the next load, changes on the data input are ignored (unlike
CL, where input changes change output)
• These get used for short term storage (e.g., register file) and to help
move data around the processor
Accumulator Example
• Why do we need to control the flow of information?
• Want:
S=0;
for (i=0; i<n; i++)
S = S + Xi;
• Assume:
– Each X value is applied in succession, one per cycle
– After n cycles the sum is present on S
• What should we put inside the sum block to achieve the desired
function? (DONE IN CLASS)
Register Details...What’s inside?
• n instances of a “Flip-Flop”
• Flip-flop name because the output flips and flops between and 0,1
• D is “data”, Q is “output”
• Also called “d-type Flip-Flop”
What’s the Timing of a Flip-Flop?
• Edge-triggered d-type flip-flop
– This one is “positive edge-triggered”
• “On the rising edge of the clock, the input d is sampled and
transferred to the output. At all other times, the input d is ignored.”
• Example waveforms: