Download The von Neumann Model – Chapter 4

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The von Neumann Model –
Chapter 4
COMP 2620
Dr. James Money
COMP 2620
The LC-3 as a von Neumann Machine
Instruction Cycle
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Each instruction is handled in a systematic
way through a sequence of steps call the
instruction cycle
Each step is called a phase
There are six phases to the cycle
Instruction Cycle
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The six phases of the instruction cycle are:
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Fetch
Decode
Evaluate Address
Fetch Operands
Execute
Store Result
Instruction types
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There are three instruction types:
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Operate instruction – processes data, such as
ADD
Data movement instruction – moves data from
one place to another, such as LDR
Control instruction – alters the flow of execution in
a program, such as JMP
Instruction types
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The control instruction changes the
sequence of execution in the processing unit
Normally, the MAR is loaded from the PC at
the beginning of processing
Thus, the control instruction must affect the
PC value during the EXECUTE phase
We use this generate loops and branches
Example: LC-3 JMP Instruction
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Set the PC to the value contained in a register.
This becomes the address of the next instruction to
fetch.
“Load the contents of R3 into the PC.”
Control of Instruction Cycle
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We’ve described the six phases, each having
a number of steps
For example, the FETCH instruction requires
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loading the MAR
issuing a read memory command
reading MDR -> IR
Recall the finite state machine is overseeing
all the operations
Control of Instruction Cycle
Control of Instruction Cycle
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Remember, processing starts in state 1
The FETCH takes three clock cycles
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MAR is loaded with PC and PC=PC+1
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Finite state machine asserts GatePC and LD.MAR
PCMUX selects the +1 line and assert LD.PC signal for
output
MDR is loaded with instruction from memory
MDR -> IR
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Asserts GateMDR and LD.IR
Control of Instruction Cycle
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DECODE takes one cycle in state 4
IR is used as input to for high order 4
bits(IR[15:12]) to finite state machine
Execution continues until each instruction
completes and the next state is set to state 1
again
Stopping the Computer
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The processing unit continues to run forever
We need a way to stop processing so we can
turn off the computer(that is, besides using
the power switch itself)
Even if a program finishes, others are waiting
to run by the operating system
To do this, we must stop the clock
Stopping the Computer
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The clock defines one machine cycle
This allows the finite state machine to run
precisely
We must stop the clock to stop the instruction
cycle
Stopping the Computer
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The clock generator is a crystal oscillator,
which is a piezoelectric device
For our purposes, we consider it a black box
that produces oscillating voltage
Stopping the Computer
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The clock circuit is shown below. It have a
RUN latch which controls the clock
Stopping the Computer
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If the RUN latch is in the 1 state, that is Q=1,
the clock output is sent out
If the run latch is 0 (Q=0), then the clock
circuit outputs 0
So we need only clear the RUN latch to stop
execution
Typically this is done with a HALT instruction