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ELECTRONICS Part II EE 213 H. Chan; Mohawk College 1 Course Content Part I – Introduction to Oscilloscope Measurements – Introduction to Semiconductors – Diode Applications – Special-Purpose Diodes – Bipolar Junction Transistors (BJTs) – Bipolar Transistor Biasing H. Chan; Mohawk College 2 Course Content (cont’d) Part II – Small-Signal BJT Amplifiers – Power Amplifiers – Field-Effect Transistor Biasing – Small-Signal FET Amplifiers – Amplifier Frequency Response – Transistor Voltage Regulators – Introduction to Thyristors H. Chan; Mohawk College 3 Intro to Small-Signal Amplifiers The Q-point of a transistor is set by dc biasing Small-signal amplifiers are designed to handle small ac signals that cause relatively small variations about the Q-point. Convention used for dc and ac values: – dc values, e.g. IE , RE – ac values, e.g. Ie (rms is assumed unless otherwise stated), Re , r’e (internal r of t’sistor) – instantaneous values, e.g. ie H. Chan; Mohawk College 4 Basic Small-Signal Amplifier +VCC VBQ Rs Vs Vb C1 ICQ RC R1 IBQ Ib R2 Ic C2 VCEQ RE Vce RL C1 and C2 block dc voltage but pass ac signal. H. Chan; Mohawk College 5 Small-Signal Amplifier Operation Coupling capacitors C1 and C2 prevent Rs and RL from changing the dc bias voltages Vs causes Vb and Ib to vary slightly which in turn produces large variations in Ic due to b As Ic increases, Vce decreases and vice versa Thus, Vc (output to RL) is 180o out of phase with Vb H. Chan; Mohawk College 6 Graphical Picture IC IBQ Ib IB5 Ic IB4 Q IB3 ICQ IB2 IB1 VCEQ VCE Vce H. Chan; Mohawk College 7 h Parameters h (hybrid) parameters are typically specified on a manufacturer’s data sheet. – – – – hi: input resistance; output shorted hr : voltage feedback ratio, input open hf : forward current gain; output shorted ho : output conductance; input open Each h parameter has a 2nd subscript letter to designate configuration, e.g. hfe, hfc, hfb H. Chan; Mohawk College 8 Amplifier Configurations Common-emitter amplifier: emitter is connected to ground, input is applied to base, and output is on collector Common-collector: collector is grounded, input is at base, and output is on emitter Common-base: base is grounded, input is at emitter, and output is on collector H. Chan; Mohawk College 9 h-parameter Ratios Common-Emitter Common-Base Common-Collector hie = Vb/Ib hib = Ve/Ib hic = Vb/Ib hre = Vb/Vc hrb = Ve/Vc hrc = Vb/Ve hfe = Ic/Ib hfb = Ic/Ie hfc = Ie/Ib hoe = Ic/Vc hob = Ic/Vc hoc = Ie/Ve H. Chan; Mohawk College 10 h-parameter Equivalent Circuit Iin Vin hi hrVout hfIin ho Vout The above diagram is the general form of the h- parameter equivalent circuit for a BJT. For the three different amplifier configurations, just add the appropriate second subscript letter. H. Chan; Mohawk College 11 r Parameters The resistance, r, parameters are perhaps easier to work with aac : ac alpha (Ic/Ie) bac : ac beta (Ic/Ib) – re’ : ac emitter resistance – rb’ : ac base resistance – rc’ : ac collector resistance Relationships of h and r parameters: aac = hfb ; bac = hfe hre hre 1 re ' ; rc ' hoe hoe hre rb ' hie (1 h fe ) hoe H. Chan; Mohawk College 12 r-Parameter Equivalent Circuits C aacIe C C aacIe bacIb rc’ bacIb rb’ B B B Ib Ib Ie re’ 25 mV/IE E Generalized r-parameter equivalent circuit for BJT re’ re’ E E Simplified r-parameter equivalent circuit and symbol of BJT H. Chan; Mohawk College 13 Difference between bac and bDC IC IC 0 Q IBQ bDC = ICQ/IBQ DIC { IB Q { ICQ DIB 0 IB bac = DIC/DIB bDC and bac values will generally not be identical and they also vary with the Q-point chosen. H. Chan; Mohawk College 14 Common-Emitter Amplifier +VCC R1 C1 : for input coupling C3 : for output coupling RC Vout C1 Vin C3 R2 RE RL C2 C2 : for emitter bypass H. Chan; Mohawk College 15 DC Analysis of CE Amplifier +VCC R1 RC VC VB R2 VE RE R2 // b DC RE VCC VB R1 R2 // b DC RE If bDCRE = RIN(base) >> R2, then R2 VCC VB R1 R2 VE = VB - VBE ; VE IC I E RE VC = VCC - ICRC H. Chan; Mohawk College 16 AC Analysis of CE Amplifier RC ac ground B Vin R1 C Vout bacIb R2 re’ E C1, C2, and C3 are replaced by shorts assuming XC 0 Input and output resistance: Rin(tot) = R1//R2//Rin(base) where Rin(base) = bacre’ Rout RC (not including RL) Voltage gain of CE amplifier: Vout Vc I c RC RC Av Vin Vb I e re ' re ' If RL is included: Rout = RC//RL , and R // R Av H. Chan; Mohawk College C L re ' 17 Overall Voltage Gain of CE Amplifier Rs Vs Vb R1//R2 Voltage gain without emitter bypass capacitor, C2 : Vout Rc = RC//RL Rin(tot) Vb Av ' Av Av Vs Rs Rin(tot) H. Chan; Mohawk College Rc Av re ' RE Rule of thumb on emitter bypass capacitor: XC2 RE/10 18 Stability of Voltage Gain +VCC R1 RC C3 R2 RE1 Bypassing RE produces max. voltage gain but it is less stable since re’ is dependent on IE and temperature. By choosing RE110 re’, the the effect of re’ is minimized without reducing the voltage gain too much: C1 Swamped amplifier RE2 C2 Av -Rc/RE1 Rin(base) = bac(re’+RE1) H. Chan; Mohawk College 19 Current Gain and Power Gain Ic Rs Is Vs Ib R1//R2 Rc Base to collector current gain is bac but Vs overall current gain is Ai = Ic/Is where I s Rin(tot) Rs Overall power gain is: Ap = Av’Ai H. Chan; Mohawk College 20 Common-Collector Amplifier DC analysis: +VCC R2 // b DC RE VCC VB R1 R2 // b DC RE VE = VB - VBE R1 C1 Vin C2 R2 RE IE = VE / RE VC = VCC Vout The CC amplifier is also RL known as an emitterfollower since Vout follows Vin in phase and voltage. H. Chan; Mohawk College 21 AC Analysis of CC Amplifier Vout Re Av Vin (re ' Re ) Vin Iin R1//R2 aacIe Rin(base) b ac (re ' Re ) re’ If Re >> re’, then, Av 1, and Rin(base) bacRe Rin(tot) = R1//R2//Rin(base) Vout Re= RE//RL Rout (Rs/bac)//Re (very low) Ai = Ie/Iin bac (if R1//R2>> bacRe) Vin = Ie(re’ + Re) Ap = AvAi Ai Vout = IeRe Ie H. Chan; Mohawk College 22 Darlington Pair +VCC Ib1 bac1 Ie1 Ie2 Ie2bac2Ie1 bac1bac2Ie1 So, bac(overall) = bac1bac2 Assuming re’ << RE, bac2 Rin = bac1bac2RE Darlington pair has RE very high current gain, very high Rin, and very low Rout - ideal as a H. Chan; Mohawk College buffer 23 Common-Base Amplifier +VCC R1 RC Vout C2 C3 C1 Vin R2 RE CB amplifier provides high Av with a max. Ai of 1. There is no phase inversion between Vout and Vin. RL DC formulas are identical to those for CE amplifier. H. Chan; Mohawk College 24 AC Analysis of CB Amplifier Vout Ic B re’ Vin E RE Rc Vout I c Rc Rc Av Vin I e (re ' // RE ) re ' // RE Rin(emitter) = re’//RE If RE >> re’, then Rc Av ; Rin(emitter) = re’ re ' Rout Rc Ai 1; and Ap Av H. Chan; Mohawk College 25 Comparing CE, CC, & CB Amplifiers CE CC CB Av High (-Rc/re’) Low 1 High (Rc/re’) Ai(max) High (bac) High (bac) Low 1 Ap High Ai High Av Rin(max) Very high (AvAi) Low (bacre’) Rout High (Rc) High (bacRe) Very low (re’) Very low High (Rc) (Rs/bac)//Re) H. Chan; Mohawk College 26 Multistage Amplifiers Vin Av1 Av2 Av3 Avn Vout n amplifier stages in cascade Overall voltage gain, AvT = Av1Av2Av3 . . . Avn = Vout/Vin Overall gain in dB, AvT(dB) = Av1(dB)+Av2(dB) + . . . +Avn(dB) where, Av(dB) = 20 log Av The purpose of a multistage arrangement is to increase the overall voltage gain. H. Chan; Mohawk College 27 Two-stage CE Amplifier +VCC R1 R3 C1 Vin R5 C3 Q1 R2 R4 C2 R6 R7 C5 Q2 Vout R8 C4 Capacitive coupling prevents change in dc bias H. Chan; Mohawk College 28 Analysis of 2-stage CE Amplifier DC Analysis: VB, VE, VC and IC are identical to those for 1-stage CE ampl. Vin R1//R2 R3 R5//R6 Rin(base2) AC Analysis: Rc1 ; Rc1 = R3//R5//R6//Rin(base2) ; Av1 AvT = Av1Av2 re ' H. Chan; Mohawk College Rc 2 R7 Av 2 re ' re ' 29 2-stage Direct-Coupled Amplifier +VCC R1 R3 R5 Vout Vin R2 Q1 Q2 R4 R6 H. Chan; Mohawk College Note: No coupling or bypass capacitors 30 Notes on Direct-Coupled Amplifier DC collector voltage of first stage provides base-bias voltage for second stage Amplification down to 0 Hz is possible due to absence of capacitive reactances Disadvantage - small changes in dc bias voltages due to temperature or powersupply variations are amplified by succeeding stages H. Chan; Mohawk College 31 Transformer-Coupled Multistage Amplifier +VCC T1 Vin C1 R1 R2 R3 T2 R4 C3 Vout C5 Q2 Q1 R5 T3 C2 H. Chan; Mohawk College R6 C4 32 Notes On T’former-Coupled Amplifiers Transformer-coupling is often used in high- frequency amplifiers such as those in RF and IF sections of radio and TV receivers. Transformer size is usually prohibitive at low frequencies such as audio. Capacitors are usually connected across the primary windings of the transformers to obtain resonance and increase selectivity. H. Chan; Mohawk College 33 Typical Troubleshooting Process Identify the symptom(s). Perform a power check. Perform a sensory check. Apply a signal-tracing technique to isolate the fault to a single circuit. Apply fault-analysis to isolate the fault further to a single component or group of components. Use replacement or repair to fix the problem. H. Chan; Mohawk College 34 Power Amplifiers Power amplifiers are large-signal amplifiers They are normally used as the final stage of a communications receiver or transmitter to provide signal power to speakers or to a transmitting antenna. Four classes of large-signal amplifiers will be covered: class A, class B, class AB, and class C. H. Chan; Mohawk College 35 Class A Amplifier Characteristics Q-point is centred on ac load line. Operates in linear region (i.e. no cutoff or saturation) for full 360o of input cycle. Output voltage waveform has same shape as input waveform except amplified. Can be either inverting or noninverting. Maximum power efficiency is 25%. H. Chan; Mohawk College 36 Class A Operation: DC Load Line +VCC R1 IC(sat) occurs when VCE 0, so VCC I C ( sat) RC RE VCE(cutoff) occurs Vout when IC 0, so VCE(cutoff) VCC RC C1 Vin C3 R2 RE RL C2 IC IC(sat) ICQ Q VCEQ VCC H. Chan; Mohawk College VCE 37 Class A Operation: AC Load Line From Q-point to cutoff point: DIc = ICQ ; DVce’ = ICQRc Vce(cutof) = VCEQ + ICQRc Vin R1//R2 Rc Ic(sat) IC DIc’ Rc = RC//RL ICQ From Q-point to saturation point: DVce = VCEQ ; DIc’ = VCEQ/Rc Ic(sat) = ICQ+DIc’ = ICQ + VCEQ/Rc H. Chan; Mohawk College Q DVce’ VCE VCEQ Vce(cutoff) 38 Maximum Class A Operation IC AC load line Ic(sat) Q ICQ 0 Q-point is at centre of ac load line for max. voltage swing with no clipping. VCE To centre Q-point: VCEQ = ICQRc Ic(sat) = 2ICQ Vce(cutoff) = 2VCEQ 0 VCEQ Vce(cutoff) H. Chan; Mohawk College 39 Non-linearity of re’ For large voltage swings, IC Q re’25mV/IE is not valid. Instead, the average value of re’ = DVBE/DIC should be used for Av formula. Non-linearity of re’ leads to distortion at output. Reduce distortion by VBE setting Q-point higher or use swamping resistor in H. Chan; Mohawk College 40 the emitter. Power & Efficiency: Class A Amplifier Power gain, Ap = AiAv bDCRc/re’ Quiescent power, PDQ = ICQVCEQ Output power, Pout = VceIc = Vout(rms)Iout(rms) – when Q-point is centred, Pout(max) = 0.5VCEQICQ Efficiency, h = Pout/PDC = Pout/(VCCICQ) When Q-point is centred, hmax = 0.25 Max. load power, PL(max) = 0.5(VCEQ)2/RL H. Chan; Mohawk College 41 Class B Amplifier Characteristics Biased at cutoff - it operates in the linear region for 180o and cutoff for 180o. Class AB amplifier is biased to conduct slightly more than 180o. Advantage of class B or class AB amplifier over class A amplifier - more efficient. Disadvantage - more difficult to implement circuit for linear reproduction of input wave H. Chan; Mohawk College 42 Push-pull Class B Operation +VCC Vin An npn transistor and a matched pnp transistor form two emitterfollowers that turn on alternately. Q1 Since there is no dc base bias, Q1 Vout and Q2 will turn on only when |Vin| is greater than VBE. This leads to Q2 RL crossover distortion. Q1 on -VCC Vout Complementary amplifier H. Chan; Mohawk College t Q2 on 43 Class AB Operation +VCC C1 The push-pull circuit is R1 Q1 D1 D2 Vin C3 Q2 C2 R2 RL biased slightly above cutoff to eliminate crossover distortion. D1 and D2 have closely matched transconductance characteristics of the transistors to maintain a stable bias. C3 eliminates need for dual-polarity supplies. H. Chan; Mohawk College 44 Class AB Amplifier: DC Analysis +VCC Pick R1 = R2, therefore R1 Q1 VCEQ1 D1 A D2 R2 Q2 VCEQ2 VA=VCC/2 Assuming transconductance characteristics of diodes and transistors are identical, VCEQ1=VCEQ2=VCC/2 ICQ 0 (cutoff) H. Chan; Mohawk College 45 Class AB Amplifier: AC Analysis IC Ic(sat) For max. output, Q1 and ac load line Ic VCEQ VCE Vce Q2 are alternately driven from near cutoff to near saturation. Vce of both Q1 and Q2 swings from VCEQ = VCC/2 to 0. Ic swings from 0 to Ic(sat) = VCEQ/RL Iout(pk) Input resistance, Rin = bac(re’+RL) H. Chan; Mohawk College 46 Power & Efficiency: Class B Amplifier Average output power, Pout = Vout(rms)Iout(rms) For max. output power, Vout(rms)= 0.707VCEQ and Iout(rms) = 0.707Ic(sat); therefore, Pout(max)=0.5VCEQIc(sat) = 0.25 VCCIc(sat) Since each transistor draws current for a half-cycle, dc input power, PDC = VCCIc(sat)/p Efficiency, hmax = Pout/PDC = 0.25p 0.79 The efficiency for class AB is slightly less. H. Chan; Mohawk College 47 Darlington Class AB Amplifier +VCC C1 R1 Q2 D1 Q1 D2 D3 D4 Vin C2 R2 Q3 C3 Q4 RL In applications where the load resistance is low, Darlingtons are used to increase input resistance presented to driving amplifier and avoid reduction in Av. 4 diodes are required to match the 4 baseemitter junctions of the darlington pairs. H. Chan; Mohawk College 48 Class C Amplifier Characteristics Biased below cutoff, i.e. it conducts less than 180o. More efficient than class A, or push-pull class B and class AB. Due to severe distortion of output waveform, class C amplifiers are limited to applications as tuned amplifiers at radio frequencies (RF). H. Chan; Mohawk College 49 Basic Class C Operation +VCC VBB+VBE Vin RC 0 Vo Vin Ic RB VBB 0 tON T The transistor turns on when Vin > VBB+VBE Duty cycle = tON / T H. Chan; Mohawk College 50 Tuned Operation +VCC Ic C1 0 L Vout C2 Vin RB VBB The short pulse of Ic initiates and sustains the oscillation of the parallel resonant circuit . The output sinewave has a pk-pk amplitude of approximately 2VCC. H. Chan; Mohawk College 51 Power & Efficiency: Class C Amplifier Using simplification where current is IC(sat) and voltage is VCE(sat) at turn on, and assuming the entire load line is used, then PD(avg) = (tON/T)VCE(sat)IC(sat) Max. output power for tuned operation, Pout(max) = (0.707V2CC) / Rc = 0.5 V2CC / Rc Efficiency, h = Pout / (Pout + PD(avg) ) When Pout >> PD(avg) , h approaches 100%. H. Chan; Mohawk College 52 Frequency Multiplier Ic 0 Frequency “doubling” is obtained by tuning tank circuit to second harmonic of input frequency. By tuning tank circuit to Vout higher harmonics, further frequency multiplication factors are achieved. Output of tank circuit tuned Amplitude of each alternate peak drops due to to 2nd harmonic frequency energy loss in circuit. H. Chan; Mohawk College 53 Junction Field-Effect Transistor Drain Gate D p n p G Drain Gate D n p n G S Source Symbol S Source n-channel Symbol p-channel H. Chan; Mohawk College 54 Basic Operation of JFET D G Depletion region in n- ID p p VDD n VGG S JFET is always operated with VGG reverse-biased channel increases its resistance. Channel width and channel resistance can be controlled by varying VGG (or VGS), thereby controlling drain current, ID. H. Chan; Mohawk College 55 JFET Characteristics For VGS=0 I + D VDS VDD + VGS _ _ IDSS B VGS = 0 C Constant-current region A 0 VP (pinch-off voltage) Breakdown RD ID VDS Between points A and B, ID a VDS - ohmic region. IDSS - max. ID for a given JFET regardless of external circuit. H. Chan; Mohawk College 56 Controlling ID With VGS ID RD VGS = 0 IDSS VGS= -1V ID VDD VGS= -2V VGS= -3V VGS= -4V VGG 0 VP VGS= VGS(off) VDS VGS(off) = cutoff voltage (i.e. ID = 0) VGS(off) = -VP (where VP is measured at VGS = 0) H. Chan; Mohawk College 57 JFET Transfer Characteristics ID Shockley’s equation: V GS I D I DSS 1 V GS ( off ) IDSS 2 Forward transconductance: VGS VGS(off) V DI D GS y fs or g m g m 0 1 V DVGS GS ( off ) 0 g m0 2 I DSS is value of gm at VGS = 0 | VGS ( off ) | Note: gm is max. at VGS = 0 and min. at VGS(off) H. Chan; Mohawk College 58 Other JFET Parameters JFET’s input resistance, RIN = |VGS/IGSS| is very high since its gate-source junction is reverse-biased. Input capacitance, Ciss is typically a few pF. Output conducutance, gos, or output admittance, yos, is typically 10 mS, and is the inverse of drain-to-source resistance, r’ds = DVDS/DID H. Chan; Mohawk College 59 JFET With Self-Biasing +VDD RD VG = 0 RG + RS_ IS Large RG is required to prevent shorting of input signal to ground and to prevent loading on the driving stage. VGS = -IDRS VD = VDD - IDRD VDS = VD - VS = VDD - ID(RD+RS) H. Chan; Mohawk College 60 Setting Q-Point of JFET First, determine ID for a desired value of VGS either by using transfer characteristic curve or Shockley’s equation. Then calculate RS = |VGS/ID| For midpoint bias (i.e. ID = 0.5 IDSS), make VGSVGS(off)/3.4 To set VD = 0.5 VDD , pick RD = VDD/(2ID) H. Chan; Mohawk College 61 Graphical Analysis of Self-Biased JFET First obtain transfer +VDD characteristic curve RD from data sheet or plot using Shockley’s RG RS equation. _ Draw dc load line by starting with VGS = 0 when ID = 0, and then VGS = -IDSSRS when ID VGS VGS(off) = IDSS. H. Chan; Mohawk College ID IDSS Q 0 62 Voltage-Divider Bias To keep the gate-source junction reverse-biased, VS > VG VS = IDRS R2 VDD VG R1 R2 VS = VG - VGS +VDD R1 H. Chan; Mohawk College ID RS VS IS VG R2 VS VG VGS ID RS RS RD 63 Graphical Analysis of Voltage-Divider Biased JFET ID For ID = 0, VS = IDRS = 0, and VGS = VG - VS = VG IDSS For VGS = 0, Q VGS VGS(off) VG VGS VG ID RS RS VG RS 0 VG Draw the dc load line by joining the two points and extend it to intersect the curve to get the Q-point. H. Chan; Mohawk College 64 Q-Point Stability The transfer characteristic of a JFET can differ considerably from one device to another of the same type. This can cause a great variation of the Q-point, and consequently, ID and VGS. With voltage-divider bias, the dependency of ID on the range of Q-points is reduced (i.e. more stable) because the slope is less than for self-bias, although VGS varies quite a bit for both circuits. H. Chan; Mohawk College 65 Metal Oxide Semiconductor FET The MOSFET differs from the JFET in that it has no pn junction structure. The gate of the MOSFET is insulated from the channel by a silicon dioxide layer. The two basic types of MOSFETs are depletion (D) and enhancement (E). Because of the insulated gate, these devices are sometimes called IGFETs. H. Chan; Mohawk College 66 Depletion MOSFET Drain n-channel D-MOSFET is usually operated in n the depletion mode Gate p with VGS < 0 and in G n the enhancement mode S with VGS > 0. Channel Symbol Source p-channel D-MOSFET uses the opposite Basic structure of voltage polarity n-channel D-MOSFET SiO2 D H. Chan; Mohawk College 67 Depletion/Enhancement MOSFET Depletion Mode: negative gate voltage applied to n channel depletes channel of electrons, thus increasing its resistivity. At VGS(off), ID = 0, just like n-channel JFET. Enhancement mode: when VGS > 0, electrons are attracted into channel, thus increasing (enhancing) the channel conductivity. H. Chan; Mohawk College 68 Enhancement MOSFET Drain SiO2 Gate D p n Induced Channel G p S Symbol VGG RD p n p VDD Source E-MOSFET construction and operation ( p-channel) H. Chan; Mohawk College 69 Notes On E-MOSFET The E-MOSFET operates only in the enhancement mode. For a p-channel device, a negative gate voltage above a threshold value induces a channel by creating a layer of positive charges in the substrate region adjacent to the SiO2 layer. Channel conductivity increases with VGS. H. Chan; Mohawk College 70 VMOS & TMOS Power MOSFETs S G S p n+ n+ p n- n+ Channel Channel S G + n+ p pn n- n+ Channel D D VMOS (V-groove MOSFET) creates a short and wide induced channel to allow for higher currents and greater power dissipation. Frequency response is also improved. TMOS is similar to VMOS except it is easier to manufacture H. Chan; Mohawk College 71 D-MOSFET Transfer Characteristic ID ID n channel p channel IDSS VGS VGS(off) IDSS 0 0 VGS(off) VGS D-MOSFET can operate with either +ve or -ve gate voltage. Shockley’s equation for the JFET curve also applies to the D-MOSFET curve. H. Chan; Mohawk College 72 E-MOSFET Transfer Characteristic ID ID n channel 0 VGS(th) p channel VGS VGS VGS(th) 0 E-MOSFET uses only channel enhancement. Ideally ID = 0 until VGS > VGS(th). Transfer equation: ID = K(VGS - VGS(th))2, where K depends on the particular MOSFET. H. Chan; Mohawk College 73 MOSFET Handling Precautions All MOS devices are subject to damage from electrostatic discharge (ESD). To avoid damage from ESD: – ship/store MOS devices in conductive foam – ground all instruments and metal benches – ground assembler’s/handler’s body via resistor – never remove MOS device from live circuit – do not apply signals while dc supply is off H. Chan; Mohawk College 74 D-MOSFET With Zero-Bias Since VGS = 0, ID = IDSS. +VDD RD VG = 0 RG ID VDS = VDD - IDSSRD The value of RG is chosen arbitrarily large to prevent loading of the previous stage and isolate any ac input signal from ground. H. Chan; Mohawk College 75 E- or D-MOSFET Bias +VDD R1 Rs +VDD RD R2 VDD VGS R1 R2 VDS = VDD - IDRD RG RD ID = K(VGS - VGS(th))2 Drain-feedback bias Voltage-divider bias Since IG 0, VGS = VDS H. Chan; Mohawk College 76 Small-Signal JFET Amplifier +VDD RD VGSQ C3 C1 Vout Vin VDSQ RG RS C2 Common-source amplifier RL Voltage waveforms H. Chan; Mohawk College 77 JFET Transfer Characteristic Curve ID As Vgs swings from its IDSS Id Q VGS VGS(off) IDQ Vgs VGSQ Signal operation with n-channel JFET Q-point to a more -ve value, Id decreases from its Q-point. When Vgs swings to a less -ve value, Id increases. Similar diagrams can be drawn for MOSFETs. H. Chan; Mohawk College 78 JFET Drain Characteristic Curve ID Id Q IDQ 0 n-channel operation Vds VDSQ This is an alternative view of the JFET amplifier operation showing the varia Vgs V GSQ -tion of Id with the corresponding change in Vgs & Vds. VDS Note that the CS amplifier is equivalent to the CE amplifier. H. Chan; Mohawk College 79 FET Simplified Equivalent Circuit Transconductance is defined as gm = DID/DVGS (siemens) In ac quantities, gm = Id/Vgs Rearranging the terms, Id = gmVgs D gmVgs G Vgs S r’gs and r’ds are assumed to be very large H. Chan; Mohawk College 80 DC Analysis of Common-Source Amplifier +VDD RD RG RS DC Equivalent circuit If the circuit is biased at midpoint, ID = IDSS/2 Otherwise, solve for ID either graphically or by finding the root of the quadratic equation: I R D S I D I DSS 1 |V | GS ( off ) 2 where VGS has been substituted by IDRS. Then, VDS = VD-VS = VDD-ID(RD+RS) H. Chan; Mohawk College 81 AC Analysis of CS Amplifier Vout Id G Vin RG Vgs gmVgs Rd Since Rin is very high, Vgs = Vin Av = Vout/Vin = -IdRd/Vgs = -gmRd where, Rd = RD//RL Vout = AvVin = -gmRdVin VGS AC equivalent circuit Rin RG // I GSS H. Chan; Mohawk College 82 Common-Source D-MOSFET Amplifier DC analysis is easier +VDD RD C1 C2 Vin RG RL than for a JFET because ID = IDSS at VGS = 0 Once ID is known, VD= VDD - IDRD AC analysis is the same as for JFET Thus, Av = -gmRd H. Chan; Mohawk College 83 Common-Source E-MOSFET Amplifier +VDD C1 R1 RD C2 Vin RL Rs VGS R2 VDD R1 R2 DC analysis: ID = K(VGS -VGS(th))2 VDS = VDD - IDRD AC analysis is same as JFET and D-MOSFET i.e., Av = -gmRd Rin = R1//R2//RINIgate) RIN(gate) = VGS/IGSS H. Chan; Mohawk College 84 Common-Drain Amplifier Rin = RG//RIN(gate) +VDD Vout = IdRs = gmVgsRs, C1 C2 Vin RG RS RL CD amplifier is comparable to the CC amplifier. where Rs= RS//RL Vin = Vgs + IdRs = Vgs+ gmVgsRs = Vgs(1+gmRs) Vout g m Rs Av Vin 1 g m Rs H. Chan; Mohawk College 85 Common-Gate Amplifier +VDD RD Rin = Rin(source)//RS C2 C1 RL Vin RS where Rin(source) = 1/gm Vin = Vgs Vout = IdRd = gmVgsRd where Rd = RD//RL Vout g mVgs Rd Av g m Rd Vin Vgs CG amplifier is comparable to the CB amplifier H. Chan; Mohawk College 86 Amplifier Frequency Response In the previous discussion of amplifiers, XC of the coupling and bypass capacitors was assumed to be 0 W at the signal frequency. Also, the internal transistor capacitances were assumed to be negligible. These capacitances, however, do affect the gain and phase shift of the amplifier over a specified range of input signal frequencies. H. Chan; Mohawk College 87 Effect At Low Frequency Since XC = 1/(2pfC), when f is low (e.g. <10 Hz), XC >>0. The voltage drop across the input and output coupling capacitors become significant, leading to a drop in Av. Also, a phase shift is introduced because the coupling capacitor form a lead (or RC) circuit at the input and the output. At low f, the significant XC across RE (or RS) makes the emitter (or source) no longer at ground potential, again reducing Av. H. Chan; Mohawk College 88 Effect At High Frequency Cbc At high f, Cbe causes a drop in signal voltage due to the voltage divider effect with RS. Cbe Vs Rc At high f, Cbc allows negative feedback from output to cancel Cbc and Cbe are internal the input partially. junction capacitances which are usually a few pF. Av drops in each case. Rs H. Chan; Mohawk College 89 General Frequency Response Curve Av (dB) 3 dB Av (dB) = 20 log Av Cutoff, critical, or Midrange gain fcl f fcu fcl = lower cutoff frequency fcu = upper cutoff frequency Gain is max. at midrange, often referenced as 0 dB. corner frequency is the frequency when Av or Ap drops by 3 dB. This corresponds to 0.707Av(max) or 0.5 Ap(max) (half-power point) respectively. H. Chan; Mohawk College 90 Input RC Circuit At Low Frequency C1 Vin Transistor base Rin = R1//R2//Rin(base) Critical frequency for this circuit is: 1 fc 2p RinC1 Rin X C1 VR(in) leads Vin by: tan Rin Note: At fc, XC1 = Rin, = 45o. 1 90o 45o 0o If Rs of input source is included: fc f 1 fc 2p ( Rs Rin )C1 H. Chan; Mohawk College 91 Output RC Circuit At Low Frequency +VCC RC Critical frequency for the output RC circuit: 1 fc 2p ( RC RL )C3 C3 RL Av (dB) 0.1fc fc 0-3 -20 The phase shift at the output: X C3 1 tan RC RL The effect of the output RC circuit on Av is similar to that of the input RC circuit. f Drop in Av for each RC circuit is 20 dB/decade or 6 dB/octave H. Chan; Mohawk College 92 Bypass RC Circuit At Low Frequency At low frequency, the impedance at the emitter is Ze = RE//XC2, and Av becomes: +VCC RC Rc Av r 'e Z e The critical frequency is: RE C2 1 fc 2p [( r 'e Rth / b ac ) // RE ]C2 where Rth = R1//R2//Rs is the equivalent Thevenin resistance looking from the base toward the input source. H. Chan; Mohawk College 93 Total Low-Frequency Response 0 -20 -40 fc1 fc2 fc3 f fc1, fc2, and fc3 are the critical frequencies of -20 dB/dec the bypass, output and input RC circuits (not -40 dB/dec -60 necessarily in that -80 order). -60 dB/dec -100 The RC circuit giving -120 fc3 is known as the dominant RC circuit. Bode plot of amplifier’s low-frequency response H. Chan; Mohawk College 94 Direct-Coupled Amplifiers Since direct-coupled amplifiers don’t have coupling or bypass capacitors, their frequency response can extend down to dc. Because of this, they are commonly used in linear ICs. Although their gain is not as high as amplifiers with emitter bypass, Av stays constant at lower frequencies. H. Chan; Mohawk College 95 Miller’s Theorem Miller’s theorem can be used to simplify the In analysis of inverting amplifiers at high frequencies. C in the diagram can represent either Cbc of C(|Av|+1) a BJT or Cgd of a FET. H. Chan; Mohawk College C Av Out Equivalent to Av | A | 1 C v | Av | 96 Input RC Circuit At High Frequency Rs Vs R1//R2 Critical frequency: 1 fc 2p RtotCtot Cin(Miller) = Cbc(|Av|+1) Phase shift: Cbe Rtot tan X C ( tot ) 1 where Rtot = Rs//R1//R2//bacr’e ; and Ctot = Cbe+Cin(Miller) H. Chan; Mohawk College 97 Output RC Circuit At High Frequency Critical frequency: 1 fc 2p RcCout( Miller) Rc Phase shift: R c tan XC out( Miller ) | Av | 1) Cout(Miller) 1 Cout( Miller) Cbc | Av | If |Av| 10, Cout(Miller) Cbc H. Chan; Mohawk College 98 Total Amplifier Frequency Response Av (dB) Av(mid) Bandwidth = fcu - fcl 0 fc1 fc2 fc3 fc4 fc5 f fc3 and fc4 are the two dominant critical frequencies where Av is 3 dB below its midrange value. fc3 is the lower cutoff frequency, fcl, and fc4 is the upper cutoff frequency, fcu. H. Chan; Mohawk College 99 Gain-Bandwidth Product Av Av(mid) fT is the frequency at which Av = 1 (unity gain) or 0 dB. BW fcu fT f For a given amplifier, its gain-bandwidth product is a constant when the roll-off is -20 dB/dec. If fcu >> fcl, then BW = fcu - fcl fcu. Unity-gain frequency, fT = Av(mid)BW = Av(mid)fcu . H. Chan; Mohawk College 100 FET Amplifier At Low Frequency +VDD RD C1 1 Input RC circuit: fc 2p RinC1 X tan 1 C1 Rin where Rin = RG // Rin(gaate) C2 Vin RG Output RC circuit: RL 1 fc 2p ( RD RL )C2 XC2 tan Rin(gate) = |VGS / IDSS| RD RL H. Chan; Mohawk College 1 101 FET Amplifier At High Frequency The high frequency analysis of an FET amplifier is very similar to that of a BJT amplifier. The basic differences are the specs of Cgd (= Crss), and the determination of Rin. 1 Input RC circuit: 1 Rs fc ; tan XC 2p Rs Ctot tot where Ctot = Cgs + Cin(Miller); Cin(Miller) = Cgd(|Av|+ 1) Output RC circuit: | Av | 1 R 1 1 d fc ; tan ; Cout( Miller) Cgd XC 2p Rd Cout( Miller) | A | v out ( Miller ) H. Chan; Mohawk College 102 Multistage Amplifiers For an amplifier formed by cascading several stages, the overall bandwidth is: BWtot = f’cu - f’cl If all the stages have the same fcl and fcu, then: f 'cl f cl 21/ n 1 and f 'cu f cu 21/ n 1 If each stage has a different fcl and a different fcu, then f’cl is determined by the stage with the highest fcl , and f’cu is determined by the stage with the lowest fcu. H. Chan; Mohawk College 103 Amplitude vs Frequency Measurement Function generator Vin Av Vout Dual-channel oscilloscope Test setup Procedure: Set sinewave frequency to mid-range and Vout at a convenient reference value (e.g. 1V). Decrease frequency until Vout = 0.707V to get fcl. Increase frequency until Vout = 0.707V to get fcu. Then amplifier’s BW = fcu - fcl. Make sure Vin is constant throughout the measurements. H. Chan; Mohawk College 104 Step Response Measurement Input 90% Output 10% tr Input 90% 10% Output tf Using previous test setup but replacing sinewave with a pulse input, measure the rise time (tr) and fall time (tf) of the output. fcu = 0.35/tr fcl = 0.35/tf H. Chan; Mohawk College 105 Review of Zener Diode Regulator If the zener was ideal, R Vout Vin VZ RL Vout would remain constant regardless of changes in Vin or RL. However, in practice, the zener is limited by its operating parameters IZK, IZM, and ZZ. H. Chan; Mohawk College 106 Line Regulation Line regulation is a measure of the effectiveness of a voltage regulator to maintain the output dc voltage constant despite changes in the supply voltage. DVout Line regulation x100% DVin OR DVout 100 Line regulation x % /V DVin Vout H. Chan; Mohawk College 107 Load Regulation Load regulation is a measure of the ability of a regulator to maintain a constant dc output despite changes in the load current. VNL VFL Load regulation x100% VFL OR VNL VFL 100 Load regulation x % / mA VFL I FL H. Chan; Mohawk College 108 Regulator Block Diagram The essential elements in a series voltage regulator are shown in the block diagram below: Control element VIN Reference voltage Error detector H. Chan; Mohawk College VOUT Sensing circuit 109 Transistor Series Voltage Regulator Q1 The simple zener regulator Vo Vin can be markedly improved R by adding a transistor. RL VL Since VBE = VZ - VL any VZ tendency for VL to decrease or increase will be negated by an increase or decrease in IE. The dc currents for the circuit are: Vin VZ VL VZ VBE IL RL RL ; IR R IL = hFEIB; IZT = IR - IB H. Chan; Mohawk College 110 Series Variable Voltage Regulator Q1 Vo Vin R1 R3 R2 Q2 VZ R4 R5 Q2 detects and amplifies the difference between VZ and sample voltages and adjusts the conduction of Q1 so as to oppose any changes at the output. H. Chan; Mohawk College 111 Short-Circuit Protection Q1 R3 Vin R1 R2 Vo Q3 R4 Q2 R5 VZ I L (max) R6 0.7 R3 The current limiting circuit consists of transistor Q3, and resistor R3. When IL < IL(max), Q3 is off, but if it exceeds IL(max), Q3 turns on,drawing current. away from the base of Q1 making Q1 conducts less which in turn limits the load current to IL(max). H. Chan; Mohawk College 112 Foldback Limiting Q1 R2 Vin R1 Vo Vo Q2 R3 ISC R4 Vo vs IL graph VZ Foldback action starts when VR2 - VR3 0.7 IL(max) IL Note that the short-circuit current, ISC, is < IL(max) to prevent overheating of Q1. H. Chan; Mohawk College 113 Transistor Shunt Voltage Regulator RS Since VBE = VL - VZ, + IL V + any tendency for VL Z Vin V to increase or decrease _ L RL _ will result in a corresponding increase or decrease in IRs. This will oppose any changes in VL because VL = Vin - IRsRS. Vin (VZ VBE ) VL VZ VBE IL ; I Rs RL RL RS IE = IRs - IL = hFEIZT H. Chan; Mohawk College 114 Improved Shunt Regulator RS Vo Vin Q1 VZ Q2 R1 Vo = VZ + VBE1 + VBE2 If Vo tries to decrease, Q2 and Q1 become less conductive. Since less shunt current goes through Q1, more current will go to the load, thus raising Vo. Q2 provides a larger IB1 than the previous circuit so this regulator can handle a larger IL H. Chan; Mohawk College 115 Silicon-Controlled Rectifier SCR is a four-layer pnpn device. Has 3 terminals: anode, cathode, and gate. In off state, it has a very high resistance. In on state, there is a small on (forward) resistance. Applications: motor controls, time-delay circuits, heater controls, phase controls, etc. H. Chan; Mohawk College 116 SCR Anode (A) Gate (G) A A p n p n Cathode (K) Basic Construction Q1 G G K Schematic Symbol H. Chan; Mohawk College Q2 K Equivalent Circuit 117 Turning The SCR On IA +V RA A IA IH0 IH1 IH2 Q1 IB2 IG IB1 Q2 K IK IG2>IG1 IG1>IG0 IG0=0 VF VBR(F2) VBR(F1)VBR(F0) SCR characteristic curves for different IG Values H. Chan; Mohawk College 118 Notes on SCR Turn-On The positive pulse of current at the gate turns on Q2 providing a path for IB1. Q1 then turns on providing more base current for Q2 even after the trigger is removed. Thus, the device stays on (latches). The gate current, IG , controls the value of the forward-breakover voltage: VBR(F) decreases as IG is increased. H. Chan; Mohawk College 119 Half-Wave Power Control IL IP A RL R1 Vin B IL f I L ( AVG) R2 D1 IP (1 cos f ) 2p where f = firing angle Max. f = 90o H. Chan; Mohawk College 120 The Diac and The Triac Both the diac and the triac are types of thyristors that can conduct current in both directions (bilateral). They are four-layer devices. The diac has two terminals, while the triac has a third terminal (gate). The diac is similar to having two parallel Shockley diodes turned in opposite directions. The triac is similar to having two parallel SCRs turned in opposite directions with a common gate. H. Chan; Mohawk College 121 The Diac A1 IF A1 n p n p n -VBR(R) IH VR VF -IH VBR(F) A2 A2 Basic Construction IR Symbol Characteristic Curve H. Chan; Mohawk College 122 Diac Equivalent Circuit A1 R Q3 A1 Q1 Vin A2 Q2 Q4 A2 Current can flow in both directions H. Chan; Mohawk College 123 The Triac A1 A1 A1 Q3 n n p n p n Gate n Q1 G A2 A2 Basic Construction G Q2 Q4 Symbol A2 Equivalent circuit H. Chan; Mohawk College 124 Triac Phase-Control Circuit Trigger Point (adjusted by R1) RL D1 A1 Vin R1 D2 G Trigger Point A2 Voltage Waveform across RL H. Chan; Mohawk College 125 Diac Controlling Triac Triggering A1 A G A2 The rated value of the gate trigger voltage for a triac is often too low for many applications. The above circuit can used to raise the triggering level for the triac. H. Chan; Mohawk College 126