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Multiprocessor systems Objective the multiprocessors’ organization and implementation the shared-memory in multiprocessor static and dynamic connection networks Structure of Multiprocessor systems consists of N processors plus interconnections for passing data and control information among the computers. Up to N different instruction streams can be active concurrently. The challenge is to put the N processors to work on different parts of a computation, Structure of MIMD The fastest supercomputer located in the Alberta National Laboratory in United States. This computer is equivalent to 9000 Pentium processors can handle 21,000x10^8 instructions per second. Terminology PE-to-PE Each processor has its own memory and uses a common bus for intercommunication. CRAY T3D Number of Processors 128 Performance per PE 150 GB Memory (64 MB each PE) Harddisk 80 MFlops / PE Main Memory 8 Processor Elements (PEs) GB temporary disk space Swap area 35 GB permanent user disk space PE-to-PE SIMD machine configuration Same as an array computer. The local memory is attached to its own processor with an interconnection network for exchanging data. The number of arithmetic processors is equal to the number of memory storages. PE to PE SIMD Processor-to-memory with N processors and N memories The Processor-to-memory parallel machine with N processors and N memories Same as an array computer without a control unit. The local memory is separated from its own processor and they are linked up by an interconnection network. PE to Memory Difference between Multi-processors MSIMD It is called multiple-SIMD which can be reconfigured into a number of smaller independent SIMD machines Partitionable SIMD/MIMD be partitioned into smaller independent machines of different sizes working in SIMD or MIMD Simple Uni-processor Memory access Access to memory may be blocked temporarily due to the conflicts in the network or the accessed memory module. Three methods to solve memory access Buffer network elements To queue a request in the buffer when a conflict occurs. Deletion The processors will delete all but one of the conflicting requests Either of the about schemes reduces CPU performance. Multiprocessor interconnection networks A basic parallel processing system consists of various processors to be linked up by an interconnection network to form interprocess communication. Example of static network topologies The processors are predefined with connection paths. Classified as one-dimensional such as Linear Array, twodimensional such as Ring, Star, Tree, etc. Static network (fixed) Two-way switching box A dynamic network allows processors to re-route the path (That is why it is called dynamic). The single-stage network is also called a recirculating network. Switching box 4x4 switching network (Blocking) Non-Blocking Network A non-blocking networking has its ability to connect any input to output Example is a cross-bar. Cross bar Summary introduced multiprocessors with N processors and M (or N) memory storages. Interconnected by a network which can be dynamic or static. Dynamic network can be classified as a blocking or non-blocking network. Blocking network can be implemented through switching boxes while non-blocking network can be implemented by a cross-bar network.