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Transcript
Experiment 4 Binary Adder, Substracter and Comparator Objectives -Use the Adder IC’s to perform Addition and Subtraction -Design a simple comparator -Use the IC to perform the Comparison References Donald P.Leach : Experimental in Digital Principles, 3rd Edition Malvino/Leach : Digital Principles and Applications Bartee : Digital Computer Fundamentals, 6th Edition John F. Wakerley : Digital Design , Principle and Practice, 2nd Edition Ronald A Reis : Digital Electronics Through Project Analysis, 1st Edition Components 1-74LS04 Hex inverter TTL IC 1-74LS08 Quad AND gates TTL IC 1-74LS32 Quad OR gates TTL IC 2-74LS83 4 bit Binary Full Adder TTL IC 1-74LS85 4 bit magnitude comparator TTL IC 2-74LS86 Quad-two input XOR TTL IC Introduction You have seen in experiment 2 an application of the XOR gate where you have designed a Half Adder and a Full Adder. In this experiment you will use 4 bit Adder IC to perform both addition and subtraction (by using 2’s Complement method). 1) For addition: There are 5 basic rules to remember which are: 0+0=0 0+1=1 1+0=1 1+1=10 (one plus one = one+ zero =zero carry 1) 1+1+1=11(one plus one plus one = one carry 1) 1|Page 2) For Subtraction: There are 4 basic rules to remember which are: 0-0=0 1-0=1 1-1=0 10-1=1 A Binary Adder/ Substracter The circuit in fig 5.1 is an 8 bit binary Adder/Subtracter, it is constructed by cascading two 74LS83 (4 bit binary adder) in which the carry out of the first IC (low order) is connected to the carry in of the second IC (high order). Figure 4.1 For the subtraction operation, it is important to remember that the circuit never actually subtracts, it only adds. But by creating the 2’s complement of a subtrahend before adding it to then minuend, the circuit solves subtraction problems. When the Sub Line is LOW, the circuit acts as an ordinary binary adder. This is because with one low on each XOR gate, each gate passes the B input unchanged. When the sub line HIGH, a 2’s complement of the number on B inputs (subtrahend ) (formed by the XOR gates and the carry in HIGH) is passed on the full adders. 2|Page The output of the operation is on the form of the magnitude and sign bit. The seven least significant bits represent the magnitude of the operation, and the eighth significant bit (MSB) represent the sign bit or carry. If a carry out(1) is generated out of the MSB, the number is positive and in true form. If a carry out is not generated(0), the number is negative and is the 2’s complement of the magnitude. Thus the carry bit tells us whether the number is positive or negative. With this practical circuit, the largest number that can be output is +127, since the eighth place digit is reserved for the sign bit. MAGNITUDE COMPARATOR The 74LS85 is a 4 Bit magnitude comparator that compare two 4 bit words A and B and can generate an output in the form of : • A EQUALS B, (A=B) • A GREATER than B (A>B), • A SMALLER than B (A<B) The data inputs is from pins A3 A2 A1 A0 and B3 B2 B1B0 . If they are equal, the output on pin 6 goes HIGH ( pin 5 and 7 stay LOW). If the A inputs is greater than the B inputs, the output on pin 5 goes HIGH (pin 6 and & stay LOW) . If the A input is less than the B inputs, the output on pin 7 goes HIGH (pin 5 and 6 stay LOW). Procedure 1) Connect the Adder/ Subtracter circuit shown in fig 5.Verify the circuit for proper operation by performing 4 binary additions and 4 binary subtractions. 2) Design Adder/Substracter circuit for 8 bit. No need to verify experimentally. 3) Design and implement circuits that can act as comparator for A and B using basic gates. Verify them for proper operation by comparing two-two bit numbers A1 A0 and B1 B0 . Explain their operation. 3|Page Figure 4.2 4) Implement a 4 bit magnitude comparator by using the 74 LS 85 IC. Verify them for proper operation by comparing 4 bits addition and 4 bits subtraction. 5) Design an 8-bit magnitude comparator by using 74LS85 IC. (students are not required to verify design experimentally). 4|Page Pin connection diagram 74LS04 hex-inverter (NOT) TTL IC 74LS08 Quad-two input AND TTL IC 5|Page 74LS32 Quad-two input OR TTL IC 74LS86 exclusive OR (X-OR) TTL IC 6|Page 74LS83 4 bit Binary Full Adder TTL IC 74LS85 4 bit magnitude comparator TTL IC 7|Page