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International Journal of Electrical & Computer Sciences IJECS-IJENS Vol:15 No:04
1
A Dual-Band, Multi-standard, Concurrent LNA
Using a Dual-Resonant Matching Network
Ahmed M. Gamal, Hesham N. Ahmed, Magdy A. El-kfafy

Abstract— In this paper, a dual-band, multi-standard,
concurrent, low noise amplifier operating in the 2.45/5.25 GHz
bands is presented. The amplifier design is based on an ultra low
noise PHEMT transistor connected in the common source
configuration with inductive degeneration. The proposed
amplifier stability is ensured using a series gate resistor and small
inductive source degeneration in the form of etched transmission
lines on the substrate. To enhance the fractional bandwidth, a
capacitor is inserted between the gate and source terminals
allowing fractional bandwidths of 52% and 15% at the lower and
higher bands, respectively. The amplifier provides a voltage gain
of 13.1 and 9.3 dB while achieving a corresponding noise figure of
2.4 and 2.1 dB at the lower and higher bands, respectively.
Index Term— concurrent LNA, frequency transformations,
multi-band, common-source LNA, input matching network.
I. INTRODUCTION
THE emergence of new standards and protocols in wireless
communications has led to the design of communication
systems with more flexibility. Since frequency redesign is
inexpensive, time-consuming and inconvenient to the end
users, wireless system manufacturers are constantly showing
interest in building multi-band/multi-standard radios in an
attempt to support a wide range of applications on a single
radio; this implies the capability to operate over much wider
band of frequencies than are supported in conventional radio
architectures. In order to minimize the circuit area and power
consumption and increase production feasibility, new design
approaches that incorporate various wireless standards with
maximum hardware sharing are required. Thus, the need for
multi-standard, multiband radio frontends has recently
absorbed a large portion of research. Several design techniques
have been published towards that end. Research work has
culminated in three major architectures namely narrowband
(reconfigurable), wideband and concurrent frontends [1]-[2].
Ahmed M. Gamal is a Masters student, Elect. Eng. Dept., Military Technical
College, Cairo, Egypt (e-mail: [email protected]).
Hesham N. Ahmed, PhD Electrical Engineering, Chair of Elect. Eng. Dept.,
Military Technical College, Cairo, Egypt (e-mail: [email protected]).
Magdy A. El-kfafy, Associate Professor, Elect. Eng. Dept., Military Technical
College, Cairo, Egypt.
The first component of any wireless receiver front-end is
the low noise amplifier LNA. Several LNA topologies have
been reported in the literature; the most widely used is the
inductive source degenerated LNA topology. This topology
provides good tradeoff between gain, linearity and noise
performance [1], [2]. However it operates in a narrow band
frequency of interest [1], [3]
In this work, a hybrid inductive source degenerated
concurrent multi-standard, dual-band low noise amplifier
operating in 2.45 GHz and 5.25 GHz is introduced. The paper
is organized into 5 sections. An introduction is presented in
section I. Section II reviews the current available multiband
receiver architectures. The design methodology of the
proposed concurrent multiband LNA is discussed in section
III. Simulation & measurement results are presented in section
IV. Finally, section V concludes the work.
II. MULTIBAND RECEIVER ARCHITECTURES
Narrowband frontends are the most straightforward way to
implement an LNA for multi-band operation. A dedicated
signal path for each frequency band of interest is required,
with one path selected at a time, depending on the band of
interest. A narrowband receiver frontend provides frequency
selectivity, superior linearity, excellent return loss and noise
figure and is immune to out-of-band interference with less
power consumption (each receiver path is optimized to operate
for a specific band). As the number of bands increase, the
number of required band pass filter BPF/LNA pairs increase
which eventually leads to larger chip area to handle the ever
increasing number of communication bands and a higher cost
[3],[4]. Therefore to mitigate these disadvantages, some
hardware sharing among different frequency bands is required.
Wideband Frontends allow concurrent reception of more
than one standard. This is not an optimum approach to meet the
regulatory requirements of each standard [5]. Furthermore, due
to the very wide band of operation, odd- and even-order intermodulation products of the desired frequency may fall onto
other desired frequencies.
Concurrent frontends allow simultaneous operation at
multiple frequency bands at any given time without using any
multiband switch or diplexer since simultaneous reception at
multibands is desired [1], [8]-[10]. This architecture eliminates
an extra antenna, a front-end filter, an LNA, and a pair of highfrequency mixers, which in turn results in power, footprint, and
area savings. At the same time, large image rejection in excess
of that of the single-sideband receiver is achieved through
diligent frequency planning and proper usage of stop-band
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International Journal of Electrical & Computer Sciences IJECS-IJENS Vol:15 No:04
attenuation. Concurrent LNAs also provide higher data rate,
more functionality, system robustness, and performance
improvement [1]. Concurrent LNAs are advantageous over
other multi- band LNAs. Compared with reconfigurable LNAs,
concurrent LNAs can save the power consumption and reduce
module/chip area by using only one driver for all frequency
bands of interest. On the other hand, they offer better sensitivity
if compared to wide-band LNAs, where strong unwanted
blockers are amplified together with the desired frequency
bands and significantly degrade the receiver sensitivity.
2
VDD
2
Cres
Cn
2
1n
Ln
Lres
1
1
Cout
Cp
RFin
1n
1
Lp
Ls
1
Cs
2
10uH
2
RFout
1n
FET1
1n
Cg
1
10uH
1n
Ldeg
2
0
III. DESIGN OF PROPOSED CONCURRENT LNA
In a single-band LNA, passive networks are used to shape
the response of the wide-band transconductance of the active
device in the frequency domain to achieve matching and gain at
the frequency of interest. This concept can be generalized to
multiple frequency bands noting that the intrinsic
transconductance of the active device is inherently wide-band
and can be used at multiple frequencies, simultaneously. This
concept is adopted in the proposed LNA design that supports
concurrent amplification at the 2.45 and 5.25 GHz frequency
bands. A simplified schematic of the designed LNA is shown
in Fig.1. Common-Source topology produces a low-noise
configuration, and renders itself as an appropriate soltution for
multiband purposes; however, as the number of frequency
bands exceeds one, an inductor must be added to the input
matching network for every additional band, which increases
the circuit die area significantly.
A. Design of Dual-Band Input matching network
A technique for the synthesis of lumped element multiband matching networks using frequency transformations is
proposed in [6]. Synthesis of multi-band matching networks is
similar to that of a multi-cut-off frequency filter. One-to-many
mapping of frequencies will transform a single-band matching
network to a multi-band matching network. This single
frequency to multi-frequency mapping technique can be ready
applied to LNA design and is thus adopted in the current work.
The first step in such process is to choose a suitable type of
transformation based on the type of load, assuming the trace of
the load impedance follows a constant conductance circle. The
frequency transformation is given by,
Fig. 1. Schematic of proposed dual-band LNA (without bias details).
(2)
Where t can be any of the frequencies {±ωi}. This implies
that {±ωi} are the roots of the following polynomial in t ,
(3)
It can be shown the roots of (3) will be,
∑
∏
(4)
The input impedance of an inductively degenerated LNA,
shown in Fig. 2(a) can be equivalently represented by a series
RLC network as shown in Fig. 2(b). Generally, degeneration
inductance values are chosen such that ωTLS = 50Ω.
Ls
1
FET
2
1
Zin
R
1k
Zin
Ls
0
2
0
(a)
(b)
11
1
Lg
21
Ls
2
Lg
Lg
Cgs
2 2
1
ωt , n and ai (i = 2 to n) are mapped/transformed frequency,
number of bands and transformation parameters, respectively.
In design of a multi-band matching network at n
frequencies, the matching frequencies must first be sorted in a
descending order, ω1> ω2 > ….> ωn, where {ωi} are the
matching frequencies. A prototype matching network has to be
designed with a matching frequency ωm, such that after
frequency transformation, ωm will map to {±ωi}, thus,
L1 Ls
1
2
Cgs
2
Cgs
C1
Cs
R
1k
Zin
R
1k
Zin
0
(1)
Cgs
(c)
0
(d)
Fig. 2. (a) Input of a typical common source LNA (b) its small signal model
(c) Single frequency matching and (d) Dual-frequency matching using a series
RC load transformation.
An inductor Lg is added at the gate which along with Ls
can tune out the capacitance Cgs at the frequency of interest, as
shown in Fig. 2(c). A capacitor between the source and gate is
used to increase the bandwidth of the lower band, with a net
capacitance of Ceq. Neglecting the small value of source
inductor Ls, Fig. 2(b), the load of the matching network will be
a series-RC network. So the frequency transformation for a
series-RC load will be used. From (1), the second-order seriesRC network transformation and the corresponding polynomial
are given by,
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R
1k
0
International Journal of Electrical & Computer Sciences IJECS-IJENS Vol:15 No:04
(5)
(6)
Equation (6) has two roots, a positive root ω1 and a
negative root ω2, given by 1=2π×2.45×109, 2=2π×5.25×109,
a2=(-1/ 1. 2)=-1.969×10-21 and ωm=(1/a2 1 2)= 2π×4.59×109.
Neglecting Ls, the value of the gate inductor Lg is obtained
using the relation,
√
3
(16)
The value of LresCres is found out from the equation,
(17)
Equation (14) can be rewritten as,
(18)
(7)
Inductor L1 can be obtained by transforming capacitor Ceq as
follows,
(8)
Capacitor C1 can be obtained by transforming the admittance
Lg as follows,
(9)
B. Design of Dual-Band Output Resonance Network
Neglecting the effect of output series capacitance Cout,
expression of impedance of output concurrent load is given by,
Finding out the numerical value of the third term in (18), and
with the knowledge of Ln, Cres can be calculated. Accordingly,
Lres can be readily found.
C. Amplifier Noise Performance
For optimum noise performance of an LNA, it is necessary
to achieve a noise match at the input at the frequency(ies) of
interest. To minimize the NF of the amplifier of Fig. 1, the
passive input matching network should be designed to satisfy
[1] at the multiple frequencies
of interest. This can only be achieved using lossless passive
components. Therefore, in practice, one should minimize
, to its smallest real part Rmin. Having satisfied
the above condition, the input impedance will be,
(19)
(10)
The characteristic equation involving frequency ( ), is:
(11)
Where gm, Zgs, and
are the transconductance, gate–source
impedance and source impedance, respectively. It is clear that
the source inductors affect the noise matching and as the source
inductors increase, the noise figure will increase.
A series resistor is used to improve the stability of the
proposed LNA. Since this resistor appears in series with ωTLS,
it adds to the amplifier noise figure according to equation (19).
For optimal matching, the following condition is to be satisfied
(12)
The roots of equation (11) are given by,
√
√
(13)
IV. SIMULATION / MEASUREMENT RESULTS
The design is based on the ultra low noise PHEMT
transistor ATF-34143 from Avago Corporation and is
implemented on Rogers RT/duroid 6010M, 25mil thickness
substrate with a dielectric loss tangent of 0.0023. The circuit is
biased using a Vdd of 4V and sinks 60mA of current. Fig. 3
shows the fabricated LNA board. Small signal measurements
were done using HP 8510C vector network analyzer.
In summary, the input parameters of the design are the two
resonant frequencies ω1, ω2 and the series capacitance Cn from
(10). Based on (11), two variables (S) and (P) are defined as,
(14)
(15)
Fig. 3. Fabricated dual band, multi-standard LNA.
If the values of Cn and ωn are given, Ln can be obtained since,
Fig. 4 and Fig. 5 show the simulated (solid lines) and
measured (dashed lines) results of the small signal input return
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International Journal of Electrical & Computer Sciences IJECS-IJENS Vol:15 No:04
loss and gain in the frequency range from 500 MHz to 6 GHz,
respectively. Both simulation and measurement results are
found to be close to each other except for some deviation in the
S11 results. As shown in Fig. 4, an input return loss of 14.7 and
13.3 could be achieved at 2.45 and 5.25 GHz, respectively. A
measured small signal gain of 13.1 and 9.3-dB at the lower and
higher bands, respectively as shown in Fig. 5.
4
Fig. 6. Designed LNA noise figure NF (solid line) vs minimum noise figure
NFmin (dashed line)
Table I summarizes and compares the measured results of
this work versus recently published concurrent multi-band
LNAs. As can be seen, this work features a high fractional
bandwidth and the lowest noise figure.
TABLE I
PERFORMANCE COMPARISON WITH RECENTLY PUBLISHED WORK
Ref.
[8]
[9]
[3]
[4]
[10]
Fig. 4. Simulated (solid line) vs measured (dashed line) of S11.
Fig. 5. Simulated (solid line) vs measured (dashed line) of S21.
Fig. 6 shows the simulated noise figure NF together with
the theoretical minimum noise figure, NFmin , of the designed
LNA. Although the noise figure is not perfectly low due to
compromise between the stability and noise figure, still a good
noise matching can be achieved at the desired bands
culminating in a NF of 2.4 and 2.1 dB at the lower and higher
bands, respectively.
This
work
Frequency
(GHz)
S11
(dB)
[3]S21
(dB)
NF
(dB)
2.4
5.7
2.45
-9.48
-6.2
-14.4
7.6
8.6
13.9
5.25
-12.4
2.4
5.2
2.4
5.2
2.45
-10.1
-11
-14.2
-13.1
-12.6
IIP3
BW
[%]
5.66
6.8
4.98
(dBm)
-18
-20
0
N/A
N/A
N/A
8.7
6.58
5.6
N/A
10.1
10.9
10
11.4
9.4
2.9
3.7
2.9
2.6
2.8
-8
-8
-18
-13
-4.3
N/A
N/A
N/A
N/A
N/A
6.0
-21
18.9
3.8
-5.6
N/A
2.45
-14.7
13.1
2.4
-20
52
5.25
-13.3
9.3
2.1
-22
15
Technology
0.18µm
CMOS
0.18µm
SiGe BiCMOS
0.18µm
CMOS
0.18µm
CMOS
Cascade
0.13µm
CMOS
Single
P-HEMT
Transistor
V. CONCLUSION
In this paper, a concurrent, dual-band, multi-standard,
LNA has been designed using a single ultra low noise PHEMT
transistor. The designed LNA is capable of simultaneous
operation at 2.45 and 5.25 GHz. A small signal gain of 13.1 and
9.3 dB is achieved at the lower and higher bands, respectively.
A low noise figure of 2.4 and 2.1 dB is possible at 2.45 and
5.25 GHz, respectively. Due to its high fractional 52% (1560 to
2660 MHz) in the lower band and 15% (4570 to 5330 MHz) in
the higher band, it renders itself as a good candidate for
application in various wireless standards {GSM1800, DECT
radio equipment, WDTS, Wi-Fi, Bluetooth, and WIMAXIEEE802.16}.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
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International Journal of Electrical & Computer Sciences IJECS-IJENS Vol:15 No:04
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[8]
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