Download Your first choice for Smart Grids

The specialist in intelligent power systems
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Your first choice for Smart Grids
ETIP
®
Energy Technology Intellectual Property
www.sgcms.de
www.entesys.de
www.sgcms.de
The specialist in intelligent power systems
ETIP - Blocksets for Development of
FPGA-based Smart Grid Systems
Introduction
By the use of renewable energies and the decentralization
of electricity generators a dramatical change in electrical
energy grids is taking place. This leads to a new supply
system layout covered under the transition goal called
Smart Grids. In Smart Grids new system requirements for
automation, communication and power quality are provided and have to be fulfilled. The major challenge is to
establish a dynamic control function like primary and
secondary controller of conventional power plants and
grids from the TSO level into the low and medium voltage
grid level (DSO level). These kinds of functionalities must
be implemented into the power electronic inverters and
into the control function of decentralized synchronous
generators as well. Additionally, the automation system for
the DSO level has to be adapted to these new requirements. The substation automation must be fitted into
these new grid control functionalities. Therefore the
demand for new Smart Grid orientated solutions which are
flexible, adaptive, sustainable and cost effective are
obvious.
3~
FPGA-based Control Platform
ETIP Collection
3~
E
SGAU
Intelligent Substation
www.sgcms.de
Distribution Grid
E E
Power Quality Blockset
Target oriented
AbstracƟon
Problem Statement
VeriĮcaƟon
ETIP
ValidaƟon
Design Flow
Target Hardware
Quartus II
VeriĮcaƟon
FPGA Plaƞorm
E
VeriĮcaƟon
50
E
E
kW
3~
=
Prosumer (Producer & Consumer)
www.entesys.de
Altera DSP Builder
Blockset
E
E
SGAU
Math. Model
(Matlab/Simulink)
Target hardware
oriented Modeling
VHDL Synthesis
E
E
SimulaƟon
VeriĮcaƟon
Phenomenological
DescripƟon
VeriĮcaƟon
System
SpeciĮcaƟon
E
=
Grid Code Blockset
Development benefits
• System optimization in early development state
• High development quality and transparency in TQM
• High time and cost effectivity related to complexity of
Smart Grid functions
• Reduction of the development risk in regard of the
complexity of the target application
• Reduction of development effort via automatic code
generation
As a specialist for intelligent software solutions for smart
grids, EnTeSys develops FPGA-based IP Cores for power
system components. These Energy Technology IP Blocksets ETIP offer a platform for simple, fast and flexible
FPGA based development for electronic devices in Smart
System applications. The modular ETIP Blocksets are
consequently designed related to the requirements of
Smart Grids. ETIP Blocksets cover the different types of
feeding modes and grid code from the TSO and DSO side.
In terms of communication IP Cores for standard ITC
technologies via Ethernet and fieldbuses are available
(TCP/IP, EtherCAT, etc.). The ETIP Blocksets philosophy
offers a wide range of application fields in Smart Grid
devices. Starting from power electronic inverters, substation automation systems up to a direct PLC integration. The
ETIP Blocksets cover all basic and major Smart Grid
control and automation functionalities. The figure below
shows in principle the wide application range of ETIP
-based systems graphically.
SGAU
Advanced Blockset
ETIP - Model based Design Flow
ETIP - Energy Technology IP
E
Basic Blockset
Basic Blockset
Basic funtions for power electronics inverters (symmetrical)
Feeding modes for interconnected and isolated Grids
Advanced Blockset
Advanced functions for power electronics inverters (unsymmetrical)
Feeding modes for interconnected and isolated Grids
(unsymmetrical)
Grid Code Blockset
Grid Code / Fault Right Though Functions for grid tied inverters
Power Quality Blockset
Power Quality Measurement DIN EN standards. Methods for Voltage
quality measurement according to EN standards and more.
EnTeSys develops and offers innovative technologies to
advance the integration of distributed, renewable power
supply systems. The focus is on how these decentralized
systems can coexist with conventional power plants.
EnTeSys developed a strategy to fulfill the complex requirements which electric energy supply systems of the
future will have.
E
Lf
=
EnTeSys – Mission and
Vision
E
Local Grid
Inverter
=
E
=
ETIP
www.sgcms.de
The specialist in intelligent power systems
ETIP - Smart Grid Inverter Starter Kit
Including power electronic and programmable FPGA-based controller-board
The developed ETIP Blocksets can be used to run the Smart Grid Inverter Starter Kit in combination with the FPGA development
Platform SnakeBytes from the company devboards GmbH. This combination of Hardware and ETIP Software components gives a fast
ure requirements.
entry into inverter technology for present and future
ETIP – Smart Grid Inverter
• Modul-Power: up to 25 kVA
• DC-Voltage: max 800 V (intermediate circuit)
• AC-Voltage: 3 * 400 V
• Current / Phase max 36 A
• 3Leg-4Wire Topology
• 2 Level Inverter
Tough 19“ rack design
Photos can differ from the original
Easy and fast to connect
using HARTING Industrial Connector Han®
ETIP - Smart Grid Inverter FPGA Development Platform based on devboards SnakeByte
The DBF3C120 is the second baseboard of a flexible development board family based on the Altera FPGAs. The baseboard is
equipped with all the necessary functions to run the FPGA like power supply, clocking, reset generation and configuration
device. All the I/O pins are connected to DBF-Slots. The DBF3C120 board is equipped with 7 DBF-Slots and a PCI-Interface.
• EP3C120F780C7N ALTERA FPGA
• EPCS64 configuration device
• 4 power supplies for 1.2V core voltage, 2.5V and 3.3V I/O voltage
• custom specific voltage
• 7 I/O-Bank regulators for VCCIO
• 4 LEDs and 4 buttons
FPGA Developement Platform
• JTAG-Interface
• Clock distribution
• 7 DBF-Slots for I/O and memory expansion
• PCI-Interface for 32bit / 66MHz PCI
• Dimension: 170x106mm²
• Tyco industrial power connector
ADD ON-Cards
Measurement signals
g
12V I/O
3xEthernet
3xEt
3x
E hern
net Phy
Phy connector
con
onne
necto
ccommunication
co
omm
mmun
uni
un
nic
icat
ati
tio
ion
ion
SSD
DR
RA
AM
SDRAM
EtherCAT® is registered trademark and patented technology,
licensed by Beckhoff Automation GmbH, Germany.
H
SnakeByte DBF3C120 from devboards GmbH
www.entesys.de
SDRAM
www.sgcms.de
FalconEye signal interface
www.entesys.de
The specialist in intelligent power systems
ETIP - Smart Grid Inverter Starter Kit - 2 level inverter consisting of a 3Leg-4Wire topology
System Parameter
• Bidirectional Inverter
• Modul-Power: up to 25 kVA
• DC-Voltage: max 800 V (intermediate circuit)
• AC-Voltage: 400 VLL
• Current / Phase up to 36 A
The 3Leg-4Wire topology supports
unsymmetrical load situations.
The two level inverter has a very low THD.
Fast integration in Automation Systems
Further, this scalable power electronics with the real-time
communication EtherCAT can be used in conjunction
with a standard IEC61131-PLC. Thus, in addition there is
the possibility to involve all the advantages of industrial
automation components in the plant management. This
provides the most flexible inverter platform which can be
adapted to complex and unusual tasks.
IEC61131-based Automation Platform (EtherCAT® Master)
Smart Grid Inverter Starter Kit SGISK2510a
Lf
Ci
Grid
=
3~
Cf
FPGA-based Control Platform (EtherCAT® Slave)
Other Actors and Sensors (EtherCAT® Slave‘s)
www.sgcms.de
www.entesys.de
www.sgcms.de
The specialist in intelligent power systems
ETIP Basic and Advanced Blockset
ETIP - Grid Code Blockset
The developed ETIP Cores (Energy Technology Intellectual
Property) represent control functions blocksets for power
electronic converter, inverter based on FPGA. The Cores provide the possibility to control one or three phase inverters in
each feeding mode.
Dynamic Grid Support: Fault Ride Through
Boundary Line 1
V_pu
Boundary Line 2
1
0.9
0.7
Inverter Feeding Modes
at Grid Side
0.3
ECS Driven Feeding
Disconnecting from Grid
Grid Driven Feeding
0 150
700
1.500
3.000
t [ms]
[The BDEW guideline “Generating Plants in the Medium-Voltage Grid"]
Grid Forming
Grid Parallel
Grid SƵƉƉŽƌƟŶŐ
Supply of reactive current during voltage deviation
Symmetrical
Asymmetrical
Symmetrical
Asymmetrical
Symmetrical
Asymmetrical
Q/Pr
II
[Department of Electrical Power Supply, University of Applied Science Soest]
I
underexcited
underexcited
Based on:
0.48
/ MATLAB® Simulink®
Basic Blocks:
PI-Controller, Sin/Cos Generator, Pulse Width Modulator
-1.0
1.0
-0.2
P/Pr
-0.48
Transformation Blocks:
Clarke & Park transformation, band pass, symmetrical
components, etc.
III
IV
overexcited
overexcited
[VDE-AR-N 4105:2011-08]
Space Vector Modulator (SVM) Blocks:
SVM for several one and three phase inverter topologies
Active power reduction
ǻP
Phase Locked Loop (PLL) Blocks:
PLLs for one and three phase signals
50.05 Hz
ǻP = 40% PM
per Hz
10%
Inverter Control Blocks:
Control algorithms for different feeding modes and
different inverter topologies
fgrid
50.2 Hz
20%
[VDN TransmissionCode 2007]
ETIP Power Quality Blockset
Voltage and Current Measurement:
RMS values over different periods (10 periods, 150 periods, 10
min, 2h) Indication by voltage deviation (voltage drops, gaps
or over voltage).
EN 61000-4-30, 2009 - Method for voltage quality
measurement. Testing and measurement techniques Power quality measurement methods.
EN 61000-4-7, 2011 - Testing and measurement
techniques - General guide on harmonics and interharmonics measurements and instrumentation , for power
supply systems and equipment connected thereto.
EN 61000-4-15, 2011 - Testing and measurement
techniques - Flickermeter - Functional and design specifications.
Voltage
Power Measurement:
Measurement of active, reactive and apparent power over 10
periods Measurement of power factor cos(M).
FFT Analysis:
Harmonics, THD, intermediate harmonics over 10 periods
t 10 min Interval
t 10 Periods
t 10 Periods
t 10 Periods
0
t 10 Periods
10 min
www.sgcms.de
t 10 Periods
t
Flicker:
Short time and long-time flicker, flicker level
Asymmetry:
Asymmetry of a three phase system
www.entesys.de
www.sgcms.de
The specialist in intelligent power systems
ETIP MATLAB® Simulink® Blocksets
ETIP Basic Blockset
1
NorŵalŝzaƟoŶ_1_SŝŐŶal
9
PI_CoŶƚroller
2
NorŵalŝzaƟoŶ_3_SŝŐŶal
10
UI_ƚo_PQ
3
UVW_ƚo_AlphaBeƚa
11
PLL_1Phase
4
AlphaBeƚa_ƚo_dq
12
PLL_3Phase
5
dq_ƚo_AlphaBeƚa
13
SVD_FB
6
AlphaBeƚa_ƚo_Uacƚ_s
14
SVD_HB
7
PT1
15
SVD_3L3W
16
PWD (as VHDL)
8
SŝŶ_Cos_GeŶeraƚor
ETIP Advanced Blockset
1
UVW_ƚo_AlphaBeƚa_LL
6
SVD_3L4W
2
UV_ƚo_AlphaBeƚa_LL
7
SVD_4L4W
3
UV_ƚo_AlphaBeƚa
8
SLJŵŵ_Coŵp
4
U_ƚo_AlphaBeƚa
9
PLL_DDSRF_3Phase
5
U_ƚo_AlphaBeƚa_50Hz
ETIP Grid Code Blockset
1
Faulƚ_Rŝde_ThrouŐh
-4
2
SƚaƟc_Grŝd_Supporƚ
5
cosPhŝ_seƚ
3
ReacƟve_CurreŶƚ
Pacƚ_Qseƚ
ETIP Power Quality Blockset
1
FrequeŶcLJ_DeasureŵeŶƚ
5
VolƚaŐe_AsLJŵŵeƚrLJ
2
OvervolƚaŐe_Drop_Gap
6
HarŵoŶŝc_DeasureŵeŶƚ
3
VolƚaŐe_CurreŶƚ_DeasureŵeŶƚ
7
Power_DeasureŵeŶƚ
4
Flŝcker
Through a close cooperation with the department of Electrical Power Supply of the
University of Applied Science Soest, we have a competent partner with many years of
experience to the side for the development of technical innovations.
© 2013 MathWorks, Inc.
MATLAB® and Simulink® are registered trademarks of MathWorks, Inc. See
www.mathworks.com/trademarks for a list of additional trademarks. Other
product or brand names may be trademarks or registered trademarks of
their respective holders.
© 1995-2013 Altera Corporation. All Rights Reserved. The DSP Builder library
shortens DSP design cycles by helping users create the hardware representation of a DSP design in an algorithm-friendly development environment.
Altera Corporation - www.altera.com 101 Innovation Drive, San Jose, CA
95134, UNITED STATES Tel: 408-544-7000, Fax: 408-544-6424, E-mail:
[email protected]
MATLAB®, the language of technical computing, is a programming environment for algorithm development, data analysis, visualization, and numeric
computation. Simulink is a graphical environment for simulation and
Model-Based Design for multidomain dynamic and embedded systems.
Telefon: +49 (0) 29 21 / 35 49 39 1
Telefax: +49 (0) 29 21 / 35 49 39 19
E-Mail: [email protected]
Internet: www.entesys.de
EnTeSys GmbH
Ulricherstr. 26-28
59494 Soest, Germany
www.entesys.de
Managing Director: Dipl.-Ing. (FH) Stephan Heger
Register Court: Amtsgericht Arnsberg
Company Registration Number: HRB 9462
www.sgcms.de
www.entesys.de