Download dolby digital™ decoder and digital amplifier technical report

!
TRANSMITTAL MEMO
To: Joe Benge
Alan Duncan
Mel Dundas
Godfried Pimlott
From: Yoon Cho
Joe Huntley
Greg Nuttall
Bryan Olson
Derek Richardson
Date: March 18, 2002
Subject: Dolby Digital Decoder/
Power Amplifier
Please accept the enclosed report entitled "Dolby Digital Decoder/Power
Amplifier".
The design and implementation of a Dolby Digital Decoder/Power
Amplifier is complete and within the eleven week time-frame. The audio
system is low-noise and produces an accurate representation of the audio
input source.
The report contains sufficient information for implementing a Dolby Digital
Decoder/Power Amplifier. Sections of interest include
♦ The process of digital amplification
♦ The input interface
♦ Software user functions
It is recommended to future designers of this audio system to become
familiar with digital audio formats including S/PDIF (Sony Phillips Digital
Interface) and I2S (Inter-IC Sound bus). The designers should also pay
particular attention to PCB layout as any audio system is subject to
external noise interference.
Comelex Tech. would like to thank the Electronics Department for the
purchasing and delivery of parts, Alan Duncan as project team leader and
Bob Hughes at Tech-Trek for supplying the complete SAA2505H
application note.
EXECUTIVE SUMMARY
The Dolby Digital Receiver/Amplifier (DDA) is designed to decode
Dolby Digital encoded audio data and PCM audio data. The user can
enjoy the benefits of a 5.1 surround sound system, or a simple 2-speaker
stereo system. This is a unique design in that the audio signal never goes
through the process of Digital-to-Analog (D/A) or Analog-to-Digital (A/D)
conversion employed by most home audio receivers today. The result of
keeping the signal digital is a pure, unaltered audio signal, unchanged
from it’s original recorded form.
This document outlines the method used to design the DDA, from
concept to prototype. The process of decoding and amplifying the audio
signal from the receiver to the amplifiers is explained in detail. In addition
to the decoding and amplification system, the system control techniques
and power supply design and fabrication are also described.
This project was completed in accordance with the requirements
for graduation from the Computer/Electronics Engineering Technology
Program at Camosun College in Victoria, BC. The project was completed
on time, and successfully fulfilled all the requirements outlined by our
original specification. The completion of the project was accomplished in
under 3 months.
Table of Contents
TABLE OF CONTENTS........................................................................................ 0
INTRODUCTION .................................................................................................. 1
INPUT INTERFACE DESIGN AND IMPLEMENTATION...................................... 1
AUDIO EFFECTS DSP AND DIGITAL AMPLIFIERS ........................................... 3
MICROCONTROLLER INTERFACING AND USER FUNCTIONS....................... 5
I2C COMMUNICATION......................................................................................... 6
PAGE SWITCHING .............................................................................................. 7
VACUUM FLUORESCENT DISPLAY................................................................... 8
POWER SUPPLY ................................................................................................. 9
CONCLUSION .................................................................................................... 10
RECOMMENDATIONS ………………………………………………..……………. 11
REFERENCES ................................................................................................... 14
RESOURCES ..................................................................................................... 14
SOURCES .......................................................................................................... 14
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 0
INTRODUCTION
Digital audio contains a wide variety of formats including MP3 audio and
MPEG. Another popular form of audio is Dolby Digital . Dolby Digital is
incorporated in many audio environments from cinema to home theatre systems.
Movie watchers not only enjoy the visually pleasing aspects of the movie going
experience, but also the sounds produced during suspenseful moments or
climactic scenes.
By incorporating Dolby Digital technology, Comelex Technologies has
designed a Dolby Digital
Decoder/Power Amplifier using only digital
components. The system maintains an entirely digital signal in order to preserve
signal purity by not using any D/A or A/D conversion which may corrupt the audio
data. System features include
•
•
•
•
•
•
•
•
•
A Dolby digital decoder (5.1 channel Dolby Digital or 2 channel PCM)
Digital amplifiers
An audio effects DSP for controlling volume, bass, treble
An S/PDIF (Sony Phillips Digital Interface) digital input
An S/PDIF optical input
Front panel button control of user functions
Universal remote control capability (programmed for Sony audio
format)
An EEPROM for saving user settings
A VFD (Vacuum Fluorescent Display) for displaying the current audio
settings
Sections to be discussed include
1.
2.
3.
4.
The input interface design and implementation
The audio effects DSP and digital amplifiers
The microcontroller interfacing and user functions
The power supply design and considerations
With the features provided in our system, we feel that our design will appeal to
a wide range of users by allowing for as pure and enjoyable an audio experience
as possible.
INPUT INTERFACE DESIGN AND IMPLEMENTATION
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 1
In order to provide a wide variety of audio sources with an interface to our
system, the Dolby Digital Decoder/Power Amplifier contains two audio inputs:
1. An S/PDIF coaxial input
2. An S/PDIF optical input
Both methods of inputting audio allow a user to connect such devices as a
DVD player, CD player, PC soundcard, Playstation 2 and any other sources with
an S/PDIF output. Internally, data is transferred on the Phillips Inter-IC Sound
2
2
(I S) bus. The I S bus consists of three signals:
1. The continuous serial clock
2. The word clock
3. The audio data
2
I S data is formatted in two’s complement and transmitted most significant
bit first. The serial clock is used to clock the data representing the audio
information. The word clock indicates which channel of audio is being
transmitted (left or right).
We chose the I2S format data because it allows for manipulation of the
audio data without corrupting the clock signals. However, error can result in the
recovery of the master clock. If the master clock is improperly recovered, audio
information will be lost and a noisy audio signal may result.
The SAA2505H Duet digital multichannel audio integrated circuit (IC)
includes dual 40MIPS DSP cores which it uses to process one of three audio
formats. Internal to the SAA2505H is bass redirection for the rear satellite
speakers, karaoke voice mixing, dynamic range compression (AC-3 and MPEG)
and delay for both the surround speakers (up to 15ms) as well as center channel
2
(up to 5ms). SAA2505H communication is implemented using the I C protocol.
The system uses a 96kHz audio receiver IC (CS8415A) to accept the
digitally encoded bitstream from one of two inputs (expandable up to 7) and
place the data onto the internal I2S bus. The receiver recovers a master clock
from the incoming bitstream, which the Dolby Digital decoder (SAA2505H) uses
to derive the serial and word clocks. These two clock signals are used to clock
audio information out of the receiver and into the decoder. The decoder can
receive audio information in one of three formats:
1. PCM (stereo)
2. AC-3 (Dolby 5.1)
3. MPEG 7.1
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 2
Our system only decodes either PCM (stereo) or AC-3 (Dolby 5.1)
depending on the incoming bitstream. The SAA2505H Dolby Digital Decoder IC
processes the audio data output by the CS8415A and reformats the audio as I2S
data sent to two audio effects digital signal processors (DSPs), namely the
DDX4100s.
Both the CS8415A and SAA2505H are controlled with a
microcontroller (PIC16F877).
The design and implementation of the decoder test board containing the
audio receiver and decoder took approximately 3 weeks to implement.
Unfortunately, after testing the implementation, we were unable to produce an
audio output. We attempted various audio formats with no results. After 5
weeks of testing, an application note from a Phillips distributor finally arrived
containing information on how to initialize the SAA2505H. A few connections
were made and within minutes the SAA2505H began outputting audio. Our CPU
and decoder board was now ready to send data to the DDX-4100'
s and digital
amplifiers.
AUDIO EFFECTS DSP AND DIGITAL AMPLIFIERS
The digital amplifier and DSP circuit has 2 DSP processors and 4 Digital
2
amplifiers. Both DSPs have an I C address and communicate to the system
2
2
microprocessor through I C. There are 3 I S data lines going into the DSPs:
2
SDI0, SDI1 and SDI2.
These I S signals carry right/left front speaker
information, right surround/left surround information, and center/rear information
respectively. There is also an I2S clock line and a word select line. The SCK line
clocks the I2S data, while the word select switches between the 2 channels. The
signals are then input to the DSP (operating in slave mode) through ferrite beads
to reduce electromagnetic interference (EMI). The SAA2505H output port
(operating in master mode) is providing the clock signals for the data to be
clocked in. The DSP operates at 24.56MHz and can accept data from 24kHz to
96kHz sampled sources. The DSP is controlled by the microprocessor via the
I2C bus and includes a variety of internal functions that can be implemented. All
functions are carried out by addressing the DSP, specifying an internal register,
and programming a value into one of the registers. There are registers for
volume, treble, bass balance and even equalizers (implemented by loading filter
coefficients).
The DSP outputs produce pulse width modulated (PWM) signals (low
level) which are input into the digital amplifiers. The digital amplifiers have 2
PWM channel inputs so they can amplify two channels, or one bridged channel.
The DDX 2060 is capable of 70 Watts RMS (bridged) or 35x2 Watts RMS into an
8 Ohm load.
After the PWM signals are injected into the digital amplifiers the output
PWM (high power) is sent through a passive two-pole low-pass filter. Snubbers
are placed on the output line to ensure that the maximum input voltage of 40V is
not exceeded. Digital amplifiers can radiate excessive EMI and need special
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 3
protection to ensure that they will not interfere with other devices. Common
mode chokes are employed on the outputs, with a capacitor network connected
to earth ground to eliminate any interference being sent back from the speaker
wires. The digital amplifiers have an internal temperature controller, and will
output a warning on pin 28 (TWARN) indicating any overheating. If the
temperature continues to rise, the device will mute the output channels and shut
off until it cools down.
The difference between analog and digital amplifiers is that in analog
amplifiers there has to be a conversion from D/A and from A/D. This conversion
causes losses in signal quality, and errors to be introduced into the data. Analog
amplifiers of class A/B (the most common class) have very poor power
efficiency, since they demand a lot of power.
Figure 1: The Process of Digital Amplification
DDX amplifiers use an entirely digital approach (see Figure 1). In this
approach, a DSP feeds a highly efficient power output device. The signals
remain digital through the entire signal path. The output of the DSP is a low
voltage PWM signal. This signal is applied to the DDX power device, which has
a high power H bridge attached. The power device amplifies the signal digitally
(simply amplifies the PWM outputs) and sends this signal to a low pass 2nd order
filter. This filter converts the PWM signals to analog again by filtering out the
high frequency transients and smoothing the signal. This digital method
eliminates analog noise caused by D/A converters, and improves jitter sensitivity
(see Figure 2).
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 4
Figure 2: Amplifier Efficiency
DDX amplifiers use an open-loop response which create an almost infinite
SNR (signal-to-noise ratio). When there is no signal present the amplifier will be
inactive, and will ground the output which results in less distortion of the signal.
Typical A/B amplifiers require a high ripple rejection power supply because at low
signal levels the ripple may cause unwanted noise and distortion.
Figure 3: The Evolution of Amplification Uses
We implemented two amplifier boards, a main and auxiliary board. The
main board amplifies left, right, left surround and right surround while the
auxiliary board amplifies the center channel and LFE. Both boards perform with
high efficiency and produce a clear and accurate representation of the audio
input source.
MICROCONTROLLER INTERFACING AND USER FUNCTIONS
The DDA uses a PIC16F877 microcontroller from Microchip to control the
system devices. The PIC uses the I2C communication protocol to send
commands to, and receive data from, the other IC’s in the DDA. Data is
displayed on a VFD display using a four-wire configuration. Input data is
received from both momentary switches on the front panel of the DDA and an IR
receiver that sends commands received from a universal remote control. The
PICF877 was chosen for it’s large amount of program memory and its
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 5
abundance of input/output (I/O) pins. Our code used approximately 6k of the 8k
bytes available in program memory, and all but 5 I/O pins.
The code, written in assembly, is required to accomplish three main tasks:
1. Continuously poll the front panel switches and IR receiver waiting for user
input commands
2. Decode the user input and send that command to the DSP or decoder
3. Update the display module to reflect the changes
Many features common to commercial receivers were implemented in the
DDA software. These include
•
•
•
•
•
•
•
•
•
•
•
Bass Control
Treble Control
Balance Control
Delay Control
Master Volume
Surround Volume
Centre Volume
Subwoofer Volume
2 Channel Selection (optical or coaxial)
2 Input Selection (Dolby Digital or stereo)
Sound Check
The features are arranged on the display in a list format. The user can
scroll through the list until the desired feature is reached. Once the display
shows the desired feature, the user can make changes to that feature’s settings.
I2C COMMUNICATION
I2C stands for Inter-Integrated-Circuit. I2C communication is a protocol
originally developed by Philips Inc., that is used by many IC manufacturers for
communications between IC’s at the PCB level, using only two wires. Those two
wires consist of a serial data line and a serial clock line. A hierarchy exists in an
I2C system which consists of a master and slave(s), or even multiple masters.
Our system implements a single-master and multi-slave hierarchy; the PIC
microcontroller being the master, and the receiver, decoder and DSPs being the
slaves. Bus arbitration is not an issue in the DDA since we only have one
master, and most of our communications consist of the master writing
commands to the slaves.
The PIC16F877’s I2C code allows it to initiate communications with most
ICs in the DDA. We wrote PIC code for a read cycle so that user settings could
be saved (bass, treble, volume, etc.). The user need not reset their sound
preferences every time the DDA is powered on because their preferences are
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 6
saved to the EEPROM every time the unit is powered down. The EEPROM in
the DDA is the only device that is read from. User variable contents are saved to
2
the memory chip using an I C write cycle, and then retrieved with a read.
PAGE SWITCHING
Program memory in the 16F877 PIC microcontroller is divided into four
sections, each capable of storing 2048 bytes of data. Once our program’s code
became so large that it crossed one of these boundaries, we had to rearrange
our code so that it would still operate properly. The problem occurs because the
PIC addresses internal program memory using 11 bits; this gives 211 (2048)
possible memory locations, each storing a byte of data. When our program grew
to more than 2048 bytes, it crossed over to the next page of program memory.
The PIC accomplishes this “page switch” by using two extra bits which are
1
extracted from bits 3 and 4 of the PCLATH register . Figure 4 shows these two
bits being loaded into the Program Counter (PC) to provide the four blocks of 2k
bytes of memory.
Figure 4: Loading PC From Bits 3 and 4 of PCLATH
A program must switch pages whenever a “CALL” or “GOTO” from one
page is used to access a function from another page. The address of the label
of the function being called is loaded into the PC. However, the two most
significant bits in the PC will automatically be loaded with the value of the current
page. These two bits had to be manually set to indicate what page the called
function was on. Table 1 shows how to set these bits (PC <11:12>) to access
the various pages.
Table 1: Setting PCLATH Bits
Page Bit 12 Bit 11
0
0
0
1
0
1
2
1
0
3
1
1
Problems arose when we first implemented page switching. The Interrupt
Service Routine (ISR) was written on page 0 of program memory, and we also
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 7
had code that triggered the ISR overflowing onto page 1. We had to rearrange
our code so that any function that triggered the ISR was contained on the same
page as the ISR (page 0).
VACUUM FLUORESCENT DISPLAY
Users of the DDA appreciate having a visual confirmation of their changes
to user functions. We chose a vacuum fluorescent display (VFD) module to
implement user display. A VFD offers several advantages over a liquid crystal
display (LCD) module or back-lit LCD. An LCD must be viewed at eye-level and
up-close to see the characters. A back-lit LCD improves viewing, however, the
user still needs to be directly in front of the display to view the characters. Even
a little variation in the angle can result in the characters appearing faded, or
disappearing completely. A VFD is typically used in most VCRs, microwaves,
and other home appliances. It’s brightness and clarity allow the user to see the
display clearly from across a room and at any angle.
The VFD we chose is made by Noritake, and was provided to us at an
exceptional discount from GMA Electronics in Vancouver, BC. It is a 2-line by
16-character display module, and is a drop-in replacement for a typical LCD
module (see Figure 5). This meant that there was no need to modify software
(or to modify our circuit diagram) to use the VFD module in place of an LCD
module.
Figure 5: Vacuum Fluorescent Display from Noritake
Most standard LCDs (and this VFD from Noritake) conform to HD44780
standards of operation. The HD44780 is an LCD controller/driver, and was
written by Hitachi. This specification outlines initialization procedures for an LCD
module, and the necessary functions to transmit data for character display. This
specification contained more information than we needed to simply initialize our
display and send data to it. Instead, we used a procedure outlined on a web
page called “Interfacing to Hitachi 44780 Based LCDs”2. Unfortunately, this
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 8
page was downloaded more than a year before the writing of this report, and no
longer exists.
We interfaced the PIC to the VFD via four data lines. The VFD is also
capable of 8-line communication, but this would require 8 pins of the PIC to be
dedicated to VFD communications. Outputting data 4 bits at a time reserved the
other 4 output pins on the PICF877 for later use.
POWER SUPPLY
The power supply for the project has undergone many different
conceptual forms. The design requires three regulated voltage levels: a +3.3 volt
line, a +5 volt line and a +28 volt line. The 3.3 and 5 volt supplies were intended
for use in the logic portions of the circuit, while the higher 28 volt line was
supplied to four different points to form an H-bridge for use by the Apogee 2060
digital power driver amplifier IC’s.
The logic portion of the power supply feeds originated from a 9V
secondary toroid transformer. After full wave rectification, a voltage of
approximately 13.5 volts is sent through three, fixed value, high speed, current
switching regulators. These types of regulators were chosen for their wide
voltage input range as well as their high source current capabilities. Each
regulator is tuned to supply approximately 2 of the possible 5 amperes that the
devices can source. The reactive components, used in each of the regulator
configurations, were chosen specifically for optimal performance. Of the three
regulators used, two are 5 volts and one is 3.3 volts. The 3.3 volt line, and one of
the 5 volt lines are externally enabled by the microprocessor. The final 5 volt line
supplies a constant voltage to the PIC for initialization of internal circuits and
memory functions to be saved. The output ripple at the regulators outputs are
easily acceptable for microprocessor logic applications.
One final aspect necessary in the logic circuitry power supply was a
brown-out fault protector for the DSP’s. In the case that the external power
supply drops to the point where the 3.3 volt regulator is unable to maintain 97%
of it’s output, a reset signal is sent to the DSP’s to hold them in a reset mode
until such time as power is at an acceptable level again, and audio can once
more be outputted. Without this feature, with a low DSP voltage, the DSP chips
can lock up if a brown-out occurs.
The H-bridge portion of the power supply, used in the digital amplification
process, provided the largest challenge in the design. These four lines were
required to source up to 12 amperes peak current when all channels were driven
to full output. Therefore, the design is based upon a peak current of 3 amperes
through each of the four branches of the H-bridge. The 28 volts originates from a
separate, higher voltage toroid with 24 volt secondary windings. After rectification
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 9
this voltage is approximately 34.5 volts. The current switching regulators are
chosen because they can handle input voltages up to 40 volts. For the H-bridge,
however, the switching speed, in the order of the 200 kHz region, would prove to
be inadequate on its own since the Pulse Width Modulated power design of the
2060 IC’s switches in the 400+ kHz region and would thus cause a droop in the
output voltage. To remedy this problem, a secondary regulator was used in
series with the switching regulator. The initial regulator absorbed the high input
voltages from the toroid and then regulated their switching output in a linear
fashion. The regulators chosen were of a linear LDO (low dropout voltage)
design since they produce higher power efficiency. The output of these
regulators is tuned to provide a target output voltage of 27.5 volts, very close to
the ideal 28 volts. This was only to allow the necessary safety headroom of input
voltage for the LDO’s since their maximum input is only 29 volts.
The H-bridge section can be powered down through the use of the enable
pin on the front stage of the current switching regulators. The software
specifically enables the logic voltages first and then after a short delay the Hbridge voltages (on a power-up sequence). The reverse occurs for a power down
sequence. This ensures all logic is stable before the audio output is enabled and
also ensures a quiet power down sequence.
The power supply incorporates a fair amount of filtering to ensure no
feedback is fed into the output of the power driver IC’s from the inductive coil of
the loud speaker, which can also act as a pickup.
For safety and protection, external rear panel AGC fuses of 2 and 10
amps for the logic and H-bridge toroid supplies respectively, are found at the rear
of the amplifier case.
CONCLUSION
The Dolby Digital Decoder/Power Amplifier is a highly efficient digital
system allowing for the purist digital audio signal possible. The CS8415A digital
audio receiver allows for expansion of up to seven inputs. The next revision of
the DDA will include the implementation of MPEG 7.1 allowing the DDA to
support 8 channels of surround sound audio. Also with the inclusion of the DDX2100 all-digital high efficiency power amplifier, the DDA could supply up to 50W
per channel. By simply bridging the amplifier outputs, the DDA can provide
100W per channel, 200W or more! The DDA is a highly flexible audio system
due to its modular design. The CPU/Decoder board can be adapted to include a
D/A converter with high power audio analog amplifiers. Software can be
customized to include the surround sound virtualizer, bass management and
program downmixing, all provided by the SAA2505H.
The DDA is a powerhorse in digital audio and makes an excellent
inclusion in any home entertainment system!
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 10
RECOMMENDATIONS
A design project of this magnitude creates many opportunities for many
learning experiences. Before an individual would choose to venture into a project
such as this one on their own, many areas of the project have specific details
that require addressing.
Through designing our Dolby Digital Decoder and Digital Amplifier, we can
collaborate our experiences into a series of several recommendations regarding
different sections of the unit.
Probably the most challenging of all aspects of the project is the situation we
entered where one is caught waiting for certain components to arrive from
different manufacturers. This is a timely issue that easily creates strain on a
project such as this, where we are all working to try and meet a deadline. The
component that gives cause for the most duress is the actual Dolby Decoder
itself. Requesting samples of these types of chips that are new, expensive and in
high demand makes them a challenge to obtain. Getting ones hands on a unit
early on, or even before beginning building their own decoder / amplifier, is the
first major consideration.
With a decoder IC in hand, an individual can now continue on into the design,
but still with several design specifics to keep utmost in mind.
The majority of tricky problems arose from the section of the unit involving the
audio receiver, the decoder and the main CPU along with its EEPROM
counterpart. This proper integration of these units is crucial for best and proper
performance. This area brings about a number of recommendations as seen by
our project group.
The most important of all of these is regarding that of the high frequency data
lines and clock lines. In our first design we were noticing a lot of audio distortion
at the output when ever the unit was switched from simple PCM format into the
full six channels of Dolby decoded information. Through persistence and testing,
this phenomenon finally traced to being cross-talk between high frequency data
lines. The original PCB design we were using did not take into consideration the
possibility of this occurring. A lengthy redesign of the circuit layout and routing of
specific electrical connections is what enables us to generate clean audio output
free of any distortion. More specifically, we recommend to those attempting this
design, that when in the stage of PCB design of this portion to do the following:
•
Carefully lay out the components in such a manner to reduce the complexity
of interconnections between them and limit the amount of times signal lines
must ever cross each other.
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 11
•
•
•
•
Use frequent and large ground planes wherever possible in an effort to
provide a clean reference to all signals at all points in the design.
When routing connections those of highest importance to keep short and
interference free are the clock lines from the decoder to the output to the
amplifier section.
Run ground lines in parallel between data and clock lines as a means of
canceling out cross-talk.
Wherever it is not possible to cross over another signal line be sure to do so
at a 90-degree angle in order that magnetic field interference is not generated
between the two lines. Additionally, if no ground plane is opposite this point in
the circuit, use ferrite inductors to span the crossing of the connection.
A couple of final aspects in this area that will aid in trouble-free manufacturing
is to always thoroughly read all available data-sheets and to previously
familiarize one’s self with the different audio formats and protocols such as PCM,
SPDIF and I2S.
These recommendations to this point are mostly referring to the physical
execution of the project and on that note another comes to mind. When all circuit
boards are tested and functioning properly, a case is necessary than can
strongly hold all components and do so in as small a space as possible.
Therefore, keeping PCB design to a certain size restriction is necessary.
On the other side of the spectrum from the physical world, is considerations
regarding the software programming used in controlling the unit. In this area the
most important aspect to be aware of is in the use of interrupt service routines.
Code needs to be written and assembled in such a way that all code generating
interrupts are written on page 0 when using the assembler platform as we did.
The final area where some recommendations can be applied is that of the
power supply designing feeding the entire audio system. The power supply must
be of design that uses physical components that do not introduce any noise into
surrounding audio circuitry. This can be done through using toroidal transformers
to keep electromagnetic interference from leaking its way into other portions of
the design. These toroids when compared to other conventional iron core units,
keep their field contained within themselves.
Also, to keep pace with the draw that the PWM digital amplifiers have, the
power supply must be able to supply voltage to the H-bridge in a linear fashion
due to the fact that these amplifiers draw at a rate of 400kHz. Simple, highspeed switching regulators will therefore not suffice. The regulators
recommended, are those of the linear LDO (low voltage dropout) family. These
specific kind of regulators maintain the high efficiency characteristic to that of the
class D digital amplifiers used in this decoder / amplifier.
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 12
Finally, to reduce power up and power down noise, the power supply must in
essence be a “smart” power supply. By this, we mean it requires the ability to
have certain portions shutdown electrically independent of others. For little to no
noise to appear on the output when undergoing different powering sequences a
certain order must be abided by. This design uses a separation between power
supplied to the logic circuitry and that of the amplifier circuitry. In power up mode,
it is recommended to power up the logic first allowing power supply stabilization
before then applying power to the H-bridge. The order is reversed when
powering down.
Following these rigid guidelines as recommendations to constructing a Dolby
Digital Decoder and Amplifier, will provide astounding results allowing the utmost
capabilities of the system to be heard free of audible noise and distortion.
DDA Technical Report
Comelex Technologies
March 18, 2002
Page 13
References
1
Stan D’Souza, Microchip Technology Inc., Implementing a Table Read, AN-556,
DS00556E, 2000.
2
------, Interfacing Hitachi 44780 Based LCDs,
www.myke.com/engres/lcd.htm
Resources
Microchip Technology Inc., PIC16F877 Datasheet, DS30292C, 2001.
Myke Predko, Programming and Customizing PICmicro Microcontrollers, 2nd
Edition, 2001.
Noritake Electronics Company, LTD., Vacuum Fluorescent Display Module
Specification, GGM131A, August 2, 2000.
www.noritake-elec.com/uversion.htm
2
Microchip Technology Inc., Using the PICmicro MSSP Module for Master I C
Communications, AN-735, Preliminary, DS00735A, 2001.
Herwig Behrends, Application of the SAA2505 Digital Multichannel Audio
Decoder IC (IIC-Control), AN990000, Tuesday, 16 March 1999
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Comelex Technologies
March 18, 2002
Page 14
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3145 Donald Douglas Loop South
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DDA Technical Report
Comelex Technologies
March 18, 2002
Page 15