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IRF830
®
N - CHANNEL 500V - 1.35Ω - 4.5A - TO-220
PowerMESH MOSFET
TYPE
IRF830
■
V DSS
R DS(on)
ID
500 V
< 1.5 Ω
4.5 A
TYPICAL RDS(on) = 1.35 Ω
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
VERY LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
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■
DESCRIPTION
This power MOSFET is designed using the
company’s consolidated strip layout-based MESH
OVERLAY process. This technology matches
and improves the performances compared with
standard parts from various sources.
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITH MODE POWER SUPPLIES (SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVER
3
1
2
TO-220
■
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V DS
V DGR
Parameter
Value
Unit
Drain-source Voltage (V GS = 0)
500
V
Drain- gate Voltage (R GS = 20 kΩ)
500
V
Gate-source Voltage
± 20
V
ID
Drain Current (continuous) at T c = 25 o C
4.5
A
ID
Drain Current (continuous) at T c = 100 o C
2.9
A
Drain Current (pulsed)
18
A
V GS
IDM (•)
P tot
dv/dt( 1 )
T stg
Tj
Total Dissipation at T c = 25 o C
100
W
Derating Factor
0.8
W/ o C
3.5
V/ns
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
-65 to 150
o
C
150
o
C
(•) Pulse width limited by safe operating area
(1) ISD ≤ 4.5A, di/dt ≤ 75 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
First Digit of the Datecode Being Z or K Identifies Silicon Characterized in this Datasheet
August 1998
1/8
IRF830
THERMAL DATA
R thj-case
Rthj-amb
R thc-sink
Tl
Thermal Resistance Junction-case
Max
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
o
1.25
62.5
0.5
300
C/W
oC/W
o
C/W
o
C
Max Value
Unit
4.5
A
AVALANCHE CHARACTERISTICS
Symbol
I AR
Parameter
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T j max)
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E AS
Single Pulse Avalanche Energy
(starting T j = 25 o C, I D = I AR , VDD = 50 V)
290
mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbol
V (BR)DSS
I DSS
I GSS
Parameter
Drain-source
Breakdown Voltage
Test Conditions
I D = 250 µA
Zero Gate Voltage
V DS = Max Rating
Drain Current (V GS = 0) V DS = Max Rating
Gate-body Leakage
Current (V DS = 0)
Min.
Typ.
Max.
500
VGS = 0
Unit
V
o
T c = 125 C
V GS = ± 20 V
1
50
µA
µA
± 100
nA
ON (∗)
Symbol
Parameter
Test Conditions
V GS(th)
Gate Threshold
Voltage
V DS = VGS
ID = 250 µA
R DS(on)
Static Drain-source On
Resistance
V GS = 10V
I D = 2.7 A
ID(on)
On State Drain Current V DS > I D(on) x R DS(on)max
V GS = 10 V
Min.
Typ.
Max.
Unit
2
3
4
V
1.35
1.5
Ω
4.5
A
DYNAMIC
Symbol
g fs (∗)
C iss
C oss
C rss
2/8
Parameter
Test Conditions
Forward
Transconductance
V DS > I D(on) x R DS(on)max
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V DS = 25 V
f = 1 MHz
I D = 2.7 A
V GS = 0
Min.
Typ.
2.5
Max.
Unit
S
610
120
10
pF
pF
pF
IRF830
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol
Parameter
Test Conditions
t d(on)
tr
Turn-on Time
Rise Time
V DD = 250 V I D = 2.9 A
R G = 4.7 Ω
V GS = 10 V
(see test circuit, figure 3)
Qg
Q gs
Q gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 400 V
Min.
Typ.
Max.
11.5
8
I D = 3 A V GS = 10 V
22
7.2
8
Unit
ns
ns
30
nC
nC
nC
SWITCHING OFF
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Symbol
t r(Voff)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
Min.
V DD = 400 V I D = 4.5 A
R G = 4.7 Ω V GS = 10 V
(see test circuit, figure 5)
Typ.
Max.
Unit
ns
ns
ns
7
5
15
SOURCE DRAIN DIODE
Symbol
I SD
I SDM (•)
V SD (∗)
t rr
Q rr
I RRM
Parameter
Test Conditions
Min.
Typ.
Source-drain Current
Source-drain Current
(pulsed)
Forward On Voltage
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 4.5 A
V GS = 0
I SD = 4.5 A di/dt = 100 A/µs
o
V DD = 100 V
T j = 150 C
(see test circuit, figure 5)
Max.
Unit
4.5
18
A
A
1.6
V
435
ns
3.3
µC
15
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
3/8
IRF830
Output Characteristics
Transfer Characteristics
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Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/8
IRF830
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
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Source-drain Diode Forward Characteristics
5/8
IRF830
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 1: Unclamped Inductive Waveform
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Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
Fig. 4: Gate Charge test Circuit
IRF830
TO-220 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
D1
0.107
1.27
0.050
E
0.49
0.70
0.019
0.027
F
0.61
0.88
0.024
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
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G
4.95
5.15
0.194
0.203
G1
2.4
2.7
0.094
0.106
H2
10.0
10.40
0.393
L2
0.409
16.4
L4
0.645
13.0
14.0
0.511
0.551
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
L9
3.5
3.93
0.137
0.154
DIA.
3.75
3.85
0.147
0.151
D1
C
D
A
E
L5
H2
G
G1
F1
L2
F2
F
Dia.
L5
L9
L7
L6
L4
P011C
7/8
IRF830
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 1998 STMicroelectronics – Printed in Italy – All Rights Reserved
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