Download DN39 - Low Power CMOS RS485 Transceiver

Survey
yes no Was this document useful for you?
   Thank you for your participation!

* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project

Document related concepts
no text concepts found
Transcript
Low Power CMOS RS485 Transceiver – Design Note 39
Robert Reay
Introduction
The EIA RS485 data transmission standard has become
popular because it allows for balanced data transmission in a party line configuration. Users are able to
configure inexpensive local area networks and multidrop communication links using twisted pair wire and
the protocol of their choice.
Previous RS485 transceivers have been designed using
bipolar technology because the common mode range
of the device must extend beyond the supplies and be
immune to ESD damage and latchup. Unfortunately, the
bipolar devices draw a large amount of supply current
and are unacceptable for low power applications. The
LTC ®485 is the first CMOS RS485 transceiver featuring ultra low power consumption (ICC = 500μA max.)
without sacrificing ESD and latchup immunity.
Proprietary Output Stage
The LTC485 driver output stage of Figure 1 features
a common mode range that extends beyond the supplies while virtually eliminating latchup and providing
excellent ESD protection. Two Schottky diodes SD3
and SD4 are added to a conventional CMOS inverter
output stage. The Schottky diodes are fabricated by a
proprietary modification to a standard N-well CMOS
process. When the output stage is operating normally,
the Schottky diodes are forward biased and have a
small voltage drop across them. When the output is in
the high impedance state and is driven above VCC or
below ground by another driver on the party line, the
parasitic diode D1 or D2 will forward bias, but SD3 or
SD4 will reverse bias and prevent current from flowing
into the N-well or substrate. Thus, the high impedance
state is maintained even with the output voltage beyond
the supplies. With no current flow into the N-well or
substrate, latchup is virtually eliminated.
Propagation Delay
Using the test circuit of Figure 4 with only one foot
of twisted pair wire, Figures 2 and 3 show the typical
propagation delays.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
DI
VCC
DI
B
A
DRIVER
OUTPUT
SD3
P1
DRIVER
OUTPUT
A
B
RO
RO
D1
DN039 F02
OUTPUT
LOGIC
Figure 2. LTC485 System Waveforms
SD4
N1
D2
DN039 F03
Figure 3. LTC485 System Waveforms
100Ω
A
DI
LTC485
C
D
DN039 F01
LTC485
Figure 1. LTC485 Output Stage
26AWG TWISTED PAIR
TTL
IN
NOISE
GENERATOR
Figure 4. LTC485 System Test Circuit
09/90/39_conv
R0
B
DN039 F04
LTC485 Line Length vs Data Rate
The maximum line length allowable for the RS422/
RS485 standard is 4000 feet. Using the test circuit of
Figure 4 with 4000 feet of twisted pair wire, Figure 5
and 6 show that with ≈20Vp-p common mode noise
injected on the line, the LTC485 is able to reconstruct
the data stream at the end of the wire.
Figures 7 and 8 show that the LTC485 is able to comfortably drive 4000 feet of wire at 110kHz.
When specifying line length vs maximum data rate the
curve in Figure 9 should be used:
RO
RO
COMMON MODE
VOLTAGE (C + D)/2
DIFFERENTIAL
VOLTAGE D – C
DI
DI
DN039 F05
Figure 5. System Common Mode Voltage @ 19.2kHz
DN039 F06
Figure 6. System Differential Voltage @ 19.2kHz
RO
RO
COMMON MODE
VOLTAGE (C + D)/2
DIFFERENTIAL
VOLTAGE D – C
DI
DI
DN039 F08
DN039 F07
Figure 7. System Common Mode Voltage @ 110kHz
Figure 8. System Differential Voltage @ 100kHz
CABLE LENGTH (FT.)
10k
1k
100
10
10k
100k
1M 2.5M
MAXIMUM DATA RATE
10M
DN039 F09
Figure 9. Cable Length vs Maximum Data Rate
Data Sheet Download
www.linear.com
Linear Technology Corporation
For applications help,
call (408) 432-1900
dn39f_conv IM/GP 0990 • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 1990