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F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
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Data Converters
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Data Converter Specifications
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F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
Summary
Type of Converter
Conditions of Operation
Converter Specifications
Static Specifications
Dynamic Specifications
Digital and Switching Specifications
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F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
2
Type of Converter
The conversion algorithm normally provides this kind of information. For
example, we have flash, sub-ranging, or sigma-delta converters.
Converters are divided in: Nyquist-rate and Oversampling.
? Using an input that occupies a large fraction of the available bandwidth.
? Using an input-band that only occupies a small part of the Nyquist range
The ratio between the Nyquist limit and the signal band, fs/(2fB ), is called
oversampling ratio (OSR). Converters with a large OSR are called oversampling converter, whereas Nyquist-rate converters have a small OSR,
typically less than 8.
Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
Nyquist-rate and Oversampling
vin
fB fs/2
vn2
vin
Anti-aliasing
transition band
D 2/b12
fs
f
f'B
vn2
D2/12
Anti-aliasing
transition band
D2 /b ' 12
fs/2
(a)
fs
f
f
D2/12
b'=fs/2 f'B
b=fs/2 fB
fB fs/2
fs
fs/2
(b)
fs
f
3
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DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
4
Conditions of Operation
The behavior of a data converter strongly depends on the experimental
set-upand the operational environment that influence the performance.
? Supply voltage: should be allowed to fluctuate by 5% or even more
? Temperature: should be from −20◦C to 85◦C (consumer applications) or −55◦C
to 125◦ C (military applications)
Maintaining performance over a wide range of supply voltage or temperature is difficult especially for high resolution devices. For example, a 14bit converter requires accuracies as good as 600ppm/V (5V supply) or
0.3ppm/◦C (consumer applications).
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
Keep Note
For the testing and characterization ....
The operational conditions
of data converters are key
for achieving (or measuring)
specifications.
Inaccurate
set-up or PCB limits can totally mask the excellent performances of a device.
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DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
6
PCB Design
The printed circuit board (P CB) is an important element for not hampering
the results.
Hints
? Connect the separate pins for analog and digital supplies to the single
well filtered supply generator on the PCB.
? Obtain good VDD or ground terminations by minimizing the length of
the connecting leads and PCB paths.
? Avoid ground loops between two sides of the PCB, especially for RF
frequencies.
? Ensure high-level signal integrity with multi-layer boards with separate
ground and power planes.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
7
PCB Design (ii)
? Carefully control the routing of master clock and reference voltages
through the PCB.
? Use signal generators with low jitter but also preserve the feature in
the phase generator.
? The PCB traces leading the clock must be short with a solid ground
plane underneath for forming a microstrip transmission line and enables impedance matching.
? When low-speed data converters use external references utilize a clean
voltage generator whose output impedance is low enough to avoid internal fluctuations greater than 1 LSB.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
8
Converter Specifications
Specifications are used to interpret and understand the material in Catalogues and to facilitate the use and characterization of products.
The specifications are divided into the following classes:
? General features.
? Static specifications.
? Dynamic specifications.
? Digital and switching specifications.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
General Features
Type of Analog Signals
Resolution
Dynamic range
Absolute maximum ratings
ESD (electrostatic discharge) notice
Pin function descriptions and pin configuration
Warm-up time
Drift
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DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
Static Specifications: input-output characteristics
Digital Output
Midstep
0.....101
0.....100
3.5 - 4.5
0.....011
Step width (1 LSB=D)
0.....010
0.....001
Analog Input
0.....000
0
D
2D
3D
4D
5D
Quantization
Error
Quantization interval (± 1/2 LSB)
+1/2
LSB
0
-1/2
LSB
1
2
3
4
5
10
Chapter 2
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DATA CONVERTERS
Springer
2007
11
DATA CONVERTER SPECIFICATIONS
Static Specifications: Possible non-idealities
111
111
110
110
101
101
100
100
011
011
010
010
001
001
000
000
0
1
2
3
4
(a)
5
6
7
0
1
2
3
4
(b)
5
6
7
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
Static Specifications
Analog Resolution
Analog Input Range
Offset
Zero Scale Offset
Common-mode Error
Full-scale Error
Bipolar Zero Offset
Gain error
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Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
Static Specifications: Measuring offset
Analog Output
Digital Output
Offset
Ideal
Transfer
characterisitc
0...1010
0...1001
Real
DAC
Response
0...1000
0...0111
0...0110
0...0101
0...0100
Transfer
characteristic
with Offset
0...0011
0...0010
0...0001
Ideal
DAC
Response
Offset
Analog Input
6
(a)
8
10
(b)
0...1000
0...1001
4
0...0100
0...0101
0...0110
0...0111
2
0...0000
0...0001
0...0010
0...0011
0
Digital Input
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Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
Static Specifications: Measuring the gain error
Digital Output
Analog Output
Transfer
characteristic
with Gain Error
Real
DAC
Response
Ideal
Transfer
characterisitc
DAC
interpolating
line
Different
slopes
Different
slopes
Analog Input
4
6
(a)
8
10
0...0100
0...0101
0...0110
0...0111
2
0...0000
0...0001
0...0010
0...0011
0
Digital Input
(b)
0...1000
0...1001
0...1010
0...1001
0...1000
0...0111
0...0110
0...0101
0...0100
0...0011
0...0010
0...0001
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Chapter 2
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DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
15
Differential non-linearity error (DNL)
∆r (k) − ∆
DN L(k) =
∆
(1)
1
0.8
0.6
DNL (LSB)
0.4
0.3
0
–0.2
–0.4
–0.6
–0.8
–1
0
1024
DN LRM S =
2048
Code
3072
4096
1/2
2N
−2
X
1
2
DN
L(k)
[
]
2N − 2 1
(2)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
16
Static Specifications (cont.)
Monotonicity
Hysteresis
Missing code
Integral non-linearity (INL): is a measure of the deviation of the transfer function from the ideal interpolating line. Another definition of the
integral non-linearity measures the deviation from the endpoint-fit line
for correcting the gain and offset error. The second definition is chosen as standard since it is more informative for estimating harmonic
distortion.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
17
3
3
2
2
1
1
INL (LSB )
INL ( LSB )
Static Specifications (cont.)
0
–1
–1
–2
–3
0
–2
0
1024
2048
Code
3072
4096
–3
0
1024
2048
Code
INL plot according to the two different definitions
3072
4096
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
18
Static Specifications: endpoint-fit line INL
An iterative use of (2) gives the transition point between codes after correction, X 0(k)
X 0(k) = ∆0 kos +
k
X
DN L(i)
(3)
1
Where ∆0 = ∆(1 + G); G gain error; kos is the offset measured in LSB.
The offset compensated for the endpoint-fit line is kos∆0. The IN L in
LSB becomes
k
X
X 0(k) − k∆0
DN L(i)
= (1 + G)
IN L(k) =
∆
i=1
(4)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
19
Static Specifications: Modeling INL and DNL
ADC
Xin
y=f(x)
Correlated INL
y
S
eQ
S
Digital
Output
eINL,uncorr
Observe
ADCs with large integral non-linearity show harmonic distortion. Large
differential non-linearities lead to INL with large random components.
The resulting noise is added to the quantization and degrades the
SNR.
Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
20
DATA CONVERTER SPECIFICATIONS
Static Specifications Example: INL and harmonic distortion
Random variation of the INL is within ±0.45. Correlated variation described by
x = (n − 2N −1 )/2N
y = x + ax2 + bx3 + cx4 ;
(5)
a = −0.01, b = 0.01 and c = 0.02
INL
1. 4
0.4
1. 2
0.3
1
0.2
0. 8
0.1
0. 6
0
0. 4
−0.1
0. 2
−0.2
0
−0.3
−0.2
−0.4
−0.4
DNL
0.5
0
500
1000
1500
2000
2500
3000
3500
4000
4500
−0.5
0
500
1000
1500
2000
2500
3000
3500
4000
4500
Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
Reference Spectrum [DB]
0
−20
−40
−40
−60
−60
−80
−80
−100
−100
0
100
200
300
400
500
600
700
Spectrum of Signal with INL [dB]
0
−20
−120
21
800
900
1000
−120
0
100
200
300
400
500
600
700
800
900
1000
Signal used: 12-bit quantized, 61 periods sine wave (sequence of 212
samples). Average noise floor: −107.1 dB = SN R = 74 dB + processing gain, 33.1 dB.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
Static Specifications (cont.)
Power Dissipation
Temperature ranges
Thermal Resistance
Lead Temperature
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F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
23
Dynamic Specifications
Frequency response and speed of the analog components of a data converter determine the dynamic performance.
The specifications either correspond to defined dynamic conditions or are
given as a function of frequency, time, or conversion data-rate.
Analog Input Bandwidth
Load Regulation or Output Impedance
Settling-time
Cross-talk
Aperture uncertainty (Clock Jitter)
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DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
24
Digital to Analog Glitch Impulse
Equivalent input referred noise
x
Vin= N ·VFS
2
0.63 LSB
Digital
Code
x-3 x-2 x-1
x
x+1 x+2 x+3
Estimation of the input referred noise: histogram method with dc input.
Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
SNR
70
–0.5 AMPLITUDE
65
–6.0 AMPLITUDE
60
SNR– dB
55
50
–20.0 AMPLITUDE
45
40
35
30
100K
1M
10M
INPUT FREQUENCY – Hz
100M
25
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
Typical SNR versus the input amplitude (sigma-delta converters).
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Chapter 2
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DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
Signal-to-Noise-and-Distortion Ratio (SINAD or SNDR)
70
–0.5 AMPLITUDE
65
–6.0 AMPLITUDE
60
SINAD – dB
55
50
–20.0 AMPLITUDE
45
40
35
30
100K
1M
10M
INPUT FREQUENCY – Hz
100M
27
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DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
28
(DR)
Equivalent input referred noise
(Effective-Number-of-Bits (ENOB))
EN OB =
SIN ADdB − 1.76
6.02
(Harmonic Distortion (HD))
(6)
Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
–95
Vin= -1 dBFS
–90
WORST OTHER
–85
dBc
–80
3-RD HARMONIC
–75
–70
2-ND HARMONIC
–65
1-st
2-nd
3-rd
5-th
4-th
–60
0
50
100
150
fin – MHz
200
250
Harmonic components as a function of the input frequency.
29
Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
Example: Harmonic tones
0
Input
−20
−40
2
3
4
−60
5
6
7
−80
8
9
−100
10
−120
−140
−160
−180
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
30
Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
0
Input
−20
−40
3
2
−60
7
8
−80
10
−100
6
4
5
9
−120
−140
−160
−180
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
Input frequency at 1.711 kHz (sampling frequency 16.38 kHz)
31
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DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
32
Dynamic Specifications (cont.)
Total Spurious Distortion (TSD): is the the root-sum-square of the
spurious components in the spectral output of the ADC. The input is a
pure sine wave input of specified amplitude and frequency.
Spurious Free Dynamic Range (SFDR): is the ratio of the root-meansquare signal amplitude to the root-mean-square value of the highest
spurious spectral component in the first Nyquist zone. The SFDR focuses on the worst tone.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
0
Spur
−20
Signal
−40
Big Channel
0 dB
SFDR=85 dB
−60
−80
Small Channel
-90 dB
−100
−120
−140
−160
0
2M
4M
6M
8M
33
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
110
100
SFDR – dBFS
90
80
SFDR – d B
70
60
SFDR – dBc
50
40
30
20
f S = 80 MSPS
fIN = 60.2MHz
10
0
–90
–80
–70
–60
–50
–40
INPUT – dBFS
–30
–20
–10
0
34
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DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
35
Intermodulation Distortion (IMD): accounts for spur tones caused by
non-linearity when the input is a complex signal. This non-linearity of
a data converter causes the mixing of the spectral components thus
generating spurs at sum and difference frequencies for all possible
integer multiples of the input frequency tones.
Two tone Intermodulation Distortion (IMD2): is the ratio of the rms
value of either input tone to the rms value of the worst third order
intermodulation product reported in dBc. The input is made by two
closely spaced tonesf1 and f2. Often the specification accounts for
the third order spurs only, which occur at (2f1 − f2), (2f2 − f1). The
reason for considering third order terms only is that they are close to
∼ f . Other intermodulation terms are far
the input frequencies f1 =
2
away from the input and can be filtered out in the digital domain.
Chapter 2
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DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
36
Example: IMD
The distortion is described by a non-linear block before the quantization
y = x + 10 − 4x3.
0
-20
f1
f2
-40
-60
-80
2f1-f2
2f2-f1
2f1+f2
2f2+f1
3f1
3f2
-100
-120
1k
2k
Frequency
3k
4k
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
37
Dynamic Specifications (cont.)
Multi-Tone Power Ratio (MTPR): is specific for data converters used
in communication systems. It defines the distortion of multi-tone transmission systems.
Noise-power ratio (NPR): similar to the MTPR it describes the linear
performances of an ADC used in frequency division multiplexed (FDM)
links. NPR is a parameter which is usually used to describe power
amplifiers but the same concept is also used for data converters.
Chapter 2
F. Maloberti
DATA CONVERTERS
Springer
2007
DATA CONVERTER SPECIFICATIONS
0
12-bit ADC
fck=40 MHz
Input Power/Full scale [dB]
-20
NPR = 58 dB
-40
-60
-80
-100
-120
0
2
4
6
Frequency [MHz]
8
10
38
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
70
t
bi
2
50
1
bi
1-
t
-b
it
1
40
30
-50
10
NPR [dB]
60
-40
-30
-20
RMS Input/ VFS [dB]
-10
0
39
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DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
40
Effective Resolution Bandwidth (ERBW): is defined as the analog
input frequency at which the SINAD drops by 3 dB compared to its low
frequency value.
Figure of Merit (FoM): is a parameter used to measure the power
effectiveness of an ADC.
PT ot
F oM = EN B
2
2 · BW
(7)
In some cases the number of bits replaces the ENB or the ERBW is
used instead of BW. Other definitions use the clock frequency and not
the signal band (for Nyquist-rate converters.)
Effective solutions show an FoM well below 1pJ/conv-step.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
Remember that
About the power figure of merit ...
The figure of merit is not a
solid parameter as it depends
on the technology line-width,
signal bandwidth and number
of bits. Nevertheless, use
it anyway for assessing the
the power effectiveness of the
converter.
41
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
42
Digital and Switching Specifications
Logic levels: are the set of non overlapping ranges of amplitudes
used to represent the logic state.
Encode or clock rate: is the range of possible encode rates that ensures the performances of the specifications. It is best to operate a
data converter using a maximum clock rate of about 25% of the maximum guaranteed by the specification.
Clock timing: specifies the features of the clock. The information is
normally given using a diagram. The external clock is normally regenerated at the input with edge-triggered flip-flops that latch the input on
the rising or the falling edge. The clock duty cycle can be chosen arbitrarily under some constraints. A 50% duty cycle is normally the best
for optimum dynamic performances.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
43
Clock Source
Circuits requiring a very low jitter generate the clock using a differential input sine wave. A crystal clock oscillator (with or without external
filters) obtains the input sine wave. This ensures sine wave purity and
provides accurate zero-crossing times. Internal amplifiers, under saturation, are used to square the input sine wave and thus generate the
internal clock.
Sleep Mode
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 2
DATA CONVERTER SPECIFICATIONS
44
Wrap-up
Using or designing a data converter requires a proper understanding of its
specifications.
We have seen how specifications describe the features and limits of the
static and dynamic operation of data converters.
In this chapter we have also studied the basic elements for evaluating and
comparing existing devices. Furthermore, the given elements help in the
choice of the appropriate data converters for a given mixed system.
The technical terms used in manufacturer-supplied specifications should
be now clear.