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Lecture 7
Basic Circuit Analysis
• Definitions: Circuits, Nodes, Branches
• Kirchoff’s Current Law (KCL)
• Kirchoff’s Voltage Law (KVL)
• Examples and generalizations
• Series and Parallel Configuration
1
BRANCHES AND NODES
Branch:
elements connected end-to-end,
nothing coming off in between (in series)
Node:
place where elements are joined
NOTATION: NODE VOLTAGES
The voltage drop from node X to a reference node
(ground) is called the node voltage Vx.
Example:
in
+
Vin
-
R
out
+
C Vout
ground
KIRCHOFF’S CURRENT LAW
Circuit with several branches connected at a node:
i2
i1
i3
i4
KIRCHOFF’s CURRENT LAW “KCL”:
(Sum of currents entering node)  (Sum of currents leaving node) = 0
Charge stored in node is zero (e.g. capacitor is part of a branch)
Assume zero capacitance from node to ground unless explicit capacitor
USING KCL
Kirchhoff’s Current Law (KCL)
Formulation 1:
Sum of currents entering node = sum of currents
leaving node
Use reference directions to determine “entering”
and “leaving” currents--no concern about actual
current directions
 KCL yields one equation per node
ALTERNATIVE KCL FORMULATIONS
Formulation 2:
“Algebraic sum” of currents entering node = 0
where “algebraic sum” means currents leaving are
included with a minus sign
Formulation 3:
“Algebraic sum” of currents leaving node = 0
where currents entering are included with a minus
sign
MAJOR IMPLICATION
KCL tells us that all of the elements in a single branch carry
the same current.
We say these elements are in series.
Current entering node = Current leaving node
i1 = i 2
KIRCHHOFF’S CURRENT LAW EXAMPLE
24 A
-4 A
10 A
i
24 = 10 + (4) + i
Currents entering the node: 24 A
Currents leaving the node: 4 A + 10 A + i
i = 18 A
Three statements of KCL
i

i
0
in
IN
i
out
24  4  10  i

i  18 A

i  18 A

i  18 A
OUT
in
24  ( 4)  10  i  0
ALL
i
ALL
out
0
 24  4  10  i  0
EQUIVALENT
GENERALIZATION OF KCL
Sum of currents entering and leaving a closed surface is zero
Physics 7B
Could be a big chunk
of circuit in here, e.g.,
could be a “Black Box”
Note that circuit branches could be inside the surface.
The surface can enclose more than one node!
KIRCHHOFF’S CURRENT LAW USING SURFACES
Example
surface
5 A  2 A  i
50 mA
5A
2A
Another example
entering
i
leaving
i=7A
i?
i must be 50 mA
KCL EXAMPLE: DIFFERENTIAL EQUATION
At node X:
Current into X from the left: V1 +
(V1 - vX)/R1
R1
X
C1
R2
Current out of X to the right:
vX/R2 + CdvX/dt
KCL: (V1 - vX)/R1 = vX/R2 + CdvX/dt
Given V1, This differential equation can be solved for vX(t).
KIRCHHOFF’S VOLTAGE LAW (KVL)
The algebraic sum of the voltage drops around any closed loop is zero.
Why? We must return to the same potential (conservation of energy).
Path
+
V1 “drop”
-
Path
“rise” or “step up”
V2 (negative drop)
+
Closed loop: Path beginning and ending on the same node
Remember our trick: to sum voltage drops on elements,
look at the first sign you encounter on element when tracing path
+ v2 

+
va

1
+
vb
-
3
ref. node
Path 1:
 va  v 2  vb  0
Path 2:
 vb  v 3  vc  0
Path 3:
 va  v2  v3  vc  0
v3
2
+
Examples of
three closed
paths:
KVL EXAMPLE
+
vc

UNDERLYING ASSUMPTIONS OF KVL
Assume no time-varying magnetic flux through the loop …
if there was, Physics 7B  Faraday’s Law  induced emf (voltage)
Antennas are designed to “pick up”
electromagnetic waves
“Regular circuits” often do the same thing 
not desirable!

B( t )

+
v( t )
Avoid open loops!
How do we deal with antennas (EECS 117A)?
Include a voltage source as the circuit representation of the emf or
“noise” pickup
(we have a lumped model rather than a distributed (wave) model)
ALTERNATIVE STATEMENTS OF KIRCHHOFF’S
VOLTAGE LAW
1) For any node sequence A, B, C, D, …, M around a
closed path, the voltage drop from A to M is given by
v AM  v AB  vBC  v CD    vLM
2) For all pairs of nodes i and j, the voltage drop from i to j is
v ij  v i  v j
where the node voltages are measured with respect to
the common node.
MAJOR IMPLICATION
KVL tells us that any set of elements which are connected at
both ends carry the same voltage.
We say these elements are in parallel.
KVL clockwise,
start at top:
Vb – Va = 0
Va = Vb
RESISTORS IN SERIES
Resistors in series can be made into one equivalent resistor
(for easier analysis)
• KCL tells us same current
I ?
flows through every resistor
R
1
VSS
+

R
• KVL tells us
R
I  R1  I  R2  I  R3  I  R4  VSS
2
3
R
4
• Clearly,
I  VSS /(R1  R2  R3  R4 )
So we replace the resistors with one, of resistance
Req  R1  R2  R3  R4
Works for any # of R!
RESISTORS IN PARALLEL
Resistors in parallel can be made into one equivalent resistor
(for easier analysis)
x
• KCL tells us
I2
I1
ISS
R1
ground
R2
Iss = I1 + I2
• The two resistors are
in parallel; they have
the same voltage
Vx = I1 R1 = I2 R2
Iss = Vx / R1 + Vx / R2
Vx = Iss R1 R2 / (R1+R2)
Generally, Req = (R1-1 + R2-1 + R3-1 + …)-1