Download First Oscillators Sheet

First Oscillators Sheet
Determine the frequencies of the following circuits:
1. An op-amp based relaxation oscillator having Rf = 15 k, R1 = 6.8 k,
R = 10 k, C = 0.22 uF.
(Switching levels  Vs x 6.8/(15 + 6.8) = 0.312 Vs, so for charging, V1 = .312Vs and V2 = +0.312Vs.
Circuit for charging:
10 k
0.22 uF
Vs
vc
so i = (Vs - vc)/104 = 0.22 x 10-6 dvc/dt and
dvc
0.0022
 dt
giving
t  0.0022( ln(Vs  vc )  const )
Vs  v c 
As vc  0.312vs initially , const  ln( Vs  0.312Vs )  ln( 1.312Vs )
So t when vc  0.312Vs is 0.0022( ln( Vs  0.312Vs )  ln( Vs  0.312Vs ))
and t = 0.0022 ln(1.312/0.688) = 0.00142 s
For discharging, the situation is that the capacitor is charged to +0.312Vs, it
is discharging towards -Vs, and we want to know how long it will take to get
down to -0.312Vs. Graph courtesy of MATLAB:
0.4
0.2
Capacitor voltage: 1 = Vs
0
-0.2
-0.4
-0.6
-0.8
-1
0
0.001
0.002
0.003
0.004
0.005
0.006
Time, second
0.007
0.008
0.009
0.01
If the bottom line were vc = 0 instead of vc = - Vs, the equation of the curve
would just be vc = 1.312Vs exp(-t/0.0022) as 0.0022 is the time constant. We
can use that version to calculate t; now we finish when the actual vc is
-.312Vs and the graph one is 1-0.312 = 0.688 Vs. We now have
0.688 = 1.312 exp(-t/0.0022), so dividing both sides by 1.312 and taking logs
base e of both sides:
-0.6455 = -t/0.0022 and t = 0.0022 x 0.6455 = 0.00142 s.
The frequency is therefore 1/(0.00142 + 0.00142) = 352 Hz.
2. A 555 Timer based circuit having R1 = R2 = 4.7 k, C = 0.047 uF.
The switching levels are conveniently always Vs/3 and 2Vs/3, so it is just a
case of noting which resistors the capacitor is charging or discharging
through.
For charging, it is both R1 and R2, so:
so i = (Vcc - vc)/9400 = 0.047 x 10-6 dvc/dt and
dvc
0.0004418
 dt
giving
t  0.0004418( ln(Vcc  vc )  const )
Vcc  vc 
As vc  0.333vcc initially , const  ln( Vcc  0.333Vs )  ln( 1.333Vcc )
So t when vc  0.667Vcc is 0.0004418( ln( Vcc  0.667Vs )  ln( Vcc  0.333Vcc ))
and t = 0.0004418 ln(0.667/0.333) = 3.062 x 10 -4 s
For discharging, it is the exponential again. Its time constant is RC = 4700 x
0.047 X 10-6 (just R2 this time) = 2.209 x10-4 s, it starts at 0.667Vcc, and we
want to know how long it will take to get down to 0.333V cc.
So 0.333 = 0.667 exp(-t/2.209 x 10-4)
0.5 = exp( ... ), so logs again
-0.693 = -t/2.209 x 10-4 and t = 1.531 x 10-4 s.
A full cycle therefore takes (3.062 x 10-4 + 1.531 x 10-4) seconds and the
frequency is therefore 1/(3.062 x 10-4 + 1.531 x 10-4) = 2177 Hz.
.
3. The "Two-Inverter" oscillator with R = 1 k, C = 100 nF. The diodes may be
assumed to have clamping diodes limiting the output voltage swing to -0.7 V
and + 5.7 V (with 0 V and 5 V supplies). Assume the transition voltage to be
2 V.
Scenario 1: No "clamping diodes". NB Opposite order to question but in
accordance with the lecture treatment !
For charging, the supply is 5 V and we are charging from V T - 5 to VT volt, or
-3 to +2 V in this example.
With our usual circuit, i = (5 - vc)/1000 = 100 x 10-9 dvc/dt, so we have:
dvc
6
6
 dt  100 10  5  vc  t  100 10 ln 5  vc   const
and as t=0 when vc = -3 V, const = 100 x 10-6 ln 8.
So when vc = 2 V, t = 100 x 10-6 ln(8/3) = 9.81 x 10-5 s.
For discharging, the voltage starts 5 V above the transition (2 + 5 = 7 V) and
we want the time for it to decay to the transition voltage (2 V) with a time
constant of RC = 100 x 10-6 s.
So 2 = 7 exp [-t/(100 x 10-6)] and t = - 100 x 10-6 ln(2/7) = 1.25 x 10-4 s.
The frequency is therefore 1/(the sum of the two times) = 4477 Hz.
Scenario 2: With clamping diodes.
In practice, all CMOS gates are fitted with these diodes which prevent
excessive electrostatic charge build-up on the gates from destroying the
devices. This is the circuit:
VDD
CMOS
gate
0V
The idea is to stop the gate
voltage going more than a
forward diode drop above VDD or
more than such an amount
below 0 V.
The consequence for the operation of the oscillator is that the charging phase
starts at -0.7 V approximately instead of - 3 V, whilst the discharge phase
starts at 5.7 V approximately. The analysis now becomes:
Charging: ... and as t=0 when vc = -0.7 V, const = 100 x 10-6 ln 5.7
So when vc = 2 V, t = 100 x 10-6 ln(5.7/3) = 6.42 x 10-5 s.
Discharging, we now start at 5.7 V instead of 7 V, so
2 = 5.7 exp [-t/(100 x 10-6)] and t = - 100 x 10-6 ln(2/5.7) = 1.047 x 10-4 s.
The frequency is now 1/(sum of the times) = 5921 Hz.
4. How could the oscillator of (1) be given a mark-to-space ratio of
approximately 2 ?
We need to make the charging take twice as long, or the discharging only half
as long. Going for the latter, we will put (a second 10-k resistor with a diode in
series pointing towards the op-amp output) in parallel with the existing 10-k.
5. How could the oscillator of (2) be given a mark-to-space ratio of
approximately 1 ?
(Diode in parallel with R2 pointing downwards towards C so capacitor
charges through R1 only and discharges ).
6. In the oscillator of (3), what would be the effect of :
(a) Omitting the clamping diodes.
See first part of solution (may also blow up the inverters !)
(b) Using TTL inverters instead of MOS inverters.
Current would flow into and out of the TTL gate. This effect might actually
stop the circuit working altogether (and would reduce the frequency if it did
not stop the oscillation !)
7. a) A Wien Bridge oscillator having R = 2.2 k, C = 0.33 uF.
b) The same circuit with the capacitors replaced by 50-mH inductors.
Sketch the circuit in each case. How can we ensure both that the circuit will
oscillate and that it will give a reasonably sinusoidal waveform ?
Circuit:
R
V1
+
V2
-
C
R2
R1
R
C
0V
So we can use the same sum for both parts of the question, we will call the
reactance of the capacitors or inductors jX (where X = -1/(C) for the
capacitor and X = L for the inductor). We want to find the frequency at which
the positive feedback is in-phase and the attenuation of the feedback network
at that frequency (the latter so we know what gain the amplifier will need to
have in order to oscillate).
jXR
jXR
R  jX
By voltage division, V2  V1 

jXR
R  jX 2  jXR
R  jX 
R  jX
jXR
XR
as 1 / j   j 
 2

2
2
R  3 jXR  X
 jR  3 XR  jX 2
so we have in-phase feedback (no j terms in the fraction) when R2 = X2,
i.e. R =  X.
For the capacitor circuit, X = -1/(C), so applying commonsense to the sign,
we have R = 1/(C) and  = 1/(RC) = 1377 rad/s = 219 Hz.
For the inductor circuit, X = L, so  = R/L = 2200/.05 = 44000 rad/s
= 7003 Hz.
In either case, when the j terms have vanished, V 2/V1 = XR/(3XR) = 1/3, so
the amp. needs a gain of 3 at least. This means R1 > 3R2.
A problem is that if the gain is less than 3 the circuit does not oscillate, but if
the gain is even slightly greater than 3 a non-sinusoidal output results
because the oscillation is limited by the amplifier supply rails. Possible fixes
include:
Use an NTC thermistor instead of R1, so its resistance (and therefore the amp
gain) reduces as the output voltage builds up and heats the thermistor up.
This method works well at constant temperature but we tend to have no
oscillation on warm days and clipping on cold ones !
Use a filament lamp instead of R2 so the resistance goes up as the voltage
increases. This method works well but needs a comparatively large current
through R1 and R2.
See Horowitz and Hill for cleverer methods !
An Oscillator using a 555 Timer
+ Vcc
R1
R2
VCC
Output
R
+
Tr
R
R
Th
+
R
C
0V
S
Q
_
Q
Discharge