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Technical
Article
A new performance challenge: how to miniaturize the
power circuit in wearable devices
Mark Shepherd, Thomas Kail, Stephan Kreszl
For some years, the gold standard in high-density power system design has been set by the
smartphone. Here, the conflicting demands for, on the one hand, long run-time between battery
charges and, on the other hand, miniaturization of every component including the battery came to a
head. In the power circuit of both smartphones and tablets, the most effective of the designer’s approaches to miniaturization was integration – combining as many of the power system’s functional
blocks as possible into a single power management IC (PMIC).
It is now perhaps time to acknowledge that the gold standard is being raised by the manufacturers
of wearables. Here, the demand for power density is if anything even greater than in smartphones
or tablets. Just like a smartphone, wearables such as smart watches and fitness bands are portable
computing devices which contain multiple sensors, radios and user interface peripherals around a
processor core.
But the form factor is several times smaller, and the space available for a battery is frighteningly
small. Yet, as consumer reaction to early smart watch releases showed, users care deeply about
battery run-time, and strongly resist the suggestion that they should have to charge their wearable
any more frequently than they do their smartphone or tablet.
The designers of wearables, then, face the ultimate challenge of miniaturization. Paradoxically,
however, the designers of wearables have to date been denied the strategy of integration that has
served smartphone OEMs so well. This is not surprising, since the category of ‘wearables’ has in
fact covered a large multitude of device types, and defining a power management IC (PMIC) to
serve multiple different devices was difficult while the wearables market was in its early phase.
Now, however, clear trends in the architecture of devices designed to be worn on the wrist – smart
watches and fitness bands – are emerging. And this in turn is leading to the introduction of a new
class of ‘microPMICs’ which promise to provide the solution to the problem of power density in
wearables.
Development of conventional PMIC market
When power-system designers think of PMICs, they typically have in mind the large, high-power devices that are optimized for specific processor families produced by the various applications processor manufacturers such as Qualcomm, Nvidia and Intel. These PMICs are the ideal companion for
their processor, providing exactly the right combination of regulated outputs in a small package that
provides the required paths for heat dissipation, given the loads that they are expected to supply.
Some less widely used processors might not have an accompanying PMIC, but if a designer is using an applications processor that is supported by a PMIC, they would be crazy not to use it.
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In fact, in the smartphone and tablet sectors, the market has settled on a choice of just one or two
dominant processor families, and this gives PMIC manufacturers sufficient economies of scale to
make it worth their while developing processor-specific devices.
In the wearables market, the choice of processor has not consolidated to anything like the same extent, and so power semiconductor manufacturers have not had the benefit of a standard processor
specification to which they can fit a new PMIC for wearables.
So should the OEM designer expect to be able to find a standard PMIC that precisely meets his
need? Clearly, a PMIC aimed at the broad wearables market might either fail to meet all of a system’s needs, and thus require the addition of discrete power components, negating the benefit of
using a PMIC in the first place; or, it will include unused functions, thus increasing power consumption and the cost and size of the PMIC’s die and offering a less than optimal solution.
Fig. 1: typical architecture of a smart watch. Part numbers in functional blocks are of devices manufactured by ams.
But if the diversity of processor choices militates against the provision of a standard PMIC, perhaps
a route to the standardization of power requirements can be found elsewhere?
Consider Figure 1, which illustrates a smart watch design. The choice of MCU could be drawn from
a very wide selection of standard devices using an ARM® processor core. But the basic architecture of the system as a whole is common to a great many smart watches, since they are all intended to meet the same consumer desire for biometric and environmental sensing, positioning information and user and communications interfaces.
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So if PMIC manufacturers take this common architecture as their standard, they can develop an integrated solution for the power system in wearable devices for the first time which exactly or almost
exactly fits the power requirement of many OEMs’ products. The main processor and the Bluetooth® and GPS radios can operate from a 1.8V supply: this is usually provided by a step-down regulator.
Other functional blocks require a 3V supply. These include the display, and sensors such as the
heart rate monitor (represented in Figure 1 by the AS7000 biosensor module from ams). In addition,
a brushless DC (BLDC) motor providing haptic feedback will require its own isolated supply providing pulses of power.
The conventional approach to the design of this power system calls for the use of multiple discrete
power ICs:
•
a stand-alone battery charger
•
a step-down regulator for the 1.8V supply
•
a haptic feedback driver or LDO for the BLDC motor
•
an LDO for the display and possibly for sensors that require a 3V input
This approach is the enemy of miniaturization, requiring a large board footprint for the devices
themselves and for the board traces connecting them to the rest of the system. This is without even
considering the potential board layout difficulties associated with the management of radiated emissions, the impact on assembly cost of using multiple components, and the reduced reliability resulting from the use of multiple discrete components.
By contrast, a microPMIC is easier to integrate into the design and provides for a simpler board layout. An illustration of the way this can be done is provided by the AS3701, a microPMIC for wearables manufactured by ams. This device is optimized for the type of system shown in Figure 1. The
space savings to be made are considerable: the AS3701 is supplied in a 4mm2 chip-scale package
with a pitch of just 0.4mm. In this package are a full-featured linear battery charger with power path
management, multiple power rails, protection features, sequencing capability and an I2C interface to
the MCU.
The footprint of the AS3701 is designed to enable cost as well as space savings. Figure 2 shows a
board layout for the wearable device described in Figure 1. Three inner balls on the AS3701 are
missing: this gives room to make easy via connections without requiring vias in pad.
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Fig. 2: layout diagram showing the AS3701 used in a typical smart watch design
So how well is a microPMIC with this tiny footprint able to provide for the complex power requirements of a smart watch? In the case of the AS3701A, the multiple power rail sources include two
200mA LDOs, a 500mA step-down DC-DC converter, and two 40mA programmable current
sinks/GPIOs (see Figure 3). As Figure 1, shows, the one power rail not provided by the AS3701A is
the 5V input to the AS7000’s LEDs, which is supplied by a discrete boost converter.
Fig. 3: the AS3701A microPMIC includes multiple power blocks and a battery charger
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The synchronous step-down converter includes power-saving features: dynamic voltage scaling and
selectable frequencies in a range from 1MHz to 4MHz allow efficiency to be optimized for various
load levels. Figure 4 shows that it is able to achieve high efficiency when supplying loads between
1mA and 300mA, a considerable achievement given the number of functional blocks inside the device’s 2mm x 2mm package.
Fig. 4: efficiency curves of the AS3701’s 500mA DC-DC converter
Of course, while power density and long battery run-time are the most important requirements for
the wearable’s power system, the system designer satisfy certain minimum performance specifications, not least in the domains of noise and heat dissipation.
GPS modules are especially sensitive to peak-to-peak voltage ripple noise: 50mV is typically the
maximum they can tolerate. Here, the AS3701A’s DC-DC converter offers a large safety margin
(see Figure 5).
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Fig. 5: peak-to-peak output voltage ripple from the AS3701A’s DC-DC converter is safely below the
50mV maximum tolerated by typical GPS radio modules The converter was tested at a supply voltage of 3.7V, an output voltage of 1.8V, output current of 20mA, switching at 2MHz in low-noise
mode. Output ripple is just 14.4mV.
Most of the loads supplied by a smart watch’s microPMIC will be well below 50mA; the sensors tend
to draw a current of tens of microamps. This means that the thermal load is so small that a tiny microPMIC’s package can easily handle it.
The highest peak current is drawn by the haptic motor: its start-up current can be up to 100mA, but
this quickly falls after start-up. The initial start up voltage also has to be high enough to meet the
power-up voltage specification, which will be indicated in the motor’s datasheet.
This requirement is met in the AS3701 by the programmable LDO: the user can select from a wide
range of voltage settings. The programming may be adjusted via the I2C interface to support the
pulsing of the haptic motor on and off, modifying the output voltage dynamically to provide ramp effects and soft vibration profiles.
Benefits and trade-offs of microPMIC approach
Above, it was stated that a designer would be ‘crazy’ not to use a processor’s PMIC if one were
available. Would a designer be similarly crazy not to use a smart watch’s microPMIC?
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Certainly there seems to be no way to achieve such a small footprint when using multiple discrete
power components. Assuming that Figure 1 closely represents the functionality of a new smart
watch or fitness band design, a microPMIC such as the AS3701 offers an almost perfect fit.
And supporting the designer’s choice of a microPMIC are the supplementary advantages. Ease of
assembly of a single power component is one. But a microPMIC also provides considerable design
benefits. Figure 6 shows a screen capture from the GUI that comes with the AS3701 evaluation
board. It is clear that it is simple to program the various output voltages for the step-down regulator
and LDOs. The GUI also enables power-up sequencing and the configuration of the charger functions for a wide variety of battery types, as well as of various other functions. Via the I2C interface,
all of these registers can be overridden at any time by the microcontroller, allowing the designer to
change an output voltage on the fly, for instance, or to place the part into stand-by mode.
So while some users might instinctively be wary that the use of a microPMIC will restrict their flexibility to optimize power performance to meet the needs of an application, for most the programmability available in a PMIC ensures that every rail can be adequately supplied at all times, by a single
integrated device with a quite remarkably small footprint.
Fig. 6: screen capture showing the design tool which supports the AS3701A microPMIC
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Summary
The category of ‘wearable devices’ covers a very broad range of product types. The most common
type, however, is those worn on the wrist, chiefly smart watches and fitness bands.
The architecture of smart watches and fitness bands is becoming standardized, incorporating functional blocks including environmental and biometric sensing, wireless connectivity and a microcontroller. This is leading to the emergence of a new standard integrated power device, or microPMIC,
providing the different power outputs required by the sensors, radios and processor.
Here, ams describes the benefits of replacing the conventional power system design found in smart
watches with a microPMIC such as the AS3701. It shows how users can benefit from great savings
in board footprint, providing a huge boost to the power density of their designs.
It also describes the other benefits available from the use of a microPMIC including assembly cost
savings, a simpler board layout, and the availability of design and programming tools.
Biographies
Mark Shepherd is a staff field applications engineer for ams working in the Northwest US. Specializing in power management, he has worked for ams since 2011. He has more 20 years of experience in the electronics industry, and is a graduate of San Francisco State University with a BS in
electrical engineering.
Thomas Kail is product manager for power management products at ams, based at its headquarters near Graz in Austria. He is responsible for product definition and technical marketing for PMICs
and stand-alone ICs such as LDOs, DC-DC converters and LED drivers. He joined ams in 2006 as
an application engineer for power management products. He is a graduate of the Technical University of Graz with a masters degree in electrical engineering.
Stephan Kreszl has more than 10 years of experience in the electronics industry in the area of
measurement and automation. From 2001 to 2012 he worked for Anton Paar on in the production
line, responsible for the operation of laboratory measurement instruments.
In 2013 he joined ams as a hardware application engineer responsible for LDOs, DC-DC converters
and microPMICs.
He holds a diploma in electronic engineering from the technical institute for higher education in
Graz.
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For further information
ams AG
Peter Kammerlander
Product Manager
Tel: +43 (0) 3136 5000
[email protected]
www.ams.com
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