Download Fakulti: FAKULTI KEJURUTERAAN ELEKTRIK

Fakulti:
FAKULTI KEJURUTERAAN ELEKTRIK
Semakan
Tarikh Keluaran
Pindaan Terakhir
No. Prosedur
Nama Matapelajaran:
Kod Matapelajaran :
:1
: 2008
: 2008
: PK-UTM-FKE-(0)-10
SEW 4722
FAKULTI KEJURUTERAAN ELEKTRIK
UNIVERSITI TEKNOLOGI MALAYSIA
KAMPUS SKUDAI
JOHOR
MICROELECTRONICS LABORATORY
STUDENT PACK
Process & Device Simulation of an n-channel
MOSFET
Disediakan oleh
Nama
Disahkan oleh : Ketua Jabatan
Nama
:
Tandatangan
Cop
:
: Suhana Mohamed
Sultan
:
:
Tandatangan
Cop
:
:
Tarikh
:
Tarikh
:
1.
Problem/Project Guide:
(a) Problem-solving Time-line
You must know theoretically the fabrication processes of a typical semiconductor device. In order to be
familiarized with the TCAD simulation tool, refer to the manuals which are available in the lab.
Silvaco's ATHENA is used to simulate the processing conditions for the formation of the device. This will be
followed by device characteristics (analogous to electrical testing of the device) using ATLAS tool. The simulation
exercise is divided into 3 parts:
(1) Process simulation and modification to attain the target values of the parameters:Gate oxide thickness and
source-drain junction depth
(2) Observation of Punchthrough
(3) Method to suppress punchthrough and its effect on Vth
The objective of first part is to study the process flow of an n-MOSFET and tailor the process parameters to attain
specified values of gate oxide thickness and source/drain junction depth.
The second part is aimed at observing the punchthrough problem inherent to the device.
The third part is to solve the problem and observe the effect on Vth
As a guide, you should follow the time-line below.:
(a) Project-solving Time-line
Activities
1. Understand theory & problem,familiarize with tool,
brainstorming,get started with NMOS process simulation
2. Process Simulation,Do device characteristics, IV graphs
3. Introduce new process step to solve problem. Check if
problem solved. Otherwise go back to process simulation.
4. Demo/Presentation/Report Writing
Week 1
Week 2
Week 3
(b) Report Writing
Other then the general guide specified by laboratory coordinator, your report must include
1.
2.
3.
4.
Brief discussion of theory and problems
Proposed solution. Please include you processing input script.
Specified plots-IV plot, doping profiles etc.
Conclusion
2.
Software:
Silvaco International
3.
Additional resources:
(a) Silvaco Manuals can be obtained from the lab itself
4.
References:
[1]
S.M.Sze, VLSI Technology
[2]
N. Arora,MOSFET Models for VLSI Circuit Simulation, Springer-Verlag,1993
Week 4