Download Optoelectronic Module Circuit

Introduction
This update status report shows our progress and the results we have obtained
thus far and what is going to be completed before the end of the semester. The
optoelectronic module circuit was built and successfully tested. Also the VCSEL emitter
circuit was also successfully built and tested with the optoelectronic module circuit.
Optoelectronic Module Circuit
The D-Link DGE-500SX Gigabit Ethernet card contains an Agilent HFBR53D5EM optoelectronic module with support for SC fiber-optic connectors. The OE
module is a self-contained unit that is soldered to the D-Link Ethernet card. Using a
vacuum de-soldering iron the OE module was removed from the D-Link card. It was
then soldered onto the PCB, designed by Eric Pace, from last semesters design class.
With the OE module in place, surface mount capacitors and resistors were used to build
the rest of the circuit. Finally four SMA connectors and two 5V power receptacles were
used to complete the circuit. There are two sets of two SMA connectors. One set is for
the +/- transmit signal while the other is for the +/- receive signal. Figure 1, contains a
picture of the completed circuit board.
Figure 1. Picture of completed optoelectronics circuit board.
Surface mount components were difficult to solder, therefore soldering flux
should be used generously. It allows the solder to run or flow easier on the board without
sticking to the soldering iron tip when you pull away. A blunt object such as a ballpoint
pen or small flat-head screwdriver should be used to hold the surface mount component
while soldering. This will not damage the component. Finally if too much solder is
placed on the circuit board, it should be desoldered with the vacuum.
A loop back test was performed to test the completed circuit and to capture and
eye diagram of the data signal at 1.25 Gbps. The Tektronix GTS1250 GBIC Test System
(1250 Mb/s) was used to generate a pseudo-random data signal that was connected to the
+/- transmit SMA connectors of the circuit. The +/- receive signal was connected to the
Tektronix TDS7154 Digital Phosphor Oscilloscope (1.5 GHz, 20 GS/s) to observe the
data signal. Finally, the transmit and receive ports of the optoelectronic module where
connected together (loopback) using standard network fiber optic cable with SC
connectors. Figure 2, contains the screen capture from the oscilloscope showing the
Gigabit Ethernet mask eye diagram with the receive data signal from the circuit. The eye
is wide open with no data going through it. Therefore the circuit is a success.
Figure 2. Generated eye diagram for optoelectronics module.
The circuit did not work the first time it was connected to the test equipment. It
wasn’t until the third try that the circuit actually worked. For the first test, the power
receptacles were not properly soldered to the board. Therefore there was no DC power to
the circuit. To correct that, the power receptacles were mounted on the other side of the
circuit board so the proper contacts could be soldered. Second, the circuit board has
components on both sides and 4 through-holes that need to be connected between the two
sides. Only two were visible, the other two were covered with solder. A small piece of
30 AWG wire was used to connect all 4 though-holes together with solder. With these
changes to the circuit, the third attempt produced a successful eye diagram.
Circuit Implementation
In designing the emitter portion of the optoelectronics module, a vertical cavity
surface emitting laser (or VCSEL) is the most practicable device. We will be operating
in the 1 gigabit range, so our lasers need to be 1 Gbps or better. We investigated various
Honeywell, Lasermate, New Focus, and Mytel VCSELs. Each laser examined by these
manufacturers was 1250 Mbps or 1.25 Gbps.
Our final decision was the HFE4384-522 manufactured by Honeywell. It had a
slope efficiency of .15mW/mA and a threshold current of 3.5mA. An important
characteristic, the deterministic jitter, which determines how wide the eye on the eye
diagram will be, needs to be minimized to achieve a clear and open eye diagram. Other
characteristics, such as the peak optical power, forward voltage, and rise and fall times
can be found within the parameters chart illustrated in Figure 8.
Figure 8. VCSEL parameters of the HFE4384-522, manufactured by Honeywell.
The schematic used to build the VCSEL circuit is displayed in Figure 9. The
actual circuit is shown in Figure 10. The total resistance within the circuit needed to
equal to 50 ohms, which is the combination of the VCSEL resistance and another resistor.
Since the resistance within the VCSEL is approximately 25 ohms, another resistance of
25 ohms was needed in the circuit. Notice that this resistor is a surface mount component.
The circuit design consists of the SMA input in series with this 25 ohm resistor, which is
in series with the VCSEL. The VCSEL would be connected back to the SMA input in a
series orientation. The SC fiber output would be taking from the VCSEL.
Figure 9. Schematic of VCSEL circuit.
Figure 10. Actual VCSEL circuit
In testing this design, the GTS 1250 was connected to the SMA input of our
VCSEL circuit, which is connected to the orange SC fiber from lab via the SC fiber
output. The orange SC fiber was connected to the receiver connection on the Intel/Agilent
test board with the optoelectronics module from last semester. The optoelectronics
module was connected to the differential SMA, connected to a BNC, which was finally
connected to the Tektronics TDS 7154 Oscilloscope on channels one and two. Channel
three of the scope was the clock from the GTS 1250. Channel four was disconnected
because it is the sync for the GTS system and tends to cause problems with the triggering
on channel three.
Once the circuit was connected properly, it was observed that the circuit didn’t
work. The reason was that the circuit generated a test that had an AC coupled output.
This AC coupled output acts like a capacitor in the signal path that blocks DC. We need
DC. The solution was to add a DC source and another resistor in series. This orientation
is known as Bias T. The added DC voltage divided by the series resistance should be
equal to the bias current of the VCSEL. Looking back at figure 8, the bias current of the
VCSEL was within a range of 1.5mA to 6mA. To achieve a bias current within this
range, we picked a resistance of 2k. This resistance is used along with a power supply of
5 volts to achieve a bias current of 2.5mA. The revised VCSEL circuit is shown in figure
11. Notice that it is the original circuit with the Bias T added.
Figure 11. Revised VCSEL Circuit.
Once the changes were made to include the Bias T, the circuit was connected in
the same testing orientation as mentioned before. This revised circuit generated the
“open” eye diagram on the oscilloscope that shows it works. Figure 12 illustrates this
result. Notice that the status of the generated eye diagram indicates that it is passing.
Also, the total hits and failed waveforms are zero. This means that there was no bit error
generated for every 10^12 bits.
Figure 12. Generated Eye Diagram for VCSEL Circuit.
In addition to the VCSEL, the photodetector circuit was also designed, but it has
not yet been built or tested in the lab. An illustration of the potential circuit layout is
shown below in Figure 13.
Figure 13. Circuit layout of the photodetector circuit.
The resisitor value used in this circuit was determined using Equation 1 below.
R=
1
_
2pi * f * Cdet
(Eq. 1)
The capacitance, Cdet, is the capacitance of the photodetector. We have not used the
unconnectorized photodetectors, but we have used the capacitance for them. We do not
expect the connectorized photodetectors until the end of the week. At that time we will
use the specifications of them. A resulting impedence of 53.1 Ohms was produced by
using a capacitance of 1.5 pF. This data was determined according to a frequency
response of 1.25 GHz.
In addition, the ideal value for both capacitors in the
photodetector circuit is 0.01 uF. This value was obtained from the website.
Conclusion
The optoelectronic module and VCSEL emitter circuit were both tested with the
GTS and oscilloscope and both had an open eye. The next step for our design group is to
complete the board layout for the emitter and photodetector circuit boards. Finally, once
the photodetectors arrive we will build the circuit containing them and test it with the
optoelectronic module to verify and open eye.