Download Patel Rashi I.(130940109085)

Name & Er. No.:Patel Rashi I.(130940109085)
Patel Jinal B.(1409403109029)
Patel Priya R.(1409403109015)
Patel Nikita A.(1409403109012)
Patel Varish J.(1409403109016)
Patel Chirag B.(1409403109028)
TOPIC:ZERO CROSSING DETECTOR
WINDOW DETECTOR
SCHMITT TRIGGER
SAMPLE AND HOLD CKT
ZERO CROSSING DETECTOR:
Circuit diagram:-
CIRCUIT
OPERATION:-
Zero crossing detector is as in fig. is nothing but
the basic comparator circuit with a zero
reference vtg applied to the non-inverting.
 Out put is –v(sat) for v(in)>0 and +v(sat) for
v(in)<0

INPUT &
OUTPUT VTG WAVEFORM:-
When the input sine wave crosses zero and becomes
positive at instant t=0, the differential input vtg v(d)
becomes negative and the output vtg will to –v(sat).
 At the t=t/2 ,the differential input vtg becomes
positive and the output voltage will swing to +v(sat) as
now the (+) terminal is more positive than the (-)
terminal.

The zero crossing detector thus switches its
output from one state to the other every time
when the input crosses the zero,
 The zero crossing detector is also known as a
sine wave to square wave converter.

WINDOW

COMPARATOR:-
Circuit diagram:-
OPERATION
CIRCUIT:-
The window detector ckt using two comparator is a
shown fig. the ckt in unknown vtg v(in) ,reference
voltage V(H) &V(L).
 If V(in) between two reference vtg i.e.;
V(L)<V(in)<V(H) then the output of both comparator
will be high.
 The output vtg will be equal to V(cc)
V(0)=+V(cc); for V(L)<V(in)<V(H)

This will output vtg comparator it two low condition:(1)V(0)=V(CE)=low;for V(in)<V(L)
(2) V(0)=V(CE)=low ;for V(in)>V(H)

Conclusion:- a high o/p vtg indicate that the i/p vtg
within the window where a low o/p vtg indicates that
the i/p vtg is out of the window.
INPUT &
.
OUTPUT VTG WAVEFORM:-
SCHMITT TRIGGER:


(1)
(2)
Schmitt Trigger is also called Regenerative
Comparator.
The comparator which use the positive feedback is
known as the Schmitt trigger or negeneration
comparator.
Types of Schmitt Trigger:Inverting Schmitt trigger
Non-inverting Schmitt trigger
INVERTING SCHMITT

.
TRIGGER:-
OPERATION
OF CIRCUIT:-
In Schmitt trigger the reference vtg is V1 is vtg
developed across R2,this reference vtg is not fixed
but its amplitude and sign depend on the o/p vtg
V1={R2/R1+R2}*V(0)
two diff.trigger vtg are defined below team:(1)
Upper threshold voltage(UTV)
(2)
Lower threshold Voltage(LTV)


The upper trigger and lower trigger level is same to
+V(sat) to –V(sat)
INPUT & OUTPUT VTG INVERTING SCHMITT
TRIGGER WAVEFORM:-
TRANSFER CHARACTERISTIC OF
INVERTING SCHMITT TRIGGER:-
HYSTERESIS VOLTAGE V(HV):
The loop gain and Hysteresis of the Schmitt trigger
is therefore depends on the values of resistor R1 &R2
and the value of V(sat) of the OP-APM.
NON-INVERTING SCHMITT

Circuit diagram:-
TRIGGER:-
 The
exranl i/p signal is being applied to noninverting (+) terminal of the OP-APM and two
resistor R1&R2 are connected a positive feedback.
 The Upper trigger & Lower trigger in which same
value V(in) in that V1=0 and o/p transition from
+V(sat) to –V(sat).
 Applying the superposition theorm,then voltage
equation then;
The UTV &LTV equation below;
INPUT & OUTPUT VTG NON-INVERTING
SCHMITT TRIGGER WAVEFORM:-
HYSTERESIS VOLTAGE V(HV):-
EFFECT
OF
HYSTERESIS:-
Hysteresis improves the noise immunity.
 It reduces the response time.
 Increased Hysteresis will make the sensitivity poor.
 Hysteresis reduces the possibility of false triggering
produced by noise.

SAMPLE AND HOLD

Circuit diagram:-
CIRCUIT:-
 The
sample and hold circuit in fig. show that using
an op-amp with an E-MOSFET. in this ckt the EMOSFET work as a switch that is controlled by the
sample and hold control vtg V(s) and capacitor
stroge a energy.
 On the when, V(s) is zero, the E-MOSFET is off
and open switch, then i/p resistance of op-amp vtg
follower is also very high.
 The time periods T(H) of V(s) during which the vtg
across the capacitior is constant are called hold
periods.
 In the application in a high speed op-amp is helpful
INPUT &
OUTPUT VTG WAVEFORM:-
USED
A
A SAMPLE-HOLD CIRCUIT:-
signification reduction in size & improved
can be using that a designed sample and hold
IC such the LF398.
 LF398 in required only an external storage
capacitor.
 That used in digital interfacing and
communication such as a analog to digital.
 Used to pulse modulation system.
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