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318-595 Project Lab 1C Project Proposal • Objectives – – – – Present Capstone Project Proposal Modifications & Approvals Refinement of Standard & Performance Requirements Detailed Block-Block Interface Definitions Present P1 in Lab - Next Week 10 Minutes/Team 318-595 Project Lab 1C Project Proposal Presentation – P1 • Deliverable 1 - Team – Powerpoint slide set used for “P1” which captures Labs 1A-B 1. Team Number, Names & Brief Description of Expertise 2. Available Project Resource Summary 3. Initial Project Proposals including simple block diagrams 4. Selection Process including systematic scoring system 5. Recommended Project Description 6. Perf Requirements Summary 7. Std Requirements Summary 8. Basic Business Case 9. Refined Block Diagram 10. Block Diagram Description Table 11. Block Signal Tables 12. Key Patents and Mitigation Strategy 13. Key Ethical/Societal Issues and Mitigation Strategy Block Tab Order in Reqs File Block # 318-595 Project Lab 1C Block Diagram Description Block Name Owner Brief Description Of Block Function Power Interface s Digital Interfaces Analog Interface s 1 Power Supply J. Doe Converts Commercial AC Power to 5VDC and +/-12VDC with 1 hour battery backup if AC fails In: AC Out: 5VDC, +/-12VDC None Out: Vbat 2 CPU & Clock A. Student Senses User I/F Switches for command inputs and updates display periodically, digitizes Vbat In: 5VDC Out: Data Bus, Addr Decode In: Port A In: Vbat 3 User Interface Z. Engineer Provides user inputs for continuous speed, dir and binary control of lights. Provides user output display for speed, temp & battery life. In: 5VDC, +12VDC In: Data Bus Out: Port A None 4 5 6 7 318-595 Project Lab 1C Block Interface Signals • Deliverable 2 – Individual Assignment for Block Owners 1. For Each Design Block: Define and document all of your Block-Block Interface Signals in the spreadsheet template included within the 3 main areas: • • • Power Signals including Power Consumed, Power Supplied Digital Interface Signals (including busses) Analog Interface Signals 2. Review ALL “Inter-block” signals and document Approval and “OK” in your spreadsheets to record signal agreements. 3. See attached Block Interface Signal Table Excel Tool • • • Summary Tab is Locked Data Flows from Power, Digital and Analog Tabs Some Cells have pull-down selections, Others are Free Form Values BLOCK OUTPUTS NEED TO AGREE WITH BLOCK INPUTS !!! 4. Deliverables for each block include: • • Block Interface Excel File – Electronic Powerpoint Summary Slide – Electronic and Paper 318-595 Project Lab 1C Block Signals: Summary Table • This tab is locked and all information flows from individual Power, Digital and Analog Tabs 318-595 Project Lab 1C Block Signal Table: Power Power Signal Blocks & Design Guidelines • • • • • • • • • • • Block Numbers Used for To-From Column Assume ALL Blocks will consume power Consumers block owners provide; nominal voltage, max current, & max oper voltage range Blocks that supply power may also consume it and must allow for their inefficiencies Signal names should include nominal voltage (eg; 5V, 5VCC, +/-12V, etc) For all analog signals you will need DC supplies that span wider than analog voltage range Power Supply Current Capacity Should be Designed to Provide Demand + 50% Min Margin Try to keep DC voltage supplies at standard values including 3.3, 5, 9, 12, 15 & 24 VDC Must specify both nominal and range of voltages Must specify maximum total current for each voltage Frequency range for AC voltages 318-595 Project Lab 1C Block Signal Table: Digital Digital Signal Blocks & Design Guidelines • Block Numbers used for To-From Column • A digital signal is one that conveys two levels of information (ie; 1/0, On/Off, etc) • Must specify direction from viewpoint of YOUR block: Input, Output or Bidirection • Must specify Block-Block Interconnect Means for each signal • For Inputs classify as Standard or Schmitt Trigger • Inputs must specify Vih(min), ViL(max), (or Vth), Iih(max) and IiL(max) limits • For Outputs classify as Totem Pole, Open Collector, or Tristate • Outputs must specify Voh(min), VoL(max), Ioh(max) and IoL(max) limits • If unsure, start by assuming Std TTL levels, Std Input, Totem Pole Output Std TTL: Vih => 2.0V, ViL <= 0.8V, Iih <= 40uA, IiL <= -1.6mA; 16mA • Voh => 2.4V, VoL <= 0.4V, Ioh <= -400uA, IoL <= For noisy or slow transition digital signals, use a Schmitt trigger input 318-595 Project Lab 1C Block Signal Table: Analog Analog Signal Blocks & Design Guidelines • Block Numbers used for To-From Column • Analog signals may be Input, Output or BiDirectional • Signals that are not Power nor Digital are by default Analog signals • Must specify Block-Block Interconnect Means for each signal • Classify the coupling of the signal as Direct, Capacitive, Xfmr or Other • Classify the maximum voltage (amplitude), use peak values not RMS • For input signals, classify the min-max input impedance • For output signals, classify the min-max output impedance • Bidirectional signals require both input and output impedance classifications • Classify the min-max frequency range for each signal • List the maximum leakage current allowed for the signal if applicable 318-595 Project Lab 1C Ethics & Intellectual Property • Deliverable 3 - Team A. Identify at least 3 “active” patents that would be worthwhile understanding for your recommended project • • • • Patent Number Patent Name or Title (Page 1) Patent Date Mitigation Strategy: Design Around or Likely Royalty B. From Lab 1B, Document the 2 most serious Ethical/Societal Issues that could arise in your project and how you could mitigate Some key questions to consider • • • • • • Are there hazards the product presents to the user? Could the product fail in some way to cause harm to the user? How can you prevent a product failure from causing injury or harm? What if the engineering is faulty, flawed or incorrect? Any Consequences? What are the key areas of the engineering that need to be 100% correct? How can you insure there is faulty or flawed engineering in those areas? 318-595 Project Lab 1C How do I find Patents? Internet Sites - Sites offer limited key word searching www.uspto.gov www.us-patent-search.com www.msoe.edu/library/patent_searching/index.htm Try to find at least 3 patents that may be applicable to your recommended project/product • List the patent(s) number, title and date on 1 slide • Include a comment regarding your ability to design around or likely royalty