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COSC 201
Fall, 1999
Exam 1
Name__________________
1. Define or describe the following:
a. Assembly language
A language for which each instruction is a mnemonic for a corresponding machine
instruction, with the exception of a few “pseudo-instructions” which translate into a very
few machine instructions. Compilers translate high-level languages into assembly
code, which an assembler then translates into machine code.
b. Instruction Set Architecture
The specification of the binary machine instructions that a machine can execute,
including the exact layout in the bit pattern for an instruction of the opcodes, the
addressing, and any registers used. The ISA provides the abstraction on which higherlevel languages are built and for which different implementations of the machine can be
built.
c. Benchmark Suite
A collection of programs that are used to test the performance of computers. The
SPEC benchmark is one example of a benchmark suite developed by a consortium of
manufacturers and users.
d. PC-relative addressing
Specifying the address of an instruction by giving the offset from the current value in the
PC register. This mode of addressing is used in MIPS for beq and bne instructions.
COSC 201
Fall, 1999
Exam 1
Name__________________
e. Register
A storage unit for storing a string of bits, typically one “word,” in a computer. Usually
comprised of flip-flops.
f. Clock cycle
The span from one point in a clock signal to the next identical point, e.g. from falling
edge to falling edge. E.g., the bold part in the diagram below.
g. Edge-triggered
An event which occurs when the clock cycle in at an edge. The first bold line in the
diagram below is a “falling edge,” the second a “rising edge.” In reality, the event
occurs over short interval from just before the falling edge until just after. Flip-flops are
edge-triggered memory circuits.
h. SRAM
Static Random Access Memory. Memory devices which use transistors circuits such as
latches for storing data so that the values saved in the device are retained for as long
as power is supplied, with no need to “refresh” memory (as is needed for DRAM).
COSC 201
Fall, 1999
Exam 1
Name__________________
2. Suppose you have the following instruction set mix:
Instr type
A
B
C
CPI
1
2
4
% in program
40
40
20
a. What is the average CPI for this mix?
1*0.4 + 2*0.4 + 4*0.2 = 2.0
b. If the clock rate is 200 MHz, what is the MIPS for this machine/instruction mix?
Instructions per sec = cycles per second / cycles per instruction =
= 200 * 10^6 cycle/sec
/ 2.0 CPI
= 100 * 10^6 instr / sec = 100 MIPS
c. Why is MIPS not by itself a good basis for determining the performance of a given
machine?
MIPS does not take into account how much work is done by each instruction. For
example, even on the same machine, one compiler might create code for a program
which takes longer to run than the code from another compiler, even though it has a
higher MIPS rating. The same may be different for different computers, because the
amount of work each instruction does can vary.
A machine may be given a peak MIPS rating (e.g. using only type A instructions from
above) or a favorable MIPS rating (using a good mix from above) to promote a good
impression, when real MIPS for your programs may be quite different.
3. a. Write MIPS assembly code that will execute the following C statement. Assume
that the following registers are used to represent the variables.
a
b
c
in register $s0
in register $s1
in register $s2
a = (a + b) + (c – 12)
addi $t0, $s2, -12
addi $s0, $s0, $s1
add $s0, $s0, $t0
Note: it is incorrect to use $s1 or $s2 for intermediate results,
that destroys the values of b and c, which is not in the code
COSC 201
Fall, 1999
Exam 1
Name__________________
b. Write MIPS assembly code that will execute the following C if statement. Assume
that the following registers are used to represent the variables:
k
in register $s0
base address of list in register $s1
count
in register $s2
if(list[k] < 0){
count = list[k];
}
else {
count = 0;
}
add
add
add
lw
$t0,
$t0,
$t0,
$t1,
$s0, $s0
$t0, $t0
$t0, $s1
0($t0)
slti
beq
$t2, $t1, 0
$t2, $zero, else
add
j
$s2, $t1, $zero
endif
add
$s2, $zero, $zero
#could use one line
else:
endif:
sll $t0, $s0, 2
COSC 201
Fall, 1999
Exam 1
Name__________________
4. Consider the following function prototype for C++:
int
Combo(int a, int b);
Assume that the function Combo has six local variables stored in registers s0, s1, s2,
s3, t0, and t1, and assume that the function makes calls to other functions. Outline the
steps needed to execute the following function call in assembly code, assuming the
variables are assigned to registers, x in $s4, a in $s0, b in $s1.
x += Combo (a, b);
You may answer by explaining the steps in words, or by writing assembly code with
comments explaining the purpose of each statement, or a mix of the two. If you are
unsure whether something needs to be done, put it in. Include all operations done by
the caller function (the function where the above line of code occurs) and the callee
function (the function Combo) that are needed to make the function call work.
In caller function
1. Place parameters in a registers
2. Jump and link (putting return
address into $ra and jumping to
function)
8. Use returned value
In function Combo
3.a. Adjust stack pointer
b. and save state
(s registers used and
ra register)
add $a0, $s0, $zero
add $a1, $s1, $zero
jal Combo
add $s4, $v0, $zero
Combo:
addi
sw
sw
sw
sw
sw
$sp, $sp, -20
$s0, 16($sp)
$s1, 12($sp)
$s2, 8($sp)
$s3, 4($sp)
$ra, 0($sp)
4. Move parameters into locals
add
add
5. Execute function, placing
return value in v register(s)
<body of function>
add $v0, xxx
6.b. retore state
(s registers used and
ra register)
lw
lw
lw
lw
lw
addi
$s0, 16($sp)
$s1, 12($sp)
$s2, 8($sp)
$s3, 4($sp)
$ra, 0($sp)
$sp, $sp, 20
jr
$ra
a. readjust stack pointer
7. Return to caller
$s0, $a0, $zero
$s1, $a1, $zero
COSC 201
Fall, 1999
Exam 1
Name__________________
Vc
5. Draw the transistor circuit for a 3-way OR gate.
Out
Vc
In 1
In 2
In 3
6. Draw the logic gate circuit for a decoder with 3 input lines and the appropriate
number of output lines. Where might such a circuit be used?
D0
D1
In 2
In 1
D2
D3
D4
In 0
D5
D6
D7
COSC 201
Fall, 1999
Exam 1
Name__________________
7. Consider the following diagram.
a. The two parts of the circuit that are boxed are identical. Explain what one of
these circuits by itself is and how it works.
Each of these circuits is a D-latch. When the clock is high, whatever value is on
the Data In line is stored and is also on the data out line. When the Clock is low, the
stored value remains captured on the Out (Q) line, regardless of any changes on the
Data In line. The ~Q line has the opposite of the Q line.
b. The complete circuit forms a standard unit. Describe what it is and how it works.
The whole Circuit is a flip-flop, which also stores a single bit value. However, in a
flip-flop, the value on the Data-In line is stored during the falling edge of the clock.
While the clock is high, the first (master) latch is open and captures the data value.
When the clock falls through the falling edge to low, the second (slave) latch (using
the negated clock) is open, capturing the signal on the first latch. If the data In
signal changes while the clock is low, it will not affect the stored value because the
master latch is closed and will not change. If the data value changes while the clock
is high, it will change the master latch, but not the slave. It is only the value on the
end of the high signal, kept on while the clock falls to low that is captured.