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Analogue Input/Output Many sensors/transducers produce voltages representing physical data. To process transducer data in a computer requires conversion to digital form. Examples: reading temperature from a thermocouple processing speech from a microphone Many output devices require variable control, not just two digital logic levels To control these devices from a computer requires conversion from digital to analogue form. 5-1 Analogue Output Digital to Analogue Converter (DAC) DAC Characteristics = 1/2n where n is the number of bits – step size Max. digital output = 2n – 1 output voltage range – determined by reference voltage (Vref and AGND) Step size in volts = resolution x voltage range Max output voltage = (2n – 1)/ 2n x voltage range uni-polar / bipolar types slew rate – rate of change of output. interface – parallel (fast) or serial (slower but uses fewer connections) resolution 5-2 DAC principles – Example 4-bit DAC Sum currents with operational amplifier 1 d3 2R R Vref/2 Vo = - Vref(Rf/Rinput) 4R Vref/4 0 d2 8R Vref/8 + 1 d1 1 Vref 16R Vo Vo = -Vref(digital value/2n) Example: with 4-bit value = 1011 Vref/16 Vo = -Vref(d3/2 + d2/4 + d1/8 + d0/16) Vo = -Vref(1/2 + 1/8 + 1/16) d0 AGND Vo = -Vref(11/16) 5-3 Digital to Analogue conversion Previous design needs many different precise resistor values Resisters need to have a tolerance less than the resolution. E.g. 8-bit resolution = 1:28 = 1/256 = 0.00390625 resolution = 0.390625% Alternative is R-2R ladder arrangement R-2R ladder - only requires 2 different resistor values. 5-4 Analogue Input Main types (methods) of ADC approximation – good all-rounder Flash – fastest type Sigma-delta – good for audio Dual slope integrating – slow but high resolution with good noise immunity others – Sampling, ramp, charge balancing Successive Characteristics resolution conversion method conversion time input voltage range interface – parallel (fast) or serial(fewer connections) 5-5 ADC Block diagram Interrupt request Conversion Control AN0 AN1 ANn M u t i p l e x e r Busy Start conversion Sample & Hold Converter VAREF Result Register VAGND Reference voltage 5-6 ADC – principle of operation 1. 2. 3. 4. 5. The voltage is presented to the ADC input. The ADC is sent a signal to start conversion While the conversion takes place the input voltage should remain stable. The ADC outputs a signal to indicate that it is busy doing the conversion and should not be disturbed. When the conversion is completed the ADC makes the result available and outputs a signal to indicate that the conversion has completed (e.g remove the busy signal) 5-7 Multiplexer To convert several analogue inputs 1. use an ADC for each input or … 2. use one ADC and switch the inputs through a multiplexer requires selection of input before each conversion is started short delay required before conversion started to allow switching to occur and signal to settle. 5-8 Sample and Hold Circuit Sample and Hold (S&H) while conversion takes place voltage must remain stable sample voltage – input connected to S&H voltage held on a capacitor sample time – charging time of capacitor input signal disconnected from S&H 5-9 167 ADC 10-bit resolution, 16 channels using Port 5 which has 16 input only lines, extra 8 channels using Port 1. Input voltage range 0 to +5Volts Conversion modes: Fixed Channel Single Conversion - produces just one result from the selected channel Fixed Channel Continuous Conversion - repeatedly converts the selected channel Auto Scan Single Conversion - produces one result from each of a selected group of channels Auto Scan Continuous Conversion - repeatedly converts the selected group of channels Wait for ADDAT Read Mode - start a conversion automatically when the previous result is read Channel Injection Mode - insert the conversion of a specific channel into a group conversion (auto scan) 5-10 167 ADC – SFR's and Port pins 5-11 ADC channels The analog input channels AN15 … AN0 are alternate functions of Port 5 which is an input-only port. Port 5 may either be used as analog or digital inputs. For pins are used as analog inputs it is recommended to disable the digital input stage via register P5DIDIS. This avoids undesired cross currents and switching noise while the (analog) input signal level is between V IL and V IH . The analog input channels AN23 … AN16 are alternate functions of Port1 which is an IO port. The port lines P1L.7-0 may either be used as analog inputs or digital IOs. P1DIDIS performs the same function for Port 1 as P5DIDIS does for Port 5. 5-12 ADCON SFR 5-13 ADCON SFR 5-14 ADDAT – ADC Result Register 5-15 ADC completion When a conversion completes the ADCIR bit in the ADCIC SFR is set. ADCIR may cause an interrupt to occur Programmer can use either polling or interrupts – check status of ADCIR bit (could possibly use the ADBSY bit) Interrupts – a future lecture Polling 5-16 Fixed Channel Conversion Modes These modes are selected by programming the mode selection bitfield ADM in register ADCON to ‘00 B ’ (single conversion) or to ‘01 B ’ (continuous conversion). After starting the converter through bit ADST the busy flag ADBSY will be set and the channel specified in bit fields ADCH/ADX will be converted. After the conversion is complete, the interrupt request flag ADCIR will be set. In Single Conversion Mode the converter will automatically stop and reset bits ADBSYand ADST. In Continuous Conversion Mode the converter will automatically start a new conversion of the channel specified in ADCH/ADX. ADCIR will be set after each completed conversion. When bit ADST is reset by software, while a conversion is in progress, the converter will complete the current conversion and then stop and reset bit ADBSY. 5-17 Sample ADC program /* Filename : fcsc.c Author : Alan Goude Date : 21/11/02 Version 1.0 Program to read ADC channel 2 using Fixed channel Single Conversion */ #include <stdio.h> /* standard I/O .h-file*/ #include <reg167.h> /* SFRs for 167 cpu's */ /* Function declarations */ void serial_init(); void main (void) { int adc_value; serial_init(); /* initialize the serial interface */ 5-18 (Contd.) // Initialise ADC for Fixed Channel Single Conversion on chan. 2 // fCPU = 20MHz = 50nS // ADCTC = 00: fBC = fCPU/4 = 5MHz : Tbc = 200nS // ADSTC = 00: Sample time = Tbc x 8 = 1600nS = 1.6uS // Total conversion time = Sample time + 40 x Tbc + 2 x Tcpu // = 1.6 + 8 + 0.1 = 9.7uS ADCON = 0x0002; //0000 0000 0000 0010 while (1) //do this endlessly! { ADCIR = 0; // Reset Interrupt request bit ADST = 1; //start conversion // wait for ADC to complete while(ADCIR == 0); adc_value = ADDAT & 0x03ff; // mask out top 6 bits printf("ADC Result = %d\n", adc_value); printf("ADC voltage = %7.5f\n", 5.0/1024 * adc_value); } }//end of main 5-19 ADC function int read_adc(int channel) { int adc_value; ADCON = (ADCON & 0xfff0) | channel; ADCIR = 0; // Reset Interrupt request bit ADST = 1; //start conversion // wait for ADC to complete while(ADCIR == 0); adc_value = ADDAT & 0x03ff; // mask out top 6 bits return adc_value; } Assumes ADCON register initialised elsewhere. The initialisation could be incorporated into the function. 5-20