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Altera Voltage Sensor IP Core User Guide
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TOC-2
Contents
Altera Voltage Sensor IP Core Overview............................................................ 1-1
Altera Voltage Sensor IP Core Getting Started.................................................. 2-1
IP Catalog and Parameter Editor............................................................................................................... 2-1
Specifying Parameters and Options...........................................................................................................2-1
Altera Voltage Sensor Parameters.............................................................................................................. 2-2
Altera Voltage Sensor IP Core Functional Description......................................3-1
Voltage Sensor Controller Core..................................................................................................................3-1
Conversion Modes........................................................................................................................... 3-2
Sample Storage Core.................................................................................................................................... 3-2
Configuring the Voltage Sensor Controller.............................................................................................. 3-3
Configuring the Voltage Sensor Controller with Avalon-MM Sample Storage.......................3-3
Configuring the Voltage Sensor Controller with External Sample Storage..............................3-3
Altera Voltage Sensor IP Core Interface Signals.................................................4-1
CSR Interface................................................................................................................................................ 4-1
Response Interface....................................................................................................................................... 4-1
Interrupt Interface........................................................................................................................................4-2
Altera Voltage Sensor IP Core Registers.............................................................5-1
Voltage Controller Core Registers..............................................................................................................5-1
Sample Store Core Registers....................................................................................................................... 5-3
Additional Information for Altera Voltage Sensor IP Core User Guide............6-1
Document Revision History....................................................................................................................... 6-1
How to Contact Altera.................................................................................................................................6-1
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Table 1-1: Release and IP Core Information
Item
Release Information
Version
16.0
Release
May 2016
Core Features
Monitors the following:
• critical on-chip power supplies
• external analog voltage
Supports access from the following:
IP Core Information
• JTAG access
• FPGA core access
Device Family
Supports Arria® 10 devices
Device Tools
Quartus® Prime software
© 2016 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
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Altera Voltage Sensor IP Core Getting Started
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The Quartus Prime software includes installation of the Altera Voltage Sensor IP core.
IP Catalog and Parameter Editor
The IP Catalog displays the installed IP cores available for your design. Double-click any IP core to launch
the parameter editor and generate files representing your IP variation. Use the following features to help
you quickly locate and select an IP core:
• Filter IP Catalog to Show IP for active device family or Show IP for all device families. If you have no
project open, select the Device Family in IP Catalog.
• Type in the Search field to locate any full or partial IP core name in IP Catalog.
• Right-click an IP core name in IP Catalog to display details about supported devices, open the IP core's
installation folder, and click links to IP documentation.
• Click Search for Partner IP to access partner IP information on the web.
The parameter editor prompts you to specify an IP variation name, optional ports, and output file
generation options. The parameter editor generates a top-level Qsys system file (.qsys) or Quartus Prime
IP file (.qip) representing the IP core in your project. You can also parameterize an IP variation without an
open project.
The IP Catalog is also available in Qsys (View > IP Catalog). The Qsys IP Catalog includes exclusive
system interconnect, video and image processing, and other system-level IP that are not available in the
Quartus Prime IP Catalog.
Related Information
Creating a System with Qsys
Specifying Parameters and Options
Follow these steps to instantiate the Altera Voltage Sensor IP core parameters and options.
1. Create a Quartus Prime project using the New Project Wizard available from the File menu.
2. On the Tools menu, click IP Catalog.
3. Under Installed IP, double-click Library> Basic Functions> Configuration and Programming>
Altera Voltage Sensor.
4. Specify an entity name for the custom IP variation and select the targeted Altera device family. Click
OK.
© 2016 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
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Altera Voltage Sensor Parameters
5. In the Altera Voltage Sensor parameter editor, specify the core variant and the memory type for your
application.
6. Click Generate HDL and proceed to the next prompt window.
7. Click Generate to generate the IP core and supporting files, including simulation models.
8. Click Close when file generation completes.
9. Click Finish.
Altera Voltage Sensor Parameters
You can use the GUI parameters to configure the Altera Voltage Sensor IP core.
Table 2-1: Altera Voltage Sensor Parameters
Parameters
Description
Core Variant
There are two configuration variants of the
Altera Voltage Sensor IP core. Select the core
variant that meets your requirement. For more
information, refer to the related information.
Memory Type
Select the memory type that you use to store the
voltage sample—on-chip memory or register.
Related Information
• Voltage Sensor Controller Core on page 3-1
• Sample Storage Core on page 3-2
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Altera Voltage Sensor IP Core Functional
Description
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The Altera Voltage Sensor IP core consists of the following:
• voltage sensor controller core
• sample storage core
Voltage Sensor Controller Core
The voltage sensor controller core contains command register and conversion sequence data. You can use
the command register to configure your intended conversion mode. This core also contains control logic
which communicates with the voltage sensor hard IP block. You can access the register through the Avalon
Memory-Mapped (Avalon-MM) slave interface. This core uses the Avalon Streaming (Avalon-ST)
interface to send response.
Figure 3-1: Voltage Sensor Controller Block Diagram
clock
reset
CSR
altera_voltage_controller
S
Command Register
Controller
FSM
SRC
response
Hard
Block
Wrapper
This voltage sensor controller core receives commands through the Avalon-MM slave control and status
register (CSR) interface. The command includes mode and sequences. This core decodes the command
and drives the signals that are connected to the voltage sensor controller core accordingly.
The voltage sensor controller core supports 3 defined sequences:
• Channel 0 to Channel 1
• Channel 0 to Channel 7
• Channel 2 to Channel 7
This core allows you to monitor separate channels. You can configure the sequences during run time.
© 2016 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
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Conversion Modes
Conversion Modes
The voltage sensor controller core supports two modes of conversion that you can control using the
command register.
One Round Conversion
When you set the RUN bit, conversion starts with either sequence or channel (by setting MD bits) and stops
when a conversion is complete. The hardware automatically clears the RUN bit.
Continuous Conversion
When you set the RUN bit, conversion starts with either sequence or channel (by setting MD bits) and
when a conversion is complete, the conversion repeats the same set of conversion again. For example, if
you choose the sequence for Channel 0 to Channel 7, the IP block restarts the whole sequence when the
Channel 7 sample is complete. For a single channel read (MD = 2'b11), the IP block reads the value from
that channel until the RUN bit is cleared. In this continuous conversion mode, the software clears the RUN
bit.
Sample Storage Core
The sample storage core stores voltage samples. The control core passes the voltage samples to this core
through the Avalon-ST interface. The on-chip RAM stores the voltage samples and you can retrieve them
through the Avalon-MM slave. This core provides an option to generate an interrupt when it retrieves a
block of voltage samples using one full round of conversion sequence.
Figure 3-2: Sample Storage Core Block Diagram
clock
reset
CSR
IRQ
altera_voltage_sample_store
SNK
S
8 Entries
RAM for Voltage
Sample Storage
IER Register
ISR Register
response
RAM
Control
Interrupt
Control
You can parameterize the internal RAM as on-chip memory or register.
The core stores the sample on per slot basis instead of per channel basis. The sample storage core asserts
interrupt request (IRQ) when it receives a complete block of samples. You can disable the IRQ assertion
during run time. If you disable the IRQ assertion, the software must perform polling method to know
when the core receives a complete block of samples.
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Configuring the Voltage Sensor Controller
3-3
Configuring the Voltage Sensor Controller
You can configure the voltage sensor controller through the following methods:
• Configuring voltage sensor controller with Avalon-MM sample storage—to support low performance
system.
• Configuring voltage sensor controller with external sample storage—for high performance data
streaming.
Configuring the Voltage Sensor Controller with Avalon-MM Sample Storage
Figure 3-3: Voltage Sensor Controller with Avalon-MM Sample Storage
clock
reset
CSR
altera_voltage_controller
SRC
S
altera_voltage_sample_store
S
CSR
IRQ
SNK
This configuration mode allows you to use the voltage sensor controller with internal on-chip RAM to
store samples. The host sends one command and waits until the storage sends interrupt to read the data. In
this configuration mode, the controller captures a block of voltage sample data and stores them inside an
on-chip RAM. The host processor retrieves the data before triggering another request.
Configuring the Voltage Sensor Controller with External Sample Storage
Figure 3-4: Voltage Sensor Controller with External Sample Storage
clock
reset
CSR
altera_voltage_controller
S
SRC
response
This configuration mode allows you to use the voltage sensor controller while processing or storing the
voltage samples through Avalon-ST samples.
Altera Voltage Sensor IP Core Functional Description
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This section describes the interfaces used for the voltage sensor controller core.
CSR Interface
The interface type is Avalon-MM slave.
Table 4-1: CSR Interface
Signal
Width
1 or 4
address
Description
Avalon-MM address bus. The address bus is in the
unit of Word addressing.
• The address width for altera_voltage_
sensor_sample_store is 4.
• The address width for altera_voltage_
sensor_controller is 1.
read
1
Avalon-MM read request.
write
1
Avalon-MM write request.
writedata
32
Avalon-MM write data bus.
readdata
32
Avalon-MM read data bus.
Response Interface
The interface type is Avalon-ST.
Table 4-2: Response Interface
Signal
valid
Width
1
Description
Indicates from the source port that current
transfer is valid.
© 2016 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
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Interrupt Interface
Signal
Width
3
channel
Description
Indicates which channel the voltage sample data
is corresponding to for current response.
• Bits 16:8 — not used.
• Bits 7:0 — Channel 7 to Channel 0.
data
6
Voltage sample data.
startofpacket
1
Indicates from the source port that current
transfer is the start of the packet.
endofpacket
1
Indicates from the source port that current
transfer is the end of the packet.
Related Information
Voltage Sensor
Provides more information about the voltage sensor in Arria 10 devices.
Interrupt Interface
The interface type is interrupt.
Table 4-3: Interrupt Interface
Signal
irq
Altera Corporation
Width
1
Description
Interrupt request.
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Voltage Controller Core Registers
Table 5-1: Controller Core Registers
Offset
0x0
Register
Name
Bits
Field
RO/RW
13..31
Reserved
—
12
CAL
RW
Description
Reset Value
Reserved.
0x0
Determines whether
the output data is using
calibrated or noncalibrated value.
0x0
• 0 indicates noncalibrated value
• 1 indicates
calibrated value
Command
You must not use this
bit to enable calibra‐
tion.
11
BU1
RW
10
BU0
RW
Unipolar selection for
Channel 0 or 1.
0x0
0x0
• 0 indicates unipolar
selection
© 2016 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
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Voltage Controller Core Registers
Offset
Register
Name
Bits
Field
RO/RW
Description
Reset Value
9
MD1
RW
0x0
8
MD0
RW
Mode select for channel
sequencer.
0x0
• MD[1:0] = 2'b00
indicates channel
sequencer cycles
from Channel 2 to
Channel 7
• MD[1:0] = 2'b01
indicates channel
sequencer cycles
from Channel 0 to
Channel 7
• MD[1:0] = 2'b10
indicates channel
sequencer cycles
from Channel 0 to
Channel 1
• MD[1:0] = 2'b11
indicates channel in
CHSEL to be
converted
7
Reserved
—
4:6
CHSEL
RW
3
Reserved
—
1:2
MODE
RW
Reserved.
0x0
Specifies the channel to
be converted and used
when MD[1:0] = 2'b11.
0x0
Reserved.
0x0
Indicates the controller
core's mode of
operation.
0x0
• 2'b11 to 2'b10 are
reserved
• 2'b01 indicates
continuous voltage
sensor conversion
• 2'b00 indicates one
round of voltage
sensor conversion
Do not write to this
address when the RUN
bit is set. You must wait
for the hardware to
clear these bits before
updating this address.
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Sample Store Core Registers
Offset
Register
Name
Bits
Field
RO/RW
0
RUN
RW
Description
Control bit to trigger
the sequencer core
operation.
Reset Value
0x0
• 1 indicates run
• 0 indicates stop
When the Quartus
Prime software writes a
0 to this address, the
controller core
completes its current
operation and clears
this address.
Sample Store Core Registers
Table 5-2: Sample Store Core Registers
Offset
Register
Name
Bits
Field
RO/RW
Description
Reset Value
6:31
Reserved
RO
Reserved.
0x0
0:5
SAMPLE
RO
Values correspond to
Slot 0 for Offset 0x0
and Slot 7 for 0x7.
0x0
1:31
Reserved
RO
Reserved.
0x0
0
M_EOP
RW
Enable bit for end-ofpacket interrupt.
0x1
0x0
0x1
0x2
0x3
0x4
Voltage
Sample
0x5
0x6
0x7
0x8
Interrupt
Enable
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• 1 indicates the
corresponding
interrupt is enabled
• 0 indicates the
corresponding
interrupt is disabled
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Sample Store Core Registers
Offset
0x9
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Register
Name
Interrupt
Status
Bits
Field
RO/RW
Description
Reset Value
1:31
Reserved
RO
Reserved.
0x0
0
EOP
RW
End-of-packet
interrupt.
0x1
• 1 indicates a
complete block of
samples is received
• Writing a 1 to this
address clears the
content of this
address to 0
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Additional information about the document and Altera.
Document Revision History
Date
Version
Changes
September 2016
2016.09.01
• Changed instances of Quartus II to Quartus
Prime.
• Updated the data width in the Response
Interface table.
• Updated the Voltage Sample bits in the Sample
Store Core Registers table.
• Removed the bipolar mode support.
May 2015
2015.05.04
Initial release.
How to Contact Altera
Table 6-1: Altera Contact Information
Contact(1)
Contact Method
Technical support
Website
www.altera.com/support
Website
www.altera.com/training
Email
[email protected]
Website
www.altera.com/literature
General
Email
[email protected]
Software
licensing
Email
[email protected]
Technical training
Product literature
Nontechnical support
(1)
Address
You can also contact your local Altera sales office or sales representative.
© 2016 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
www.altera.com
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Related Information
• www.altera.com/support
• www.altera.com/training
• www.altera.com/literature
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