• Study Resource
• Explore

Survey

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Document related concepts

Mains electricity wikipedia, lookup

Buck converter wikipedia, lookup

Switched-mode power supply wikipedia, lookup

Opto-isolator wikipedia, lookup

Current mirror wikipedia, lookup

Alternating current wikipedia, lookup

Resistive opto-isolator wikipedia, lookup

Current source wikipedia, lookup

Transistor wikipedia, lookup

TRIAC wikipedia, lookup

CMOS wikipedia, lookup

Network analysis (electrical circuits) wikipedia, lookup

Two-port network wikipedia, lookup

Semiconductor device wikipedia, lookup

Scattering parameters wikipedia, lookup

Bode plot wikipedia, lookup

History of the transistor wikipedia, lookup

Spectral density wikipedia, lookup

Chirp spectrum wikipedia, lookup

Linear time-invariant theory wikipedia, lookup

Transcript
```Exercise 3
Analyses of Parameters and Characteristics of MOS
transistor
I.
Theoretical settings
a)
б)
Circuits for input and output capacity determination of MOS transistors
The transistors input (gate) is feet by voltage generator where the output is short
connected. The chosen dc regime UDS=UGS=0 (Ids=0), wipes out the influence of
the static parameters over the measurement. On the same way you can determine
the input capacity (Cin). The DC regime is the same one but the signal goes to the
transistor’s output (drain) where the input is short connected. The Cin and Cout
can be easily determinate by the formulas given below:
Cin 
I1  I 2
2fUm
Cout 
I1  I 2
2fUm
1. Simulative determination of Cin and Cout
(1)
(2)
The shown transistor is nmos4 from library PRIMLIB (for 0.35m CMOS
technology) with parameters:
Chanel width: w=100m
Chanel length: l=2m
Number of gates: NG=1
The voltage source vsin used for the simulations you can find in library
analogLib. Set the values as shown below:
II. Simulations
1. Simulator choice
In Virtuoso Schematic Composer go to Tools  Analog Environment to
start ADE. In order to work with simulator SpectreS from ADE go to Setup 
Simulator/Directory/Host. In the drop-down menu you choose the name of the
desired simulator and give the directory path where you will keep all the
simulating results.
2. AC analysis settings
1) From ADE choose Analyses  Choose  ac.
2) For the analysis set the following parameters:
Sweep Variable  frequency
Sweep Range from 10Hz to 500MHz
Sweep Type  Automatic
3) Press OK
4) From ADE choose Outputs  Save all  AC currents
5) Simulation results visualization
Go to Results  Direct Plot  AC Magnitude. Select the transistor’s gate
and drain currents and press Esc.
b)
a)
Drain and Gate currents amplitude
In order to calculate the current for any frequency Results Display Window,
go to Markers  Vertical Markers. There you type the desired frequency
(for example 10MHz) and press consecutively the buttons Apply and
Display Intercept Data.
Cin can be calculated using the formula Cin 
I1  I 2
2fUm
as
was
shown
before.
For Cout use the scheme shown below and follow the steps that we just
passed for Cin
If frequency is 10MHz then the values for drain and gate current are shown
in the next figure:
Cout capacity can be calculated using formula Cout 
I1  I 2
as was shown
2fUm
before.
If a transistor has more than one gates (5 and 10 for example) and we use the
formula for Cout calculation than the graphical result is shown in the next diagram:
2.6
2.2
2.2
1.8
Кe
Кo
Кч _Cout
2.6
Кн _Cout
1.4
1.8
1.4
1
1
1
5
9
13
17
Odd number of gaits
а)
21
25
2
6
10
14
18
Even number of gaits
22
b)
To make the fixed characteristics we use coefficients for odd and even
numbers - Ko and Ke. They are defined with the help of the formulas below:
Кo 
Кe 
Co
C1
C o1
C1
Where Co is the transistor’s capacity with odd numbers of gates, Co+1 is the
transistor’s capacity with even number of gates and C1 is transistor’s
capacity with one gate.
The calculated results can be compared with those from the simulation.
3. MOS transistor’s output characteristic
Draw the circuit of nmos4 shown below in Virtuoso Schematic Composer.
1) Variable initiation
In window Edit Object Properties that comes from source Vgs type the
name of the variable in box DC voltage. The same variable name you should
2) DC analysis
In ADE go to Analyses  Choose  dc. Check Vds as a source and set its
range to be from 0 to 2.5V. For the simulation we need the transistor’s drain
current Id. In order to visualize that current and any other current you may
need, it is necessary previously to save them. In ADE window go to Outputs
 Save all  DC currents.
3) Parametric Analysis
In ADE go to Tools  Paramertric analysis and set Vgs (gate voltage) as a
parameter of Vgate variable. Set values for example: Vgate = 0, 0.5V, 1.5V,
2V, 2.5V and 3V.
4) Start simulation
From Parametric Analysis window go to Analysis  Start
5) Results visualization
When the simulation is over, choose drain current Id. Use command Results
 Direct Plot  dc. Id can be graphically drawn if it is checked before the
simulation.
NMOS transistor’s output characteristics
(w=100m, l=2m, number of gates=1)
4. Conductivity gm
In order to calculate the conductivity we use the Calculator tool. To start it
Press button op in order to open window for dc parameters.
Select the transistor in the circuit and press button list. From the list choose
gm and in Calculator press button plot. The gm results are shown below:
gm dependence on Vgate
gm and Id dependence on Vgate
In order to visualize gm as a function of Id, follow the steps described
below:
1) Choose Id from list from parameter’s window.
2) In the window for results visualization choose Axes  X Axis
gm dependence on Id
3) Press button independent variable and choose Id. That way you
draw the Id on X-axis
5. Transit frequency ft
The frequency ft can be found with the following formula:
ft 
gm
2Cgs
In Calculator type that formula in order to draw ft as a function of Id.
The results are shown below:
Ft dependence on Vgate
ft dependence on Id
ft and Id dependence on Vgate
6. Defining Vth
Follow the same steps to define the dependence between Vth and Vgate
Vth dependence on Vgate
```
Related documents