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ASSEMBLY LANGUAGE FOR INTEL-BASED COMPUTERS, IA-32 PROCESSOR ARCHITECTURE IA-32 PROCESSOR ARCHITECTURE Modes of operation Basic execution environment Floating-point unit Web site Examples 2 Intel Microprocessor history MODES OF OPERATION Protected mode • native mode, all instructions and features are available. (Windows, Linux) Real-address mode • Ability to switch into other modes( Windows 98, MS-DOS) System management mode • power management, system security, diagnostics Virtual-8086 mode Web site Examples 3 • If an MS –DOS programs crashes to write data into the system memory area, it will not affect other programs running at the same time. • each program has its own 8086 computer BASIC EXECUTION ENVIRONMENT Web site Examples 4 Addressable memory General-purpose registers Index and base registers Specialized register uses Status flags Floating-point, MMX, XMM registers ADDRESSABLE MEMORY Protected mode • 4 GB • 32-bit address Real-address and Virtual-8086 modes Web site Examples 5 • 1 MB memory area space • 20-bit address BASIC PROGRAM EXECUTION REGISTERS Registers = high-speed storage location inside the CPU • Designed to be accessed at much higher speed than conventional memory. There are Eight general-purpose registers Six segment registers A processor status flag register (EFLAGS) An instruction pointer (EIP) Web site Examples 6 • • • • GENERAL-PURPOSE REGISTERS Named storage locations inside the CPU, optimized for speed. 32-bit General-Purpose Registers EAX EBP EBX ESP ECX ESI EDX EDI EFLAGS EIP CS ES SS FS DS GS Web site Examples 7 16-bit Segment Registers ACCESSING PARTS OF REGISTERS Use 8-bit name, 16-bit name, or 32-bit name Applies to EAX, EBX, ECX, and EDX 8 AH AL AX EAX 8 bits + 8 bits 16 bits 32 bits Web site Examples 8 8 INDEX AND BASE REGISTERS Web site Examples 9 Some registers have only a 16-bit name for their lower half: SOME SPECIALIZED REGISTER USES (1 OF 2) General-Purpose • EAX – accumulator, multiplication and division instruction. • ECX – loop counter • ESP – stack pointer • ESI, EDI – index registers • EBP – extended frame pointer (stack) Segment CS – code segment DS – data segment SS – stack segment ES, FS, GS - additional segments Web site Examples 10 • • • • SOME SPECIALIZED REGISTER USES (2 OF 2) Web site Examples 11 EIP – instruction pointer, also called program counteraddress of next instruction to be executed EFLAGS • status and control flags • each flag is a single binary bit Control Flags • Control operation of the CPU • Caused CPU to break after every instruction executes, interrupt when arithmetic overflow STATUS FLAGS •Carry • unsigned arithmetic out of range •Overflow • signed arithmetic out of range •Sign • result is negative •Zero • result is zero •Auxiliary Carry • carry from bit 3 to bit 4 •Parity Web site Examples 12 • sum of 1 bits is an even number Examples 13 Web site FLOATING-POINT, MMX, XMM REGISTERS 80-bit Data Registers Eight 80-bit floating-point data registers ST(0) ST(1) • ST(0), ST(1), . . . , ST(7) • arranged in a stack • used for all floating-point arithmetic ST(2) ST(3) ST(4) Eight 64-bit MMX registers ST(5) Eight 128-bit XMM registers for singleinstruction multiple-data (SIMD) operations ST(6) ST(7) Web site Examples 14 Opcode Register INTEL MICROPROCESSOR HISTORY Intel 8086, 80286 IA-32 processor family P6 processor family Web site Examples 15 CISC and RISC EARLY INTEL MICROPROCESSORS Intel 8080 • • • • • 64K addressable RAM 8-bit registers CP/M operating system S-100 BUS architecture 8-inch floppy disks! Intel 8086/8088 (1978) IBM-PC Used 8088 1 MB addressable RAM, segmented memory 16-bit registers 16-bit data bus (8-bit for 8088) separate floating-point unit (8087) Web site Examples 16 • • • • • THE IBM-AT Intel 80286 Web site Examples 17 • 16 MB addressable RAM, 24 bit address bus • Protected memory • several times faster than 8086 • introduced IDE bus architecture • 80287 floating point unit INTEL IA-32 FAMILY Intel386 • 4 GB addressable RAM, 32-bit data registers, paging (virtual memory) Intel486 • instruction pipelining Pentium Web site Examples 18 • superscalar, 32-bit address bus, 64-bit internal data path • MMX technology-multimedia extension INTEL P6 FAMILY Pentium Pro • advanced optimization techniques in microcode Pentium II • MMX (multimedia) instruction set Pentium III • SIMD (streaming extensions) instructions Pentium 4 and Xeon Web site Examples 19 • Intel NetBurst micro-architecture, tuned for multimedia Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples Web site Examples