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4/20/2009
CS271
INTRODUCTION TO
ASSEMBLY LANGUAGE PROGRAMMING
Introduction to Assembly Language Programming
INTEL ARCHITECTURE: IA-32
IA-32 BASICS

Two processors in one
 integer
unit
 floating-point
 can
unit
work in parallel (co-processors)

Separate instruction sets
Separate data registers

Separate ALUs

 different
configuration
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MODES OF OPERATION

Real-address mode

Protected mode

Virtual-8086 mode
 native
 native
MS-DOS
mode (Windows, Linux)
 hybrid
 each

of Protected
program has its own 8086 computer
System management mode
 power
management, system security, diagnostics
BASIC EXECUTION ENVIRONMENT
Addressable memory
General-purpose registers
 Index and base registers
 Specialized register uses
 Status flags
 Floating-point, MMX, XMM registers


ADDRESSABLE MEMORY

Protected mode
4
GB
 32-bit

address
Real-address and Virtual-8086 modes
1
MB space
address
 20-bit
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GENERAL-PURPOSE REGISTERS
32-bit General Purpose Registers
EAX
EBX
ECX
EDX
EBP
ESP
ESI
EDI
16-bit Segment Registers
CS
SS
DS
EFLAGS
EIP
ES
FS
GS
ACCESSING PARTS OF REGISTERS
Use 32-bit, 16-bit or 8-bit names
 Applies to EAX, EBX, ECX, EDX

EAX
32-bit
AX
AH
16-bit
AL
8-bit + 8-bit
INDEX AND BASE REGISTERS

Some registers on have 16-bit names for their
lower halves
32-bit
ESI
EDI
EBP
ESP
16-bit
SI
DI
BP
SP
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SPECIAL USES (1 OF 2)
EAX – accumulator
ECX – loop counter
 ESP – stack pointer
 ESI, EDI – index registers
 EBP – extended base pointer (stack)


SPECIAL USES (2 OF 2)
CS – code segment
DS – data segment
 SS – stack segment
 ES, FS, GS – additional segments
 EIP – instruction pointer
 EFLAGS


 status
 each
and control flags
flag is a single binary bit
STATUS FLAGS

Carry

Overflow

Sign

Zero

Auxiliary Carry

Parity






unsigned arithmetic out of range
signed arithmetic out of range
result is negative
result is zero
carry from bit 3 to bit 4
sum of 1 bits is an even number
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FLOATING-POINT, MMX, XMM REGISTERS
80-bit Data Registers
48-bit Pointer Registers
ST(0)
ST(1)
ST(2)
ST(3)
ST(4)
ST(5)
ST(6)
ST(7)
FPU Instruction Pointer
FPU Data Pointer
16-bit Control Registers
Tag Register
Control Register
Status Register
Opcode Register


Eight 64-bit registers for use with MMX
Eight 128-bit registers for use with XMM SIMD
operations
Introduction to Assembly Language Programming
A BRIEF HISTORY OF INTEL PROCESSORS
EARLY INTEL MICROPROCESSORS


Intel 8080
 64K addressable RAM
 8-bit registers
 CP/M operating system
 S-100 BUS architecture
 8-inch floppy disks!
Intel 8086/8088
 IBM-PC Used 8088
 1 MB addressable RAM
 16-bit registers
 16-bit data bus (8-bit for 8088)
 separate floating-point unit (8087)
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THE IBM-AT

Intel 80286





16 MB addressable RAM
Protected memory
several times faster than 8086
introduced IDE bus architecture
80287 floating point unit
INTEL IA-32 FAMILY

Intel386

4 GB addressable RAM, 32-bit registers, paging (virtual
memory)

Intel486

Pentium


instruction pipelining
superscalar, 32-bit address bus, 64-bit internal data
path
INTEL P6 FAMILY

Pentium Pro
 advanced

Pentium II

Pentium III
 MMX
 SIMD
optimization techniques in microcode
(multimedia) instruction set
(streaming extensions) instructions
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INTEL NETBURST ARCHITECTURE

Pentium 4 and Xeon
 Intel
NetBurst micro-architecture, tuned for
multimedia
INTEL IA-64 FAMILY
Itanium
 Itanium 2
 Pentium 4F
 Pentium D
 Pentium Extreme Edition
 Xeon

CORE ARCHITECTURE FAMILY


Xeon
Intel Core 2 Duo / Quad
2
to 4 cores on single die
Pentium Dual Core
 Celeron M
 Core i7

 front
side bus replaced with QuickPath up to
6.4GT/s
 781 million transistors
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REVIEW (1 OF 3)
1.
2.
3.
4.
5.
What are the IA-32 processor’s three basic
modes of operation?
Name all eight 32-bit general purpose
registers
Name all six segment registers
What special purpose does the ECX register
serve?
Name at least four CPU status flags
REVIEW (2 OF 3)
6.
7.
8.
Which flag is set when the result of an
unsigned arithmetic operation is too large to
fit into the destination?
Which flag is set when the result of an signed
arithmetic operation is either too large or too
small to fit into the destination?
Which flag is set when an arithmetic or logical
operation generates a negative result?
REVIEW (3 OF 3)
Which part of the CPU performs floating-point
arithmetic?
10. How many bits long are the FPU data
registers?
11. Describe the CISC approach
12. Describe the RISC approach
9.
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Introduction to Assembly Language Programming
IA-32 MEMORY MANAGEMENT
IA-32 MEMORY MANAGEMENT
Real-address mode
 Calculating linear addresses
 Protected mode
 Multi-segment model
 Paging

REAL-ADDRESS MODE
1 MB RAM maximum addressable
 Application programs can access any area of
memory
 Single tasking
 Supported by MS-DOS operating system

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SEGMENTED MEMORY
F0000
E0000
8000:FFFF
D0000
C0000
Linear Address
B0000
A0000
90000
80000
70000
60000
50000
40000
30000
20000
10000
8000:0250
0250
8000:0000
seg
off
00000
CALCULATING LINEAR ADDRESSES
Given a segment address, multiply it by 16 (add
a hexadecimal zero), and add it to the offset
 Example: convert 08F1:0100 to a linear
address

Adjusted Segment value:
Add the offset:
Linear address:
08F10
0100
09010
PROTECTED MODE (1 OF 2)

4 GB addressable RAM
 (0000
0000 to FFFF FFFFh)
Each program assigned a memory partition
which is protected from other programs
 Designed for multitasking
 Supported by Linux & MS-Windows

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PROTECTED MODE (2 OF 2)


Segment descriptor tables
Program structure
 code,
data, and stack areas
DS, SS segment descriptors
 global descriptor table (GDT)
 CS,

MASM Programs use the Microsoft flat memory
model
FLAT SEGMENT MODEL
In flat model all segments are mapped to entire
32-bit address space
 At least 2 segments required:

 code
 data
Each segment is defined by a segment
descriptor
 Segment descriptor is a 64-bit number stored
in the global descriptor table (GDT)

GLOBAL DESCRIPTOR TABLE
FFFF FFFF
(4GB)
not used
0004 0000
limit
0 0040
access
---
physical RAM
base address
0000 0000
0000 0000
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MULTI-SEGMENT MODEL
Each process is given its own table of segment
descriptors call a Local Descriptor Table (LDT)
 Each segment has its own address space
 Each segment descriptor describes the exact
size of its segment

LOCAL DESCRIPTOR TABLE
RAM
Local Descriptor Table
base
0002 6000
0000 8000
0000 3000
limit
0 0010
0 00A0
0 0002
access
-------
2 6000
8000
3000
PAGING






Supported directly by the CPU
Divides each segment into 4096-byte blocks called
pages
Sum of all programs can be larger than physical memory
Part of running program is in memory, part is on disk
Virtual memory manager (VMM) – OS utility that
manages the loading and unloading of pages
Page fault – issued by CPU when a page must be loaded
from disk
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REVIEW (1 OF 3)
1.
2.
3.
4.
What is the range of addressable memory in
protected mode?
What is the range of addressable memory in
read-address mode?
In real-address mode, convert the following
hexadecimal segment-offset address to a linear
address: 0950:0100
In real-address mode, convert the following
hexadecimal segment-offset address to a linear
address: 0CD1:02E0
REVIEW (2 OF 3)
5.
6.
7.
8.
In the flat memory model, how many bits hold
the address of an instruction or variable?
In protected mode, which register references
the descriptor for the stack segment?
In protected mode, which table contains
pointers to the memory segments used by a
single program?
In the flat memory model, which table
contains pointers to at least two segments?
REVIEW (3 OF 3)
What is the main advantage to using the
paging feature of IA-32 processors?
10. Can you think of a reason why MS-DOS was
not designed to support protected-mode
programming?
11. In real-address mode, demonstrate two
segment-offset address that point to the same
linear address
9.
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Introduction to Assembly Language Programming
INPUT-OUTPUT SYSTEM
INPUT-OUTPUT SYSTEM
Applications routinely read input from keyboard
and disk files and write output to files and
screen
 I/O is available at different access levels:

 high-level
 operating
languages
system
 BIOS
HIGH-LEVEL LANGUAGE (HLL) I/O

HLL such as C++ or Java contain functions for
performing I/O
 System.out.println("Hello
 cout

World!");
<< "Hello World!" << endl;
These functions are portable as they work on a
variety of computer systems and are not
dependant on any one operating system
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OPERATING SYSTEM I/O
Programmers can call operating system (OS)
functions from a library known as the
Application Programming Interface (API)
 OS provides high-level operations such as:

 writing
strings to files
string from the keyboard
 allocating blocks of memory
 reading
BIOS I/O
The Basic Input/Output System (BIOS) is a
collection of low-level subroutines that
communicate directly with hardware
 The BIOS is installed by the computer’s
manufacturer and is tailored to fit the
computers hardware
 Operating systems generally communicate with
the BIOS

DEVICE DRIVERS
Software that communicates directly with a
piece of hardware
 Allows devices unknown to the BIOS to be
integrated with the computer
 Works much like BIOS providing I/O functions
tailored to a particular device or family of
devices

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I/O HIERARCHY
Level 4
Level 3
•Statement in program calls HLL library function to write string to standard output
•Library function calls an OS function, passing a string pointer
•OS uses a loop to call a BIOS subroutine, passing it the ASCII code and color of each
Level 2 character; OS also calls BIOS subroutine to advance cursor to next position on screen
•BIOS receives character, maps it to a particular system font, and sends it to hardware
Level 1 port attached to video card
•Video card generated timed hardware signals to the monitor that control the displaying
Level 0 of pixels
PROGRAMMING AT MULTIPLE LEVELS

Assembly language programs can choose to
use any of the following levels
 level
3: call library functions to perform I/O (we will
do this, at least to begin)
 level 2: call OS functions to perform text and filebased I/O
 level 1: Call BIOS functions to control devicespecific features such as color, graphics, and
keyboard input
 level 0: send and receive data from hardware ports
TRADEOFFS – LEVEL 2
Programming at level 2 works on any computer
running a given OS
 If a device lacks a certain capability the OS do
its best to approximate it
 Level 2 is not particularly fast because each I/O
call must go through several layers before it
executes

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TRADEOFFS – LEVEL 1

Works on all systems having a standard BIOS
but will not produce the same result on all
systems
 different
systems may run at different resolutions
As a programmer you must write code to detect
the user’s hardware and adjust your program to
match
 Much faster than level 2 as it is only one level
above the hardware

TRADEOFFS – LEVEL 0
Works with generic devices such as serial ports
and with specific I/O devices produced by
known manufacturers
 Programs must be written to handle variations
in I/O devices
 Programs execute quickly as they are directly
manipulating the hardware
 Not all OS allow this level of access to hardware
(Windows XP, Vista, 7, 2000, etc)

REVIEW
1.
2.
3.
4.
Of the three levels of I/O, which is the most
universal and portable?
What characteristics distinguish BIOS-level I/O?
Why are device drivers necessary, given that the
BIOS already has code that communicates with
the computer’s hardware?
Is it likely that the BIOS for a computer running
Windows would be different from that used by a
computer running Linux?
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