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IRF510
Data Sheet
January 2002
5.6A, 100V, 0.540 Ohm, N-Channel Power
MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17441.
Ordering Information
PART NUMBER
IRF510
PACKAGE
TO-220AB
Features
• 5.6A, 100V
• rDS(ON) = 0.540Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
BRAND
D
IRF510
NOTE: When ordering, include the entire part number.
G
S
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
©2002 Fairchild Semiconductor Corporation
IRF510 Rev. B
IRF510
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS
Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ , TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
IRF510
100
100
5.6
4
20
±20
43
0.29
19
-55 to 175
UNITS
V
V
A
A
A
V
W
W/oC
mJ
oC
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
V
Drain to Source Breakdown Voltage
BVDSS
VGS = 0V, ID = 250µA, (Figure 10)
100
-
-
Gate to Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250µA
2.0
-
4.0
V
-
-
25
µA
Zero-Gate Voltage Drain Current
On-State Drain Current (Note 2)
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
IDSS
ID(ON)
IGSS
rDS(ON)
gfs
td(ON)
tr
td(OFF)
VDS = 95V, VGS = 0V
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC
-
-
250
µA
VDS > ID(ON) x rDS(ON)MAX , VGS = 10V (Figure 7)
5.6
-
-
A
VGS = ±20V
-
-
±100
nA
VGS = 10V, ID = 3.4A (Figures 8, 9)
-
0.4
0.54
Ω
1.3
2.0
-
S
-
8
12
ns
-
25
63
ns
-
15
7
ns
-
12
59
ns
-
5.0
30
nC
-
2.0
-
nC
-
3.0
-
nC
VGS = 50V, ID = 3.4A (Figure 12)
ID ≈ 5.6A, RGS = 24Ω , VDD = 50V, RL = 9Ω ,
VDD = 50V, VGS = 10V
MOSFET switching times are essentially independent
of operating temperature
tf
Qg(TOT)
Gate to Source Charge
Qgs
Gate to Drain “Miller” Charge
Qgd
VGS = 10V, ID = 5.6A, VDS = 0.8 x Rated BVDSS,
IG(REF) = 1.5mA (Figure 14)
Gate charge is essentially independent of operating
temperature.
Input Capacitance
CISS
-
135
-
pF
Output Capacitance
COSS
-
80
-
pF
Reverse-Transfer Capacitance
CRSS
-
20
-
pF
-
3.5
-
nH
-
4.5
-
nH
-
7.5
-
nH
-
-
3.5
oC/W
-
-
80
oC/W
Internal Drain Inductance
LD
VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11)
Measured From the
Contact Screw On Tab To
Center of Die
Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die
Internal Source Inductance
LS
Junction to Case
RθJC
Junction to Ambient
RθJA
©2002 Fairchild Semiconductor Corporation
Measured From The
Source Lead, 6mm
(0.25in) From Header to
Source Bonding Pad
Free air operation
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
D
LD
G
LS
S
IRF510 Rev. B
IRF510
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Continuous Source to Drain Current
Pulse Source to Drain Current
(Note 3)
ISD
ISDM
Test Conditions
Modified MOSFET
Symbol Showing the
Integral Reverse
P-N Junction Diode
D
MIN
TYP
MAX
UNITS
-
-
5.6
A
-
-
20
A
-
-
2.5
V
G
S
Source to Drain Diode Voltage (Note 2)
Reverse Recovery Time
Reverse Recovered Charge
VSD
TJ = 25oC, ISD = 5.6A, VGS = 0V (Figure 13)
trr
TJ = 25oC, ISD = 5.6A, dISD/dt = 100A/µs
4.6
96
200
ns
QRR
TJ = 25oC, ISD = 5.6A, dISD/dt = 100A/µs
0.17
0.4
0.83
µC
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, start TJ = 25oC, L = 910µH, RG = 25Ω, peak IAS = 5.6A.
Typical Performance Curves Unless Otherwise Specified
10
1.0
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.2
0.8
0.6
0.4
8
6
4
2
0.2
0
0
25
0
125
50
75
100
TC , CASE TEMPERATURE (oC)
150
175
25
50
75
125
100
150
175
TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
ZθJC, TRANSIENT
THERMAL IMPEDANCE (oC/W)
10
0.5
1
0.2
0.1
0.05
0.1
PDM
0.02
0.01
t1
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
0.01
10-5
10-4
0.1
10-2
10-3
t1, RECTANGULAR PULSE DURATION (S)
1
10
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2002 Fairchild Semiconductor Corporation
IRF510 Rev. B
IRF510
Typical Performance Curves Unless Otherwise Specified
100
10
OPERATION IN THIS
REGION IS LIMITED
BY rDS(ON)
VGS = 10V
10
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
10µs
100µs
1ms
1
TC = 25oC
TJ = 175oC
SINGLE PULSE
0.1
(Continued)
1
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
8
VGS = 8V
6
VGS = 7V
4
VGS = 6V
2
VGS = 5V
VGS = 4V
0
10
102
0
103
10
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
10
ID(ON), ON-STATE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
VGS = 10V
8
VGS = 8V
6
VGS = 7V
4
VGS = 6V
2
VGS = 5V
VGS = 4V
0
2
4
6
8
VDS, DRAIN TO SOURCE VOLTAGE (V)
0.1
3.0
NORMALIZED ON RESISTANCE
ON RESISTANCE (Ω)
rDS(ON), DRAIN TO SOURCE
4
3
2
VGS = 10V
VGS = 20V
1
0
12
16
ID, DRAIN CURRENT (A)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
©2002 Fairchild Semiconductor Corporation
TJ = 25oC
TJ = 175oC
2
4
6
8
VGS , GATE TO SOURCE VOLTAGE (V)
10
FIGURE 7. TRANSFER CHARACTERISTICS
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
8
VDS ≥ 50V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10-2
0
10
5
4
50
1
FIGURE 6. SATURATION CHARACTERISTICS
0
40
FIGURE 5. OUTPUT CHARACTERISTICS
10
0
30
VDS , DRAIN TO SOURCE VOLTAGE (V)
VDS , DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
20
20
2.4
ID = 3.4A, VGS = 10V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.8
1.2
0.6
0
-60 -40
-20
0
20
40
60
80
100 120 140 160 180
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
IRF510 Rev. B
IRF510
Typical Performance Curves Unless Otherwise Specified
(Continued)
1.25
500
1.15
C, CAPACITANCE (pF)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
ID = 250µA
1.05
0.95
VGS = 0V, f = 1MHz
CISS = CGS + CGD
400 CRSS = CGD
COSS ≈ CDS + CGD
300
200
CISS
COSS
0.85
100
0.75
-60 -40 -20
0
CRSS
0
20
40
80
60
100 120 140 160 180
1
2
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
TJ = 25oC
1.5
TJ = 175oC
1.0
0.5
0
0
2
2
5
102
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
2.0
10
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
ISD, SOURCE TO DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE (S)
2.5
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
4
6
ID, DRAIN CURRENT (A)
8
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10
1
TJ = 175oC
TJ = 25oC
0.1
0
10
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
0.4
0.8
1.2
1.6
VSD, SOURCE TO DRAIN VOLTAGE (V)
2.0
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
VGS, GATE TO SOURCE VOLTAGE (V)
20
ID = 3.4A
VDS = 80V
VDS = 50V
VDS = 20V
16
12
8
4
0
0
2
4
6
Qg, GATE CHARGE (nC)
8
10
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
©2002 Fairchild Semiconductor Corporation
IRF510 Rev. B
IRF510
Test Circuits and Waveforms
VDS
BVDSS
L
tP
VARY tP TO OBTAIN
IAS
+
RG
REQUIRED PEAK IAS
VDS
VDD
VDD
-
VGS
DUT
tP
0V
IAS
0
0.01Ω
tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(ON)
td(OFF)
tr
RL
VDS
tf
90%
90%
+
RG
-
VDD
10%
0
10%
DUT
90%
VGS
VGS
0
FIGURE 17. SWITCHING TIME TEST CIRCUIT
0.2µF
50%
PULSE WIDTH
10%
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
VDS
(ISOLATED
SUPPLY)
CURRENT
REGULATOR
12V
BATTERY
50%
VDD
Qg(TOT)
SAME TYPE
AS DUT
50kΩ
Qgd
0.3µF
VGS
Qgs
D
VDS
DUT
G
0
IG(REF)
S
0
IG CURRENT
SAMPLING
RESISTOR
VDS
ID CURRENT
SAMPLING
RESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
©2002 Fairchild Semiconductor Corporation
IG(REF)
0
FIGURE 20. GATE CHARGE WAVEFORM
IRF510 Rev. B
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SILENT SWITCHER 
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STAR*POWER™
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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