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1 _________________________________________________________________________________ CS323-554 Systems Programming chapter1 page Chapter 1 Background 1.1 What is systems programming? Systems programs were developed to make computers better adapted to the needs of their users. Further, people wanted more assistance in the mechanics of preparing their program. The major components of a programming system are: Assembler. Program to translate assembly language to machine language. Macro Processor. Program to translate macro assembly to assembly. A macro call is an abbreviation (or name) for some code. A macro definition is a sequence of code that has a name (macro call). A macro processor is a program substitutes specializes macro definitions for macro calls. Loader. Program to prepares and loads an object program for execution. Compiler. Program to translate high-level language to assembly or machine language. Operating Systems. Software to management the resources such as CPU, memory, I/O ,and file system. 1.2 machine structure General hardware organization of a computer system Early computer system: memory card reader Processor Card punch printer magnetic tapes ระบบแบบนี ้ CPU จะควบคุม memory และ I/O device โดยตรง ไม่สามารถทางานหลายงานพร้ อมกันได้ เพราะ CPU ต้ องรอให้ I/O ทางานเสร็ จก่อนจึงจะทางานต่อไปได้ Present computer system: CPU กับ I/O ทางานแบบ asynchronous ทาให้ สามารถทางานได้ หลายงานพร้ อม ๆ กัน ในลักษณะการ share CPU Computer Science, Prince of Songkhla University 2 _________________________________________________________________________________ Synchronous คือการทางานแบบประสานจังหวะ เช่น - ต้ องทางาน A ก่อนงาน B - ต้ องมีการรอซึง่ กันและกัน เช่น การส่งผ่านข่าวสารระหว่าง sender กับ receiver แบบไม่มี buffer ในกรณีที่ sender ยังไม่สง่ ข่าวสาร receiver ต้ องรอ ในขณะเดียวกันถ้ า receiver ไม่พร้ อมทีจ่ ะรับข่าวสาร sender ต้ องรอ - ต้ องทาไปพร้ อมกัน เช่น เสียงจะต้ องตรงกับภาพ หรื อ การเปิ ดแผ่นเสียงแล้ วทาปากขมุบขมิบให้ ตรงกับเสียง (lip sync) เป็ นต้ น CS323-554 Systems Programming chapter1 page Asynchronous คือการทางานแบบไม่ต้องประสานจังหวะ เช่น - CPU กับ I/O ของคอมพิวเตอร์ ระบบปั จจุบนั ที่สามารถทางานของตนเองขนานกันไป ดังภาพ t1 t2 time job 1 job2 job 1, 3, … CPU initiate interrupt I/O job 1 job 2 I/O buffer เมื่อ CPU ทางาน job 1 ถึงจุด (เวลา t1) ที่จะต้ องรับหรื อส่งข้ อมูลไปยัง I/O จะสัง่ ให้ I/O เริ่ มทางาน (initiate) จากนันสลั ้ บไปทางาน job 2 ต่อไป โดยไม่ต้องรอ I/O ขณะที่ I/O ทางานของ job 1 แต่ CPU ทางานของ job 2 ขนานกันไป ตรงจุดนี ้เองที่เรียกว่าเป็ นแบบ asynchronous เมื่อ I/O ทางานเสร็ จ ถ้ าเป็ นการรับข้ อมูล ข้ อมูลจะอยูใ่ น I/O buffer จากนันส่ ้ ง interrupt signal ไปยัง CPU เพื่อให้ นาข้ อมูลเข้ าที่ได้ ไปเก็บเพื่อใช้ ตอ่ ไป จากนัน้ CPU จะทา job2 ต่อไปหรื อจะสลับไปทา job 1 ก็ได้ - การส่งผ่านข่าวสารระหว่าง sender กับ receiver แบบมี buffer ไม่จากัด ดังภาพ mail box (infinite buffer) abc… time a b c sender a b c receiver Computer Science, Prince of Songkhla University 3 _________________________________________________________________________________ main frame: CS323-554 Systems Programming chapter1 page Memory I/O processor (multiplexor channel) I/O processor (selector channel) I/O processor (block multiplexor channel) CPU card reader printer disks tapes แม้ I/O processor จะมีราคาถูกกว่า CPU แต่ก็ไม่ค้ มุ ทีจ่ ะใช้ เพื่อควบคุมอุปกรณ์เพียงตัวเดียว จึงมีการออกแบบ I/O processor หรื อ channel แบบต่าง ๆ เพื่อให้ สามารถควบคุมได้ หลายอุปกรณ์ - Selector channel can service only one of its devices at a time i.e. one device is selected for service. These channels are normally used for very high-speed I/O devices, such as disks, tapes, and dumps. - Mutiplexor channel is able to simultaneously service many devices (up to 256). It is also to accomplish this only for slow I/O devices, such as card readers, card punches, and printers. - Block multiplexor channel is a compromise solution that allows multiple channel programs for high-speed devices to be active on the same I/O channel. The block multiplexor performs one channel instruction for one device and then, automatically, switches to perform an instruction for another device, and so on. Personal Computer: The general structure of and interrupt-based system : Computer Science, Prince of Songkhla University 4 _________________________________________________________________________________ CS323-554 Systems Programming CPU chapter1 page Disk controller Cardreader controller Tapedrive controller Memory controller memory We called the interrupt-based systems. There are two method to do data transfer between CPU and I/O controller. Interrupt-driven data transfer Direct-memory-access (DMA) data transfer Interrupt-driven data transfer Each device controller is in charge of a specific type of device (for example, disk drives, tape drives, line printers). A device controller maintains some local buffer storage and a set of special purpose registers. The device controller is responsible for moving data between the peripheral device it controls and its local buffer storage. To start an I/O, the CPU loads the appropriate registers within the device controller and then resumes its normal operation. The device controller, in turn, examines the contents of these registers to determine what action to take. For example, if it finds a read request, the controller will start the transfer of data from the device to its local buffer. Once the transfer of data is complete, the device controller informs the CPU that it has finished its operation. It accomplishes this communication by causing an interrupt. When the CPU is interrupted, it stops what it is doing and transfers execution to a fixed location. The fixed location usually contains the starting address where the service routine for the interrupt is located. The interrupt service routine transfers data from the local buffer of the device controller to main memory. Once this transfer is accomplished, the CPU can then resume the interrupted computation. In this way, I/O devices and the CPU can be operated concurrently. Usually, interrupts are disabled while an interrupt is being processed, delaying the incoming interrupt until the operating system is done with the current one and interrupts are enabled. If they were not thus disabled, the processing of the second interrupt while the first was being serviced would overwrite the first’s data, and the first would be a lost interrupt. Sophisticated interrupt architectures allow for one interrupt to be processed during another, often by a priority scheme in which request Computer Science, Prince of Songkhla University 5 _________________________________________________________________________________ types are assigned priorities according to their relative importance, and interrupt processing information is stored separately for each priority. A higher-priority interrupt will be taken even if a lower-priority interrupt is active, but interrupts at the same or lower levels are masked, or selectively disabled, to prevent lost interrupts or unnecessary ones. CS323-554 Systems Programming chapter1 page Direct Memory Access (DMA) Many controllers, especially those for block devices, support Direct Memory Access or DMA. To explain how DMA works, let us first look at how disk reads occur when DMA is not used. First the controller reads the block (one or more sectors) from the drive serially, bit by bit, until the entire block is in the controller’s internal buffer. Next, it computes the checksum to verify that no read errors have occurred. Then the controller causes an interrupt. When the operating system starts running, it can read the disk block from the controller’s buffer a byte or a word at a time by executing a loop, with each iteration reading one byte or word from a controller device register and storing it in memory. Naturally, a programmed CPU loop to read the bytes one at a time from the controller wastes CPU time. DMA was invented to free the CPU from this low-level work. When it is used, the CPU gives the controller two items of information, in addition to the disk address of the block: the memory address where the block is go to, and the number of bytes to transfer, as shown below: Drive CPU Memory Disk controller count buffer DMA registers Memory address Count System Bus After the controller has read the entire block from the device into its buffer and verified the checksum, it copies the first byte or word into main memory at the address specified by the DMA memory address. Then it increments the DMA address and decrements the DMA count by the number of bytes just transferred. This process is repeated until the DMA count becomes zero, at which time the controller cause an interrupt. When the operating system starts up, it does not have to copy the block to memory; it is already there. Note! Not all computers use DMA. Computer Science, Prince of Songkhla University 6 _________________________________________________________________________________ CS323-554 Systems Programming chapter1 page 1.3 Evolution of Operating Systems 1.3.1 The First Generation (1945-55) Vacuum Tubes and Plugboards All programming was done in absolute machine language, often by wiring up plugboards to control the machine’s basic functions. No Operating Systems. 1.3.2 The Second Generation (1955-65) Transistors and Batch Systems Batch or Simple Monitor : can run each job at a time (single tasking). For example: FMS (the Fortran Monitor System) and IBSYS, IBM’s operating system for the 7094. The early batch systems reading from card readers and writing to line printers or card punches. 1.3.3 The Third Generation (1965-1980): ICs and Multiprogramming Multiprogramming : can run multiple jobs concurrently. Another major feature present in thirdgeneration operating systems was the ability to read jobs from cards onto the disk as soon as they were brought to the computer room. This technique is called spooling (from Simultaneous Peripheral Operation On Line) and was also used for output. For example: OS/360. Timesharing : a variant of multiprogramming, in which each user has an on-line terminal i.e. support multiple user, and works interactively. For example: CTSS, MULTICS, UNIX. To make it possible to write programs that could run on any UNIX system, IEEE developed a standard for UNIX, called POSIX, that most versions of UNIX now support. POSIX defines a minimal system call interface that conformant UNIX systems must support. Real-Time : operating system has well-defined fixed-time constraints. Processing must be done within the defined constraints or the system will fail. Contrast this requirement to a time-sharing system, where it is desirable (but not mandatory) to respond quickly, or to a batch system, where there may be no time constrains at all. For example, a control device in a dedicated application. 1.3.4 The Fourth Generation (1980-Present): Personal Computers Network Operating Systems : the users are aware of the existence of multiple computers and can log in to remote machines and copy files from one machine to another. Each machine runs its own local operating system and has its own local user (or users). For example : Novel Netware. Distributed Operating Systems: appears to its users as a traditional uniprocessor system, even through it is actually composed of multiple processors. The users should not be aware of where their programs are being run or where their files are located; that should all be handled automatically and efficiently by the operating system. For example : Ameba, Mach, Chorus, DCE. Computer Science, Prince of Songkhla University