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I/O Worksheet
CSCI 4534
Chapter 5
Another main function of an operating system is to control the I/O devices by:
 Issuing commands to the devices
 Catching interrupts
 Handling errors
 Providing an interface between the devices and the rest of the operating system
that is simple and easy to use
The interface would ideally be the same for each device.
Principles of I/O hardware
Engineer point of view (wires, chips, power supplies) vs. programmer point of view
(commands, functions carried out, errors reported)
1. Explain the difference between block devices and character devices.
Block devices:
Character devices:
2. Look at the typical device, network and bus rates in Figure 5.1. Why is this figure
important?
3. Draw a picture that shows how a device is connected to a computer. Label the
parts. See Figures 1.10 and 1.11.
4. We say that I/O units consist of a mechanical component and an electronic
component. The electronic component is called the device controller or adapter.
The mechanical component is the device itself. See Figure 1.5. What is the job of a
device controller?
5. Where does a device controller generally exist?
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6. How does a controller communicate with the CPU? And the CPU with the controller?
7. What is the purpose of a device’s control registers and data buffers? p. 272
8. Briefly describe the two ways that the CPU communicates with control registers
and data buffers: using I/O ports and using memory-mapped I/O. See Figure 5.2.
I/O ports:
Memory-mapped I/O:
Compare and contrast the two approaches.
In both cases, when the CPU wants to read a word (from memory or an I/O port),
the address is put on the bus’s address lines, and a Read( ) signal is issued on the
bus’s control line. Another signal could indicate whether to use I/O space or
memory space. Revisit the Fetch – Execute Cycle.
Explain how the current practice of the memory bus as shown in Figure 5.3 is an
improvement at a cost. That is, what is the problem with having a separate memory
bus on memory-mapped machines?
Reread sections 1.4.3 and 1.4.4
Watch the slides on DMA and interrupts from the CSCI 4534 website.
Direct Memory Access (DMA) allows a DMA controller to access the system bus. The
controller has registers that can be read/written by the CPU: memory address register, a
byte count register and control registers. The control registers indicates which port to
use, the direction of the transfer and the number of bytes to transfer in a single “burst”.
Read: Last paragraph of p. 276
Then: See Figure 5.4 and read the first two paragraphs under the figure.
Read Section 5.1.5 very well.
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Principles of I/O software
Issues and Goals of I/O software
1. Device Independence
 Accessing data by the user should be independent of how it is stored, only
the O.S. knows about the different devices (CD, floppy, hard drive)
2. Uniform Naming
 Files and devices are addressed in the same way, using a path name
3. Error Handling
 Higher layers are notified only if lower layers don’t handle the problem (see
Figure 5-16)
4. Synchronous data transfer vs. asynchronous data transfer (interrupts)
5. Buffering: data coming from a device can’t store data at the destination
immediately (Ex. Packet from a network needs to be stored somewhere so it can be
examined, to see what to do with it)
6. Sharable (disks can have several users sharing) and dedicated devices (tapes are
dedicated until user is done)…dedicated devices adds to deadlock possibilities
http://www.laynetworks.com/Interrupts%20and%20DMA.htm
http://courses.cs.vt.edu/~csonline/OS/Lessons/Processes/Lesson.html
Read pp. 279 and 280
Write down 5-8 steps to interrupt
See paragraph #5 … CPUs store different things
 Where is the information stored?
o CPU registers?
o Stack: current stack which could be a user’s stack? Kernel stack?
Three ways to perform I/O:
1. CPU does all the work – programmed I/O
 Example: printing a string to a printer, see Figure 5-6
1. string is put into a buffer in user space
2. the system call open( ) is used to access the printer
 if in use, the call will 1) fail and return an error code or 2) block until the
printer is available
3. if successful, user generates a system call to print( ) the string
4. O.S. copies the buffer to kernel space
5. when printer is available, O.S. copies each character to the printer’s data
register (using memory mapped I/O)
 some printers may buffer a line or a page
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printer has a status register that indicates if it is ready to Receive
another character
6. loop until each character in the string has been printed

See code Figure 5-7
Disadvantage? Since CPU continually polls (polling/busy waiting) the device to see if
it is ready, the CPU is tied up until I/O is done.
2. Interrupt driven I/O –
 Printer does not buffer characters, but prints each one as it arrives
 After a character is written to the printer’s data register, the CPU has time to
wait for another character…in that time a context switch can happen so that
another process can run
 To do this:
1. the buffer is copied to kernel space as before
2. character is sent to printer as soon as printer can accept it
3. CPU calls the CPU scheduler and another process is moved to Run – see
Figure 5-8 (a)
4. the process doing printing is in the Blocked state until the entire string has
been printed
5. Each time the printer can accept a new character, it generates an interrupt
6. The interrupt stops the current process and saves its state
7. The printer interrupt service code is executed (Run State) – see Figure 5-8 (b)
 if E no more characters to print, the interrupt handler initiates the
unblocking of the user(print)process
 if E more characters, interrupt handler prints the character, decrements
count of characters left, acks the interrupt, returns to the process
running before the interrupt, …
Disadvantage? Interrupt occurs at each character, so CPU is still tied up
Look again at Section 1.4.3 for coverage of interrupts
3. I/O using DMA
Use a DMA controller to send characters to printer one at a time. This is like
having the controller doing what the CPU did with Programmed I/O.
See section 5.1.4
See code –Figure 5-9 (a) and (b)
Reduces number of interrupts from one per character to one per buffer
But a DMA controller is much slower than the CPU
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Other
 What is meant by “hot pluggable”?

In what ways could device drivers be expected to have uniform interfacing so that
the devices basically look similar? That is, what are some common functions that
many devices could be expected to require of the system?

Explain double buffering.

What is a disadvantage of buffering?

Explain two classes of I/O errors.

List 3 I/O system calls.

Explain how spooling works for a device such as a printer.

Draw a picture that shows the layers of the I/O systems. Label each layer.
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