Download IEEE Transactions on Magnetics

Survey
yes no Was this document useful for you?
   Thank you for your participation!

* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project

Document related concepts
no text concepts found
Transcript
1
Hfo2 Dielectric with Metal Gate Electrode Technique for Nano Regime
Devices
1
Divya Punia, 2Asha
M.Tech Student of VCE, Rohtak, Haryana-India, [email protected]
2
Teaching Assistant, ECE Dept, BPSMV, Sonepat, India, [email protected]
1

using high-dielectric materials inspite of using SiO2. The
Abstract-- This paper focuses on introduction of alternative
urgent need for alternative gate dielectrics is to suppress
materials to continue CMOS scaling. Starting from an analysis
excessive transistor gate leakage [2]. The scaling of
of the sources of improvements in device performance, new
semiconductor transistors has led to a decrease in thickness
technology
options
for
achieving
these
[email protected]
performance
of the silicon dioxide layer used as gate dielectric. The
enhancements are presented. These options include highdielectric-constant
(high-k)
gate
dielectric,
metal
gate
electrode, double-gate FET, and strained-silicon FET etc. In
thickness of the silicon dioxide layer is reduced to increase
the gate capacitance, thus increasing the drain current. If the
this paper an analysis of the performance of MOSFET with
thickness of the gate dielectric decreases below 2nm, the
high dielectric gate oxide is done and shown a comparative
leakage current due to the tunnelling increases drastically.
study and
with
Hence it is necessary to replace the gate dielectric, silicon
HFO2 in the place of silicon oxide. The effect of HfO2 gate
dioxide, with a physically thicker oxide layer of high-k
oxide on drain current, threshold voltage for MOSFET is also
materials like Hafnium oxide, Titanium oxide etc. High-k
discussed.
dielectric materials allow the capacitance to increase
analysis of n channel MOSFET designed
without a huge leakage current [8]. The shrinking gate
Index Terms-- VLSI-Very Large Scale Integration; CMOSComplementary
metal
oxide
semiconductor;
length of MOSFET with scaling is shown in figure 1 below.
ITRS-
(International Technology Roadmap for Semiconductor).
I. INTRODUCTION
The continuous scaling of semiconductor has allowed
reduction in the size of device, improving the speed of
operation and area requirement in the VLSI circuits. Silicon
dioxide layers thinner than 1.6 to 2 nm would have a
leakage current over 1 A/cm2 due to direct tunnelling
through the oxide, and this is unacceptable for devices. The
decrease of device dimensions has led to the need for
alternative, high dielectric constant (k) oxides to replace
silicon dioxide as the gate dielectric in complementary
metal oxide semiconductor (CMOS) devices [1].
Beyond 45 nm technology the short channel effects [2]
deteriorate the performances of the MOSFETs, and efforts
are being made to enhance the performance of these devices
Figure 1. Shrinking gate length with scaling. (Courtesy:
ITRS 2010)[8]
2
The power consumption trends with the year of scaling is
dielectric material gives high value of oxide capacitance
shown in figure 2 below.
(Cox) which may influence the threshold voltage (VT) and
working of the device. The dielectric constants of these
materials totally depend upon the way they are deposited
over the silicon substrate. The dielectric layers with higher
electrical permittivity are used for thicker films to reduce
the leakage current and improve upon the reliability of the
gate dielectric layer with electrical thickness equal to ultrathin SiO2 layer [4].
Figure 1. Power Consumption trends with years of
scaling. (Courtesy: ITRS 2005) [8].
II. DIELECTRIC MATERIALS
Dielectric materials are substances which are poor
Figure 2. Plot of dielectric constants of various oxides vs.
conductors of electricity. They are also called as insulators
band gap (Eg) [9].
with an effective support of electrostatic fields. The flow of
current is kept to a minimum between opposite charged
poles without interrupting the electrostatic lines of flux;
There are many dielectric materials whose dielectric
constant is more than 3.9 (SiO2 dielectric constant) as
shown in the Figure 3.
electrostatic field can also store energy. Important properties
of a dielectric are its ability to support an electrostatic field
III. IMPORTANCE OF GATE OXIDE
while dissipating minimal energy in the form of heat, the
extent to which a substance concentrates the electrostatic
lines of flux. Substances with a low dielectric constant
include a perfect vacuum, dry air, and most pure, dry gases
such as helium and nitrogen. Materials with moderate
dielectric constants include ceramics, distilled water, paper,
mica, polyethylene, and glass. Metal oxides, in general,
have high dielectric constants [3]
Moore’s law suggests gate oxide thickness would be as low
as 1.5 nm in the year 2006. As the scaling of devices
continues and need for high speed processors, SiO2 does not
have the dielectric constant, k, to with stand scaling till
2006. If the thickness is reduced, hot electrons are high
energy electrons which can tunnel through the oxide layer
and become excess charge in the oxide. This may lead to
failure of the device with time [5].
A. HIGH-K DIELECTRIC MATERIAL
A. EQUIVALENT OXIDE THICKNESS
Dielectric materials with high dielectric constants are used
as gate dielectric in MOSFETs. The dielectric materials
The gate oxide thickness determines the good control of the
examined in this study in detail are hafnium oxide. High-k
MOSFET depending upon the oxide capacitance of the
3
given film. Equivalent-oxide-thickness (EOT) is defined as
the gate capacitance [3]. Recently binaries and ternaries of
the thickness of SiO2 which can obtain same capacitance
hafnium (Hf) and zirconium (Zr) have shown promising
density as any other high-k dielectric oxide. Let us assume
performances. Even though TiO2 had a very high dielectric
EOT to be equivalent oxide thickness needed, T DES be the
constant, due to better thermo dynamical stability with
desired film thickness, ɛSiO2 is the dielectric constant of SiO2
silicon, HfO2 and ZrO2 became most favourable among
and ɛHIGHK is the dielectric constant of high-k dielectric
many research groups [3]. Since HfO2 has been found to
material to be used. EOT is given by following equations 1
form a more stable interface than ZrO2, HfO2 as gate
and 2 [8].
dielectric has good potential for present and future CMOS
applications.
……………….. (1)
The critical requirements, that a high-K dielectric must
fulfill before it can replace SiO2, where considered in
………………… (2)
particular during high temperature processing and annealing
[4]. The other key issues which complicates the use of high-
The above equation shows oxide thickness of high-k
material is more than that of SiO2 which would yield the
same gate oxide capacitance and have the same command
over MOSFET.
k
materials
such
as
reduction
in
drain
current,
transconductance and mobility, are resolved by replacing
poly silicon by thermally stable and low work function
metal gate [5,6].
To replace the commonly used SiO2, higher dielectric
IV. REQUIREMENTS OF NEW DIELECTRICS
constant materials (high-k), such as HfO2, ZrO2, La2O3 and
Y2O3 have been considered as the candidate to suppress the
The requirements of the new dielectrics can be divided into
two categories: fundamental material properties and device
processing, integration and performance issues [13]. The
material properties include: high dielectric constant (410),
stability on silicon, low-interface trap densities, and smooth
film morphology. Device processing includes deposition so
that silicon does not oxidize and has good interface quality,
gate and process compatibility and reliability. A number of
materials are currently studied to replace SiO2. Most
promising of them are zirconium, hafnium and rare-earth
oxides and silicates [6].
leakage current with thicker oxide film [4]. ZrO 2 and HfO2
are good candidates once they are stable upto 900 oC, band
offsets and barrier heights are suitable, they have a high
band-gap (higher than 5eV) and a k of about 20-25. The
higher thermal stability and better interfacial properties after
thermal annealing when compared with ZrO2 justifies the
option for HfO2. Recently a rare-earth oxide stems for the
replacement of SiO2 in metal oxide semiconductor field
effect transistors (MOSFET) by high dielectric oxides [5].
The requirement of high-k materials properties [6] also
includes stability, low interface trap densities, and smooth
film morphology. HfO2 [7], nitride silicates of hafnium, or
The improvement in a device can result in terms of
improvement in the area, power and speed of the VLSI
circuits. A lot of research works has been done on the
feasibility of other alternative high-k dielectric (e.g. Al2O3,
ZrO2, Ta2O5, HfO2, ZrSixOy, Y2O3, Ya2O3) for submicron
MOSFET in order to reduce current leakage and increase
HfAlOx [7] can be applied for the 65-45nm gate length
technologies. Epitaxy of HfO2 [5] on Si is unlikely, and
low-temperature deposition induces defects due to partial
amorphicity and residual contamination. This defect leads to
achieve high breakdown, fields and avoid reduction of FET
channel mobility [10].
4
voltage vs. drain current is shown in figure 4 and the plot for
drain voltage vs. drain current is shown in figure 5 below.
A. HAFNIUM OXIDE
Hafnium oxide is a high-k dielectric material whose average
constant is around 22-25 [2,3]. It has high dielectric constant
compare to SiO2 dielectric films. It is thermally stable over
silicon substrate and has a high energy band gap around 5.8
eV. It is used in nano-scaled CMOS and memory devices
such as DRAM cells [4]. Hafnium oxide has higher
electrical permittivity and improves the gate dielectric layer
with its properties. It is used for low power applications and
has uniform thickness over the substrate. The effects of
direct tunnelling are reduced by HfO2 as gate oxide. The
leakage current of HfO2 is lower than the same equivalent
Figure 3. Drain Characteristics [9].
oxide thickness of SiO2 film. Because of the large barrier in
HfO2 holes (3.4eV) with respect to electrons (1.5eV), the
injection of holes is much smaller than the injection of
electrons for HfO2 film. The hafnium oxide is able to
withstand dynamic stress in a long term for MOS devices so
that the time for breakdown increases and has less interface
traps formed [5].
V. Comparison
between
HfO2
and
SiO2
based
MOSFET
The MOSFET designed using HfO2 is compared with
MOSFET designed using SiO2. The effect of high-k
dielectric- Hafnium dioxide on the characteristic curve of
drain-source current verse gate voltage/ drain voltage in
designed MOSFETs has been studied. By use of HfO2 in
Figure 4. Drain Characteristics [9].
place of SiO2 without altering other parameters the drain
current value is noted. From the above simulation we can
From the drain characteristics figure 4 we analyze that drain
conclude that replacing the silicon dioxide gate dielectric
current increases with decrease in thickness of gate oxide
with a high-κ material allows increased gate capacitance
and vice versa. We find that the mobility of carriers in HfO 2
without the associated leakage effects. It is concluded that
is more as compared to SiO2. Drain current is directly
HfO2 give large amount of drain current and it is preferred
proportional to the mobility and oxide thickness per unit.
for reducing the substrate bias effect. Further we say that
These values are larger in HfO2 as compared to large SiO2.
high-k metal gate technology to be a strong alternative for
Hence the simulation result give large amount of current
future nano scale MOS devices [9]. The plot for Gate
achieved by using HfO2 for the same applied voltage and
5
aspect ratio. Further, from the transfer characteristics it is
phonons are the major factors which limit the mobility in
analysed that threshold voltage decrease with decrease in
high-k devices [5]. Metal gates on high-k are found to be a
oxide thickness. As we know that the value of gate to source
key element in future to reduce phonon scattering to
voltage required to cause surface inversion is called the
improve mobility [6]. From our simulated results it can be
threshold voltage. Lower value of threshold voltage is
observed that the mobility improves again with metal gate
advantageous in high speed applications [8].
structure D3. The midgap TiN metal gate with higher free
electron density is said to reduce the phonon scattering
VI. Effect of using metal electrode inspite of
Polysilicon
compared to poly silicon gates with lower concentrations of
free electrons. The TiN gate effectively screens and reduces
The polysilicon is replaced with a metal (TiN) gate
the surface phonons from coupling to the inversion channel,
electrode and the effective mobility of three different
whereas depleted poly-Si gate is less effective [9].
structure using SiO2 with Poly silicon gate is compared with
HfO2 Poly silicon and HfO2 TiN metal electrode and shown
The large decrease in gate leakage of six orders of
below in figure 6 below.
magnitude is found when the conventional SiO2 – poly
silicon (D1) structure is replaced with HfO2 – TiN (D3)
structures and is shown in Figure 6. The reduction in gate
leakage current in high-k based devices can be attributed to
the physically thicker dielectric which reduces tunnelling
currents. Further reduction in gate leakage current in D3
structures compared to D2 structures can be attributed to the
elimination of poly depletion which is also said to play a
key role in improving the figure of merit for leakage
reduction [9]. The observed simulated results of different
structures are provided in table1 below.
Table 1 Simulated Results of Various MOSFET Structures with Poly
silicon and Tin Metal Gates [9].
Parameters
Models
Figure 5. Effective mobility for Sio2-Poly, HfO2 Poly and
HfO2- TiN structures [9].
From Figure 6 it can be observed that there is a large fall in
the mobility of HfO2-Poly structure compared to SiO2-Poly
structure. Several factors contribute to the mobility
degradation – the HfO2/Si interface which acts as trap rich
sites, higher channel doping for threshold adjustment which
increases the transverse electric field [7] etc. All these
factors lead to increased coulomb and phonon scattering
thereby slowing down the movement of electrons and holes
in the channel. Coulomb scattering due to high densities of
interface charges and phonon scattering due to soft optical
/ SiO2 – HfO2 – HfO2 –
Poly
Poly
TiN
(D1)
(D2)
(D3)
Threshold Voltage
(V)
Drain current
(mA/μm)
Transconductance
(x10-4 mho)
Subthreshold swing
(mV/decade)
Effective mobility
(cm-2/V-s)
Gate leakage
current (A)
0.5
0.5
0.5
0.71
0.64
0.72
7.08
6.05
7.08
90.5
83.39
74.61
286.66
174.45
250.19
1.59 x
10-14
1.31 x
10-16
1.34 x
10-20
6
The graphical variation of different structures for the
MOSFET structures were analysed to study the role of
various parameters are shown below in figure 7, 8 and 9.
dielectric (HfO2) and gate material on the device
drain current (mA/µm)
performance. By use of HfO2 in place of SiO2 without
0.72
altering other parameters the drain current value is noted.
0.7
From the above analysis it can be concluded that by
0.68
replacing the silicon dioxide gate dielectric with a high-κ
0.66
SiO2-Poly
0.64
HfO2-Poly
material allows increased gate capacitance without the
associated leakage effects. HfO2 give large amount of drain
HfO2-TiN
0.62
current and it is preferred for reducing the substrate bias
0.6
effect. Furthermore the poly silicon Gate was replaced by
Mosfet
structures
metal gate electrode. The performance of the three
structures SiO2 dielectric with Poly silicon gate (D1), HfO2
Figure 7. Effective mobility for Sio2-Poly, HfO2 Poly and
HfO2- TiN structures [9].
with TiN metal gate (D3) were compared and it was found
that
100
Subthreshold swing (mV/decade)
dielectric with Poly silicon gate (D2) and HfO2 dielectric
some
of
the
parameters
like
drain
current,
transconductance and mobility which degraded with high-k
90
80
dielectric recovered back by replacing poly silicon by metal
70
60
SiO2 – Poly
gate [9]. Large reduction in gate leakage projects the high k
40
HfO2 – Poly
– metal gate technology to be a strong alternative for future
30
HfO2 – TiN
50
20
nano scale MOS devices.
10
VIII. REFERENCES
0
[1] Neil H.E. Weste, David Money Harris, “CMOS VLSI
Mosfet
structures
Design”, 4th ed., Addison- Wesley, 2011.
[2] A.P. Huang, Z.C. Yang and Paul K. Chu, “ Hafnium
Figure 8. Effective mobility for Sio2-Poly, HfO2 Poly and
HfO2- TiN structures [9].
based High K gate dielectrics,” Proc. Of Advances in
Solid State Circuits Technologies, April 2010, pp. 333350.
[3] Hei Wong and Hiroshi Iwai, “On the Scaling Issues and
High K Replacement of Ultrathin Gate Dielectric for
Nanoscale
MOS
Transistor,”
Microelectronic
Engineering , pp. 1867-1904, 2006.
[4] ShashanN, S Basak, R K Nahar, “Design and
Simulation of Nano Scale High-K Based MOSFETs
with Poly Silicon and Metal Gate Electrodes”,
International Journal of Advancements in Technology,
2010.
Figure 9. Effective mobility for Sio2-Poly, HfO2 Poly and
HfO2- TiN structures [9].
[5] M. H. Chowdhury, M. A. Mannan and S. A.
Mahmood,“High-k
Dielectrics
for
Submicron
MOSFET”, IJETS International Journal of Emerging
7
Technologies in Sciences and Engineering, vol. 2, no.
2, pp. 8-10, July 2010.
[6] Maizan Muhamad, Sunaily Lokman, Hanin Hussin,
“Optimization in fabricating 90nm NMOS transistors
using silvaco”, IEEE student conference on research
and development., pp. 2, 2009.
[7] Syafeeza
Binti
Ahmad
Telecommunication,
Radzi,
Electronics
“Simulation of
0.18
and
micron
MOSFET and its Characterization”, M.Tech. Thesis
under faculty of Electrical Engineering University
Technology Malaysia, pp. 47, 55, 71-76, October 2005.
[8] Ritika R. Oswal, “ Investigation of different dielectric
materials as gate insulator for MOSFETs”, Department
of
Electrical Engineering and computer science,
College
of
Engineering
and
computer
science,
University of Central Florida, pp. 3-12, 2011.
[9] Neha Thapa, Lalit Maurya and Er. Rajesh Mehra,
“Performance
advancement
of
high-K
dielectric
MOSFET”, International Journal Of Innovations and
Advancements in Computer Science, Volume 3, Issue
3, pp. 98-103, May 2014.
[10] Norani Bte Atan, Ibrahim Bin Ahmad, Burhanuddin
Bin Yeop Majlis and Izzati Binti Ahmad Fauzi, “ Effect
of High-K Dielectric with metal gatefor electrical
characteristics
of
nanostructured
NMOS”,
Mathematical Methods in Engineering and Economics,
pp. 111-114.