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THE CASCODE AMPLIFIER: A common-gate (common-base) amplifier stage in cascade with a common source (commonemitter) amplifier stage, results in a very useful and versatile amplifier circuit known as the cascode configuration and has been in use in a wide variety of technologies for over three quarters of century. The basic idea behind the cascode amplifier is to combine the high input resistance and large transconductance achieved in a common-source (common-emitter) amplifier with the currentbuffering property and the superior high-frequency response of the common gate (common-base) circuit. The cascode amplifier can be designed to obtain a wider bandwidth but equal dc gain as compared to the common-source (common-emitter) amplifier. Alternatively, it can be designed to increase the dc gain while leaving the gain bandwidth product unchanged. In many applications the cascade amplifier is thought of and treated as a single-stage amplifier though it is formed by cascading two amplifier stages. The MOS Cascode Figure 20(a) shows the MOS cascode amplifier. Here transistor Q1 is connected in the commonsource configuration and provides its output to the input terminal (i.e., source) of transistor Q2. Transistor Q2 has a constant dc voltage, VB1AS, applied to its gate. Thus the signal voltage at the gate of Q2 is zero, and Q2 is operating as a CG amplifier with a constant-current load, I. Obviously both Q1 and Q2 will be operating at DC drain currents equal to I. As in previous cases, feedback in the overall circuit that incorporates the cascode amplifier establishes an appropriate dc voltage at the gate of Q1 so that its drain current is equal to I. Also, the value of VBIAS has to be chosen so that both Q1 and Q2 operate in the saturation region at all times. Small-Signal Analysis : In response to the input signal voltage vi the common-source transistor Q1 conducts a current signal gm1vi, in its drain terminal and feeds it to the source terminal of the common-gate transistor Q2, called the cascode transistor. Transistor Q2 passes the signal current gm1vi on to its drain, where it is supplied to a load resistance RL (not shown in fig. 20) at a very high output resistance, Rout. The cascode transistor Q2 acts in effect as a buffer, presenting a low input resistance to the drain of Q1 and providing a high resistance at the amplifier output. Characteristic parameters: In Fig. 20(b) shows the cascode circuit prepared for small signal analysis and with a resistance RL shown at the output. RL is assumed to include the output resistance of current source I as well as an actual load resistance, if any. The diagram also indicates various input and output resistances obtained using the results of the analysis of the CS and CG amplifiers in previous sections. Note in particular that the CS transistor Q1 provides the cascode amplifier with an infinite input resistance. Also, at the drain of Q1 looking "downward”, see the output resistance of the CS transistor Q1, ro1. Looking "upward," we see the input resistance of the CG transistor Q2, Assume all MOSFETs have W/L of 7.2 μm/0.36 μm and are operating at ID = 100 μA, gm = 1.25 mA/V, χ = 0.2, r0 = 20 kW, Cgs = 20 fF, Cgd = 5fF,Cdb= 5 fF, and CL (excluding Cdb= 5 fF. For case (a), let RL= r0= 20 kW for both amplifiers. For case (b), let RL = r0 = 20 kW for the CS amplifier and RL = Rout for the cascode amplifier. For all cases, determine Av, fH and ft.