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124 Feedback Control of Five-Level PWM Rectifier: Application to the Stabilization of DC Voltages of Five-Level NPC Active Power Filter T. Abdelkrim1, E.M. Berkouk2, K. Benamrane1, T. Benslimane3 1 Applied Research Unit on Renewable Energies, Industrial zone, B.P. 88, Ghardaïa, Algeria. 2 Laboratory of Process Control, Polytechnic National School, Street Hassen Badi, El Harrach, B.P. 182 Algiers, Algeria. 3 University of M’sila, BP. 166, street Ichbilia, M’sila, Algeria. [email protected], [email protected] Abstract—The purpose of this paper is to develop a control and regulation method of input DC voltages of five-level Neutral Point Clamping (NPC) Active Power Filter (APF). This APF is applied for the enhancement of 5,5kV (ph-ph) network power quality by compensation of harmonic currents produced by an induction motor speed variator. In the first part, the authors present a topology of five-level NPC Voltage Source Inverter (VSI), and then, they propose a model of this converter and its PWM control strategy. In the second part, the control strategy of five-level PWM current rectifier is presented. In the third part, to remedy to instability problem of the input DC voltages of the APF, the authors propose feedback control of the five-level PWM rectifier followed by clamping bridge filter. After that, the sliding mode regulator used to control the APF is developed. The application of the proposed feedback control algorithm to the studied cascade offers the possibility of stabilizing the DC voltages of APF. Stable DC bus supply associated with sliding regulator of APF allows getting low-harmonic content network currents with unity power factor. In all over, the instability problem associated with use of multilevel APF is solved. The obtained results are full of promise to use the multilevel APF in high voltage and great power applications. Index Terms—Active power filter, NPC multilevel inverter, feedback control, PWM rectifier, clamping bridge. I. INTRODUCTION The increasing use of control systems based on power electronics in industry involves more and more disturbance problems in the level of the electrical power supply networks [1]. Thus, one remarks a regular increase in currents harmonic distortion and unbalance rates, as well as an important consumption of the reactive power. These harmonic currents yield voltage harmonics and unbalances via impedance of power supply network, which infects the sinusoidal waveform of the electrical power supply voltage. These disturbances of course have bad consequences on electrical equipments, such as strong heating, sudden stopping of the revolving machines or even the total destruction of these equipments. Several solutions for reducing harmonic current in electrical power supply networks were proposed. Those which satisfy more the industrial constraints are the active compensators such as shunt active filter, series active filter and combined shunt-series active filters. In fact, the main role of active filtering is to constantly control the harmonic distortion in an active way by the compensation of the harmonics [2,3]. European standards CEI 61000-3-4 and CEI 61000-3-6 define low, medium and high voltage power supply networks harmonic currents limits [4]. Research on the shunt active filters implied different works concerning harmonics identification methods such as Fourier transform method [5], the method of synchronous reference frame (d-q) [6], and control strategies such as sliding mode regulators, artificial neural networks and fuzzy logic controllers [7-9]. The structures of the filters also knew an evolution, from two-level converters [10,11] to multilevel converters [12-14]. In high power applications, this latter is more adequate, compared to the conventional two-level structure, simply because of the low harmonic distortion rate of source voltage and current, low switching frequency besides no need to use transformer [15-18]. Various topologies are developed such as flying capacitor multilevel converters, diode clamped multilevel converters, NPC multilevel converters, and H bridge multilevel converters. The unbalance of the different DC voltage sources of the multi-level (NPC) active power filters constitutes the major limitation for the use of these power converters. The objective of this paper is to stabilise the input DC voltages of five-level NPC APF. For this purpose, a feedback control of five-level PWM rectifier followed by clamping bridge filter is used. This APF is applied for the enhancement of 5,5kV (ph-ph) network power quality by compensation of harmonic currents produced by an induction motor speed variator (Fig. 1). First part is dedicated to the presentation of model of the three phases five-level NPC VSI with its four carriers triangulo-sinusoidal PWM control strategy. In the second part, the modelling and control of five-level PWM current rectifier is presented. After that the control strategy of the input DC voltages of multilevel NPC APF is developed. The five-level shunt APF is controlled using a sliding mode regulator. At the end, simulation results are presented. 125 m =1 : for the lower half leg; m =0 : for the upper half leg Table 1 gives the electrical quantities characterising each leg. TABLE 1. EXCITATION TABLE OF A LEG K OF FIVE-LEVEL NPC VSI Figure 1. Synoptic diagram of application of shunt APF on power supply fed cascaded thyristor bridge rectifier-two level VSI-induction motor II. MODELLING OF FIVE-LEVEL NPC VOLTAGE SOURCE INVERTER II.1. Modelling of five-level NPC VSI Bk 2 Bk 3 VkM 1 1 1 U c1 U c 2 1 1 0 U c1 1 0 0 0 0 1 0 0 0 0 U c3 U c3 U c 4 The output voltages relatively to the middle point M of the inverter, using the half leg connection functions, are given as follows: F11b F18 F10b F10b VAM F17 F11b V F F b U F b Uc F F b U F b U BM 27 21 c1 21 2 28 20 c3 20 c4 F37 F31 F31b F38 F30b F30b VC b M (4) The simple output voltages are defined as follows: The three phases five-level NPC VSI is constituted by three legs and four DC voltage sources. Every arm has eight bidirectional switches, six in series and two in parallel, and two diodes to get the zero voltage for VKM (Fig. 2). Every switch is composed by a transistor and a diode in antiparallel [19]. Bk1 V A 2 1 1 VAM 1 V 1 2 1 B 3 VBM V 1 2 VCM 1 C (5) The input currents of the inverter using the connection functions and load currents are given as follows: id 1 F17 i1 F27i2 F37 i3 b b b id 2 F11i1 F21i2 F31i3 id 3 F18i1 F28i2 F38i3 i F bi F b i F b i 10 1 20 2 30 3 d4 (6) id 0 i1 i2 i3 id 1 id 2 id 3 id 4 The input filter model is defined as follows: dU c1 C1 dt Ired id1 id 2 dU c2 C2 Ired id 2 dt dU c3 C3 Ired id1 id 2 id 0 dt dU c 4 C4 Ired id1 id 2 id 3 id 0 dt Figure 2. Five-level NPC voltage source inverter The switch connection function FKS indicates the opened or closed state of the switch TDKS: 1 FKS 0 if TD KS close if TD KS open (1) II.2. PWM strategy of the five-level NPC VSI For a leg k of the three phases five-level NPC VSI, several complementary laws control are possible. The optimal control law of this inverter is: F K 5 1 FK 1 FK 4 1 FK 2 F 1 F K6 K3 (2) b Half leg connection function FKm is defined as: F Kb1 F K 1F K 2F K 3 b FK 0 FK 4 FK 5 FK 6 (7) (3) Two-level carrier-based PWM techniques have been extended to multilevel inverters using several triangular carrier signals and one reference signal per phase. For Nlevel inverter, (N - 1) carriers with the same frequency fc and same peak-to-peak amplitude Ac are disposed such that the bands they occupy are contiguous. The reference, or modulation, wave form has peak-to-peak amplitude Am and frequency fm, and its centred in the middle of the carrier set. The reference is continuously compared with each of the carrier signals (Fig. 3)[20-22] 126 400 Vref Up1 Up2 Up3 Up4 300 200 100 0 -100 -200 -300 -400 0.02 0.022 0.024 0.026 0.028 0.03 0.032 0.034 Time(s) 0.036 0.038 0.04 Figure 3. Triangulo-sinusoidal strategy with four bipolar carriers The different input DC voltages of the inverter are fed by a battery E (Fig. 2). Fig. 4 shows the simple output voltage VA of the five-level NPC VSI. Fig. 5 displays the voltages across input capacitors. It can be noted that these capacitors voltages are unbalanced. Figure 6. Five-level PWM current rectifier topology 500 400 k 2 ⋅ di ⇒ Bi1 0, Bi 2 0, Bi 3 0. di 2 ⋅ di ⇒ B 0, B 0, B 1. k i1 i2 i3 − di di ⇒ B 1, B 0, B k i1 i2 i 3 0. − 2 ⋅ di −di ⇒ B 1, B 1, B 0. i1 i2 i3 300 200 VA(V) 100 0 -100 -200 k −2 ⋅ di ⇒ Bi1 1, Bi 2 1, Bi 3 1. -300 -400 -500 0.02 0.022 0.024 0.026 0.028 0.03 0.032 0.034 0.036 0.038 0.04 240 190 230 Uc2(V) Uc1(V) Figure 4. Simple output voltage VA 200 180 170 200 240 190 230 180 170 160 0.05 Time(s) 0.1 reci0ref is the difference between reference current ireci0ref and source current ireci0. di: hysteresis band width 0 0.05 Time(s) 0.1 220 210 0 −i 220 200 0.1 Uc4(V) Uc3(V) 0.05 Time(s) reci0 k 210 0 k with: k i Time(s) 160 (8) 200 0 0.05 Time(s) 0.1 Figure 5. Inverter input capacitors voltages III. MODELLING AND CONTROL OF FIVE-LEVEL PWM CURRENT RECTIFIER The advantages of five-level PWM current rectifier topology (Figure 6) are well known and have been applied in medium voltage and high power applications in the last years. The reversibility of the five-level VSI allows it to work as current rectifier [22]. The basic principle of the five-level hysteresis current control is based on the classical hysteresis control applied to conventional two-level inverters. The five-level hysteresis control algorithm is given by equation (8). IV. CONTROL STRATEGY OF THE INPUT DC VOLTAGES OF MULTILEVEL NPC APF In this part, one proposes to remedy to the instability problem of the input DC voltages of five-level APF, by using a clamping bridge filter and feedback control of the output DC voltages of PWM multilevel rectifier [21-24]. IV.1. Modelling and Control of Clamping Bridge The clamping bridge cell is a simple circuit constituted by a transistor and a resistor in series connected in parallel with a capacitor as shown in Figure 7. The transistors are controlled in order to maintain equality of the different voltages [25-26]. The model of the intermediate filter with clamping bridge is defined by the following equation: dU ci I rec i ir (i 1) ic (i 1) − id i − ir i dt U with: iri Ti ci Ri Ci (9) 127 Different quantities Irectm, iload and ic are defined as follows: irec1 2 ⋅ irec2 - irec3 - 2 ⋅ irec4 Irectm 2 id1 2 ⋅ id2 - id3 - 2 ⋅ id4 i load 2 i c Irectm − i load (14) By using of the power conservation principle and neglecting of joules loss in the resistor Rr, and by considering a sinusoidal supply network current in phase with corresponding voltage Vsi, it can be written: 3Vsi ireci 0 4 ⋅U rectm ⋅ (ic iload ) Figure 7. Clamping bridge cell The transistor is controlled using the following algorithm: i U ci − U cref (10) U ci if i dr then Ti 1⇒ ir i Ti R i then Ti 0 ⇒ ir i 0 if i −dr dr hysteresis band width. IV.2. Multi DC Bus Link Voltage Controller In this part, one proposes to enslave the output DC voltage of five-level PWM current rectifier using a PI-based feedback control. The synoptic diagram of five-level PWM current rectifier control is shown in Figure 8 [21-22]. The transfer functions GI(S) and GV(S) are expressed as follows: ireci 0 (1 / Rr ) Vsi 1 (Lr / Rr ) ⋅ S 1 GV (S ) C⋅S GI (S ) (11) (12) Figure 8. Synoptic diagram of five-level PWM current rectifier control The modelling of this loop is based on the instantaneous power conservation principle with no loss hypothesis. This loop imposes the root mean square (rms) value of network current [27]. Input and output powers are: 3 L r di 2reci0 2 P (V i − R i − ) r reci0 in ∑ si reci0 2 dt i 1 4 Pout ∑ (U rcii reci ) 4U cm (i c i load ) i 1 (13) (15) V. ACTIVE POWER FILTER CONTROL A medium voltage source of 5.5kV, 50Hz feeds an induction motor speed variator as illustrated in Fig. 1. This load produces a distorted current of 97 % THD which is above the tolerated THD limit standard. This current with its spectral analysis are presented in Fig. 9. Torque and speed features of this motor are presented in Fig. 10. At t=10s, rated torque (Tn=7.6kN.m) is applied. It is noticed that the speed turns back to its reference (1500 rpm) after a slight decrease. Active power filter is controlled using sliding mode regulator [7-9] [28],[29]. From the model of active filter associated to supply network (16) and by considering the error between harmonic current reference and the active filter current as sliding surface (17), and the smooth continuous function as attractive control function (18), one gets the control law (19). V frefK −VK R f i fK Lf (difK / dt) with: VK VsK − RsiSK − Ls (disK / dt) ; (16) K = 1,2 and 3 S s i frefK − i fK (17) U n k.(S s /( S s )) (18) V frefK R f i fK L f (di frefK / dt) VK k (S s /( S s )) (19) The input DC bus of NPC five-level shunt APF is fed by a five-level PWM current rectifier followed by clamping bridge filter. The application of the feedback control on the rectifier allows getting a stable total output DC voltage. Balancing capacitors voltages is guaranteed by the clamping bridge filter. Figure 11 shows DC bus capacitors voltages before and after application of clamping bridges. Before t=22s, these voltages diverge, but the average voltages remains constant (Ucm). Application of clamping bridges allows getting stable capacitors voltages around there reference of 3kV. Figure 12 presents first phase of PWM five-level rectifier current irec10 and its reference current irec10ref before and after application of clamping bridge. Part of the power is dissipated in resistances of clamping bridges, which justifies the increase in the amplitude of the current. This current has a 0.006 total harmonic distortion and in phase with the voltage as shown in figure 13. 128 80 60 i r e c 1 0 1 ( A ) , i r e c 1 0 r e f( A ) Reference identified harmonic current ifref1 and output filter current if1 are almost superimposed as presented in Figure 14. Figure 15.a presents main source voltage Vs1 and current is1 after harmonic current compensation. Spectral analysis is presented in Figure 15.b. It is shown that source current is almost sinusoidal with THD less than 5% and unity power factor. This THD would not have been obtained if the input DC capacitors voltages of APF were unbalanced. 40 20 0 -20 -40 -60 -80 21.5 600 0.9 22.5 -200 150 23.975 Vs1 100 0.8 0.4 ire c10 0.3 0.1 23.97 0.9 (b) 0.5 -400 23.965 1 0.6 0.2 -600 23.96 23.5 0.7 Vs1/40(V), irec10(A) (a) 0 harmonic amplitude( pu ) 200 23 time(s) Figure 12. PWM rectifier current irec10 and its reference irec10ref 0.8 0 23.98 0 10 time(s) 20 30 40 50 harmonic row 50 (a) 0 -50 harmonic amplitude( pu ) 400 is1(A) 22 1 0.7 0.6 0.5 (b) 0.4 0.3 0.2 Figure 9. Current drawn by the induction motor speed variator (THD = 0.97) -100 0.1 -150 23.96 2000 7 x 10 T o rq u e (N m ) 500 5 10 15 30 40 50 400 -1 20 20 harmonic row 2 1 0 10 (b) 3 200 0 0 0 0 23.98 600 4 if1(A ), ifref1(A ) S p e e d (rp m ) (a) 23.975 Figure 13. Input voltage and current of PWM rectifier and spectral analysis of current (THD=0.006) 5 1000 23.97 time(s) 6 1500 23.965 4 0 5 10 Time(s) 15 20 Time(s) 0 -200 Figure 10. Induction motor mechanical speed and torque -400 -600 23.96 23.965 23.97 23.975 23.98 Uc3 400 3100 23.99 23.995 24 Figure 14. Reference harmonic current ifref1 and filter output current if1 3300 3200 23.985 time(s) Uc1 1 Ucref 0.9 300 3000 Ucm 2800 Uc2 2700 U c4 2600 15 16 17 18 19 20 21 22 23 time(s) Figure 11. DC bus condensers voltages before and after application of clamping bridges 100 (a) 0 -100 24 -200 harm o ni c am p li tud e ( p u ) 0.8 200 2900 V s 1/1 5 (V ), is 1 (A ) U c 1 (V ),U c 2 (V ),U c 3 (V ),U c 4 (V ),U c m (V ),U c re f(V ) 3400 0.7 0.6 0.5 (b) 0.4 0.3 0.2 -300 -400 23.96 0.1 23.965 23.97 time(s) 23.975 23.98 0 0 10 20 30 40 50 harmonic row Figure 15. Main source voltage Vs1 and current is1 with its spectral analysis (THD=0.047) 129 Simulation Parameters: Main source: Vph-ph=5,5kV, Rs = 0.0001Ω, Ls = 0.001H. Induction motor: Pn=1.2MW, Ωn=1500rpm, Tn=7.6kN.m, VIM(ph-ph) = 2300V, J=46kg.m2, Rsm=0.0406Ω, Rrm=0.0308Ω, Lrm=0.0591H, Lsm=0.0591H, M=0.0581H. Active power filter: Rf = 0.001Ω, Lf = 0.003H, fc=6kHz. Clamping bridge: Ucref=3000V, C=0.05F, R= 5Ω. Five-level PWM rectifier: Ucrefr=3000V, Lr=0.05H, Rr=0.01Ω [6] [7] [8] [9] [10] [11] [12] VI. CONCLUSION In this paper, one studies the problem of unbalanced input capacitors DC voltages of five-level NPC shunt active power filter supplied by five-level PWM rectifier. The modelling of the five-level NPC inverter shows that it is equivalent to four two-level inverters in series. The study of the instability problem of the input DC voltages of this converter shows that its different input voltages are not stables, which implies a bad harmonic current compensation. To solve this instability problem, one proposes to use a clamping bridge filter to improve input DC voltages balance. In spite of this solution, the output voltage of five-level rectifier is not constant. To remedy to this problem, one proposes the feedback control of its output voltage. The application of the proposed feedback control algorithm to the rectifier shows a good voltage tracking. Feedback control algorithm of the rectifier associated with clamping bridge filter makes stable the input DC voltages of five-level APF. The proposed control algorithm opens the door to different applications of NPC multilevel converters in high power utilities such as, motor drives, doubly fed induction generators, power supply networks interconnection. This work can also be extended to series active power filters. In active power filter applications, the proposed control makes possible: - Active power filtering in medium voltage without using transformer. - Low total harmonic distortion of main source currents. [13] REFERENCES [25] [1] [2] [3] [4] [5] V.E Wagner, “Effects of harmonics on equipment”, IEEE Trans. Power, delivery, vol. 8, pp. 672–680, Apr. 1993. C. Hochgraf, R. Lasseter, D. Divan, T.A Lipo, “Comparison of multilevel inverters for static var compensation”, in Conf. Rec. IEEE-IAS Annu. Meeting, vol. 3, 1995, pp. 2557–2564. G. Choe, M. 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