Download 1.8-V, microPower CMOS Operational Amplifiers, Zero

OPA333
OPA2333
www.ti.com
SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013
1.8-V, microPower, CMOS Operational Amplifiers, Zero-Drift Series
Check for Samples: OPA333, OPA2333
FEATURES
DESCRIPTION
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The OPA333 series of CMOS operational amplifiers
use a proprietary auto-calibration technique to
simultaneously provide very low offset voltage (10
μV, max) and near-zero drift over time and
temperature. These miniature, high-precision, low
quiescent current amplifiers offer high-impedance
inputs that have a common-mode range 100 mV
beyond the rails, and rail-to-rail output that swings
within 50 mV of the rails. Single or dual supplies as
low as +1.8 V (±0.9 V) and up to +5.5 V (±2.75 V)
can be used. These devices are optimized for lowvoltage, single-supply operation.
Low Offset Voltage: 10 μV (max)
Zero Drift: 0.05 μV/°C (max)
0.01-Hz to 10-Hz Noise: 1.1 μVPP
Quiescent Current: 17 μA
Single-Supply Operation
Supply Voltage: 1.8 V to 5.5 V
Rail-to-Rail Input/Output
microSize Packages: SC70 and SOT23
APPLICATIONS
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The OPA333 family offers excellent CMRR without
the
crossover
associated
with
traditional
complementary input stages. This design results in
superior performance for driving analog-to-digital
converters (ADCs) without degradation of differential
linearity.
Transducers
Temperature Measurements
Electronic Scales
Medical Instrumentation
Battery-Powered Instruments
Handheld Test Equipment
The OPA333 (single version) is available in the
SC70-5, SOT23-5, and SO-8 packages. The
OPA2333 (dual version) is offered in DFN-8 (3 mm ×
3 mm), MSOP-8, and SO-8 packages. All versions
are specified for operation from –40°C to +125°C.
500 nV/div
0.1-Hz TO 10-Hz NOISE
OPA333
OUT
1
V-
2
+IN
3
OPA333
5
4
V+
-IN
+IN
1
V-
2
-IN
3
SOT23-5
5
V+
4
OUT
SC70-5
OPA2333
1 s/div
OUT A
1
-IN A
2
+IN A
3
V-
4
Exposed
Thermal
Die Pad
on
Underside
8
V+
7
OUT B
6
-IN B
5
+IN B
DFN-8 (SON-8)
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated
OPA333
OPA2333
SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Voltage
Supply
Signal input terminals
(2)
Temperature
V
mA
Output short-circuit (3)
Continuous
mA
Operating, TA
–40 to +150
°C
Storage, Tstg
–65 to +150
°C
Junction, TJ
+150
°C
Human body model (HBM)
4000
V
1000
V
400
V
Machine model (MM)
(2)
(3)
2
V
±10
Electrostatic discharge (ESD) ratings Charged device model (CDM)
(1)
UNIT
+7
–0.3 to (V+) + 0.3
Signal input terminals (2)
Curent
VALUE
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should
be current limited to 10 mA or less.
Short-circuit to ground, one amplifier per package.
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Product Folder Links: OPA333 OPA2333
OPA333
OPA2333
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SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013
ELECTRICAL CHARACTERISTICS: VS = +1.8 V to +5.5 V
At TA = +25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
VS = +5 V
dVOS/dT
Input offset voltage drift
TA = –40°C to +125°C
PSRR
Power-supply rejection ratio
VS = +1.8 V to +5.5 V, TA = –40°C to +125°C
Long-term stability (1)
10
0.05
μV/°C
1
5
μV/V
See note
Channel separation, dc
μV
2
0.02
(1)
µV
μV/V
0.1
INPUT BIAS CURRENT
IB
Input bias current
IOS
Input offset current
±70
TA = –40°C to +125°C
±200
pA
±150
±140
pA
±400
pA
NOISE
Input voltage noise
in
Input current noise
μVPP
f = 0.01 Hz to 1 Hz
0.3
f = 0.1 Hz to 10 Hz
1.1
μVPP
f = 10 Hz
100
fA/√Hz
INPUT VOLTAGE
VCM
Common-mode voltage range
CMRR
Common-mode rejection ratio
(V–) – 0.1
(V–) – 0.1 V < VCM < (V+) + 0.1 V,
TA = –40°C to +125°C
106
(V+) + 0.1
V
130
dB
Differential
2
pF
Common-mode
4
pF
130
dB
INPUT CAPACITANCE
OPEN-LOOP GAIN
AOL
Open-loop voltage gain
(V–) + 100 mV < VO < (V+) – 100 mV,
RL = 10 kΩ, TA = –40°C to +125°C
106
FREQUENCY RESPONSE
GBW
Gain-bandwidth product
CL = 100 pF
350
kHz
SR
Slew rate
G = +1
0.16
V/μs
OUTPUT
Voltage output swing from rail
ISC
Short-circuit current
CL
Capacitive load drive
Open-loop output impedance
RL = 10 kΩ
30
RL = 10 kΩ, TA = –40°C to +125°C
50
mV
70
mV
±5
mA
See Typical Characteristics
f = 350 kHz, IO = 0 A
2
kΩ
POWER SUPPLY
VS
IQ
Specified voltage range
Quiescent current per amplifier
Turn-on time
1.8
IO = 0 A
17
TA = –40°C to +125°C
VS = +5 V
5.5
V
25
μA
28
μA
μs
100
TEMPERATURE
TA
Tstg
(1)
Specified range
–40
+125
°C
Operating range
–40
+150
°C
Storage range
–65
+150
°C
300-hour life test at +150°C demonstrated randomly distributed variation of approximately 1 μV.
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Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: OPA333 OPA2333
3
OPA333
OPA2333
SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013
www.ti.com
THERMAL INFORMATION: OPA333
OPA333
THERMAL METRIC (1)
D (SOIC)
DBV (SOT23)
DCK (SC70)
8 PINS
5 PINS
5 PINS
θJA
Junction-to-ambient thermal resistance
140.1
220.8
298.4
θJCtop
Junction-to-case (top) thermal resistance
89.8
97.5
65.4
θJB
Junction-to-board thermal resistance
80.6
61.7
97.1
ψJT
Junction-to-top characterization parameter
28.7
7.6
0.8
ψJB
Junction-to-board characterization parameter
80.1
61.1
95.5
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
(1)
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION: OPA2333
OPA2333
THERMAL METRIC (1)
D (SOIC)
DGK (MSOP)
DRB (DFN)
8 PINS
8 PINS
8 PINS
θJA
Junction-to-ambient thermal resistance
124.0
180.3
46.7
θJCtop
Junction-to-case (top) thermal resistance
73.7
48.1
26.3
θJB
Junction-to-board thermal resistance
64.4
100.9
22.2
ψJT
Junction-to-top characterization parameter
18.0
2.4
1.6
ψJB
Junction-to-board characterization parameter
63.9
99.3
22.3
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
N/A
10.1
(1)
4
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: OPA333 OPA2333
OPA333
OPA2333
www.ti.com
SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013
PIN CONFIGURATIONS: OPA333
DBV PACKAGE
SOT23-5
(TOP VIEW)
OUT
1
V-
2
+IN
3
DCK PACKAGE
SC70-5
(TOP VIEW)
5
4
V+
+IN
1
V-
2
-IN
3
-IN
5
V+
4
OUT
D PACKAGE
SO-8
(TOP VIEW)
(1)
(1)
(1)
1
8
NC
-IN
2
7
V+
+IN
3
6
OUT
V-
4
5
NC
NC
(1)
NC denotes no internal connection.
PIN CONFIGURATIONS: OPA2333
DRB PACKAGE
DFN-8 (SON-8)
(TOP VIEW)
(2)
OUT A
1
-IN A
2
+IN A
3
V-
4
Exposed
Thermal
Die Pad
on
(2)
Underside
D AND DGK PACKAGES
SO-8 AND MSOP-8 (VSSOP-8)
(TOP VIEW)
OUT A
8
V+
7
OUT B
6
-IN B
5
+IN B
1
8
V+
7
OUT B
A
-IN A
2
B
+IN A
3
6
-IN B
V-
4
5
+IN B
Connect thermal die pad to V–.
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Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: OPA333 OPA2333
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OPA333
OPA2333
SBOS351D – MARCH 2006 – REVISED NOVEMBER 2013
www.ti.com
TYPICAL CHARACTERISTICS
Table 1. List of Typical Characteristics
TITLE
FIGURE
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
Figure 1
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
Figure 2
OPEN-LOOP GAIN vs FREQUENCY
Figure 3
COMMON-MODE REJECTION RATIO vs FREQUENCY
Figure 4
POWER-SUPPLY REJECTION RATIO vs FREQUENCY
Figure 5
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
Figure 6
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE
Figure 7
INPUT BIAS CURRENT vs TEMPERATURE
Figure 8
QUIESCENT CURRENT vs TEMPERATURE
Figure 9
LARGE-SIGNAL STEP RESPONSE
Figure 10
SMALL-SIGNAL STEP RESPONSE
Figure 11
POSITIVE OVERVOLTAGE RECOVERY
Figure 12
NEGATIVE OVERVOLTAGE RECOVERY
Figure 13
SETTLING TIME vs CLOSED-LOOP GAIN
Figure 14
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE
Figure 15
0.1-Hz TO 10-Hz NOISE
Figure 16
CURRENT AND VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY
Figure 17
6
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Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: OPA333 OPA2333