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DEMO MANUAL DC1500A LTC2393-16/LTC2392-16/ LTC2391-16: 16-Bit,1Msps/ 0.5Msps/0.25Msps Low Noise ADCs DESCRIPTION The LTC®2393/LTC2392/LTC2391-16 are low noise high speed ADCs with both parallel and serial outputs that can operate from a single 5V supply. The following text refers to the LTC2393-16 but applies to all three parts. The only difference being the maximum sample rates. The LTC2393-16 supports a large ±4.096V fully differential input range. This makes it ideal for high performance applications that require maximum dynamic range. Demonstration circuit 1500A provides the user a means of evaluating the –9V GND performance of the LTC2393-16 in both parallel and serial modes and is intended to demonstrate recommended grounding, component placement and selection, routing and bypassing for this ADC. Also several suggested driver circuits for the analog inputs will be presented. Design files for this circuit board are available at www. linear.com/demo. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 9V CLK_IN 1MHz MAX (80MHz FOR SERIAL) 3.3VP-P MAX AIN– 0V TO 4.096V MAX (NOT NEEDED UNLESS U2 IS DISABLED) TO DC718 AIN+ 0V TO 4.096V MAX dc1500a F01 Figure 1. DC1500A Connection Diagram Table 1 ASSEMBLY VERSION PART NUMBER MAX CONVERSION RATE MAX PARALLEL CLK IN FREQUENCY MAX SERIAL CLK IN FREQUENCY DC1500A-A LTC2393CLX-16 1Msps 1MHz 80MHz DC1500A-B LTC2392CLX-16 0.5Msps 500kHz 40MHz DC1500A-C LTC2391CLX-16 0.25Msps 250kHz 20MHz dc1500af 1 DEMO MANUAL DC1500A QUICK START PROCEDURE Check to make sure that all switches and jumpers are set as shown in the connection diagram of Figure 1. The default connections configure the ADC for parallel operation with the output data in offset binary format. The analog input is AC-coupled and the internal reference of the ADC is used. Connect DC1500A to a DC718B/C USB High Speed Data Collection Board using connector J1. Connect DC718B/C to a host PC with a standard USB A/B cable. Apply ±9V to the indicated terminals. Apply a low jitter signal source to J3 (AIN+). The default setup uses a single ended to differential converter so that it is only necessary to apply an input signal to J3. Connect a low jitter 1MHz 3.3VP-P sine wave or square wave to connector J2 (CLK). Note that J2 has a 50Ω termination resistor to ground. Run the QuickEval-II software (Pscope.exe version K66 or later) supplied with DC718B/C or download it from www.linear.com. Complete software documentation is available from the Help menu. Updates can be downloaded from the Tools menu. Check for updates periodically as new features may be added. The Pscope software should recognize DC1500A and configure itself automatically. Click the Collect button (see Figure 6) to begin acquiring data. The Collect button then changes to Pause, which can be clicked to stop data acquisition. SETUP DC Power DC1500A requires ±9VDC at approximately 100mA. Most of the supply current is consumed by the CPLD, op amps, regulators and discreet logic on the board. The ±9VDC input voltage powers the ADC through LT1763 regulators which provide protection against accidental reverse bias. Additional regulators provide power for the CPLD and op amps. See Figure 1 for connection details. Clock Source You must provide a low jitter 3.3VP-P sine or square wave to J2. The clock input is AC-coupled so the DC level of the clock signal is not important. A generator like the HP8644 or similar is recommended. Even a good generator can start to produce noticeable jitter at low frequencies. Therefore it is recommended for lower sample rates to divide down a higher frequency clock to the desired sample rate. One way to do this is by placing the ADC in the serial mode. This can be accomplished by setting the SER/PARL position of SW1 to the high position. In the serial mode the ratio of clock frequency to conversion rate is 80:1. In the parallel mode there is a 1:1 ratio of clock frequency to conversion rate. If the clock input is to be driven with logic, it is recommended that the 50Ω terminator (R17) be removed. Slow rising edges may compromise SNR of the converter in the presence of high amplitude higher frequency input signals. Data Output Parallel data output from this board (0V to 3.3V default), if not connected to DC718, can be acquired by a logic analyzer, and subsequently imported into a spreadsheet, or mathematical package depending on what form of digital signal processing is desired. Alternatively, the data can be fed directly into an application circuit. Use pin 3 of J1 to latch the data. The data can be latched using either edge of this signal. The data output signal levels at J1 can also be reduced to 0V to 2.5V if the application circuit cannot tolerate the higher voltage. This is accomplished by moving JP7 to the 2.5V position. Reference JP4, JP5 and JP6 allow you to select an on chip reference or an external LT1790A-4.096 as the reference. The worst case initial accuracy and drift specifications of the external reference are better than the on chip reference. To use the internal reference set JP6 to FLT, JP4 to ADC and JP5 to REFIN. To use the LT1790A-4.096 set JP5 and JP6 to GND and JP4 to EXT. dc1500af 2 DEMO MANUAL DC1500A SETUP Analog Input Data Collection The default driver for the analog inputs of the LTC2393-16 on DC1500A is shown in Figure 2. This circuit converts a single-ended 0V to 4.096V input signal applied at AIN into a differential signal with a swing of ±4.096V between the +IN and –IN inputs of the ADC. In addition this circuit band limits the input frequencies to approximately 100kHz which is the useful linear bandwidth of the LTC2393-16. For SINAD, THD or SNR testing a low noise, low distortion generator such as the B&K Type 1051 or Stanford Research DS360 should be used. A low jitter RF oscillator such as the HP8644 is used as the clock source. Alternatively, if your application circuit produces a differential signal which can drive the ADC but you need to level shift the input signal, the circuits of Figure 3 and Figure 4 can be used. The circuit of Figure 3 AC-couples the input signal and is usable down to about 10kHz. The lower frequency limit can be extended by increasing C37 and C51. The circuit of Figure 3 can be implemented on DC1500A by putting JP1 and JP3 in the AC position and moving R2 and R3 to the R50 and R53 positions. At this point it will be necessary to drive both AIN+ and AIN–. One of these RC pairs can be attached to the input of the circuit in Figure 2. This allows a single-ended input signal to be level shifted. This is the default condition for DC1500A. One of the most asked for ADC driver circuits is one that allows the input voltage to go below ground with a single supply ADC. Figure 4’s input driver allows the input voltage range to go below ground. It DC-couples and level shifts the analog input at the expense of attenuating the input level by a factor of 2. The circuit of Figure 4 can be implemented on DC1500A by setting VCM to External and biasing the external pin to 4.096V. Then replace R1 and R6 with 1k, put JP1 and JP3 in the DC position and move R2 and R3 to the R50 and R53 positions. R2 249Ω AIN 0V TO 4.096V + R51 49.9Ω C2 0.002μF NPO LT6350 – R3 249Ω + LTC2393-16 – R52 49.9Ω VCM dc1500a F02 C53 10μF This demo board is tested in house by attempting to duplicate the FFT plot shown on the front page of the LTC2393-16 data sheet. This involves using a 1MHz clock source, along with a sinusoidal generator at a frequency of 20kHz. The input signal level is approximately –1dBfs. The input is filtered with a 20kHz single pole RC filter shown in Figure 5. The FFT shown in the data sheet is a 16384-point FFT. A typical FFT obtained with DC1500A is shown in Figure 6. Note that to calculate the real SNR, the signal level (F1 amplitude = –1.117dB) has to be added back to the SNR that PScope displays. With the example shown in Figure 6, this means that the actual SNR would be 94.237dB instead of the 93.12dB that PScope displays. Taking the RMS sum of the recalculated SNR and the THD yields a SINAD of 93.68 dB which is fairly close to the typical value for this ADC. There are a number of scenarios that can produce misleading results when evaluating an ADC. One that is common is feeding the converter with a frequency, that is a sub-multiple of the sample rate, and which will only exercise a small subset of the possible output codes. The proper method is to pick an M/N frequency for the input sine wave frequency. N is the number of samples in the FFT. M is a prime number between one and N/2. Multiply M/N by the sample rate to obtain the input sine wave frequency. Another scenario that can yield poor results is if you do not have a signal generator capable of ppm levels of frequency accuracy or if it cannot be slaved to the clock frequency. You can use an FFT with windowing to reduce the “leakage” or spreading of the fundamental, to get a close approximation of the ADC performance. If an amplifier or clock source with poor phase noise is used, the windowing will not improve the SNR. Figure 2. Single-Ended to Differential Driver dc1500af 3 DEMO MANUAL DC1500A SETUP Layout Component Selection As with any high performance ADC, this part is sensitive to layout. The area immediately surrounding the ADC on DC1500A should be used as a guideline for placement, and routing of the various components associated with the ADC. Here are some things to remember when laying out a board for the LTC2393-16. A ground plane is necessary to obtain maximum performance. Keep bypass capacitors as close to supply pins as possible. Use individual low impedance returns for all bypass capacitors. Use of a symmetrical layout around the analog inputs will minimize the effects of parasitic elements. Shield analog input traces with ground to minimize coupling from other traces. Keep traces as short as possible. When driving a low noise, low distortion ADC such as the LTC2393-16, component selection is important so as to not degrade performance. Resistors should have low values to minimize noise and distortion. Metal film resistors are recommended to reduce distortion caused by self heating. Because of their low voltage coefficients, which can reduce distortion NPO or silver mica capacitors should be used. Any buffer used to drive the LTC2393-16 should have low distortion, low noise and a fast settling time such as the LT6350. VCM (PIN 36) C37 10μF AIN+ 0V TO 4.096V 4.096V R30 R50 1k 249Ω VCM (PIN 36) 0V TO 4.096V C51 10μF AIN+ –4.096V TO 4.096V +IN (PIN 43) C2 2200pF NPO R37 1k AIN– R51 49.9Ω R53 249Ω R52 49.9Ω R1 1k AIN –4.096V TO 4.096V R37 1k dc1500a F03 Figure 3. AC-Coupled Differential Driver R6 1k R51 49.9Ω +IN (PIN 43) C2 2200pF NPO 4.096V – –IN (PIN 42) R30 R50 1k 249Ω R53 249Ω R52 49.9Ω –IN (PIN 42) dc1500a F04 Figure 4. DC-Coupled Differential Driver FROM SINE GENERATOR TO J3 249Ω 0.033μF dc1500a F05 Figure 5. 20kHz RC Filter dc1500af 4 DEMO MANUAL DC1500A SETUP Figure 6. Pscope Screenshot MISCELLANEOUS DIP SWITCHES AND JUMPERS Definitions JP2: VCM sets the DC bias for AIN+ and AIN– when the inputs are AC-coupled. INT is the default position. SW1: OB/2CL: Selects offset binary or two’s complement data format for ADC output word. The default is offset binary. CSL: This pin must be kept low for normal operation. RDL: This pin must be kept low for normal operation. SER_PARL: Selects serial or parallel operation. Default position is parallel. In parallel mode fS = fCLK. In serial mode fS = fCLK/80. dc1500af 5 DEMO MANUAL DC1500A PARTS LIST LTC23xxCLX Family, DC1500A-1 General BOM ITEM QUANTITY REFERENCE DESIGNATOR DESCRIPTION MANUFACTURERS PART NUMBER 1 0 C1, C9, C39, C52, C54, C55, C56 Capacitor, 0603 OPT 2 1 C2 Capacitor, NP0, 2200pF, 25V, 5% 1206 AVX, 12063A222JAT2A 3 9 C10, C18, C20, C22, C28, C30, C37, Capacitor, X5R, 10μF, 6.3V, 20% 0603 C51, C53 Taiyo Yuden, JMK107BJ106MA (2rls, PbF) 4 13 C11, C27, C29, C31, C32, C34, C35, Capacitor, X7R, 0.1μF, 25V, 10% 0603 C38, C50, C57, C59, C60, C63 AVX, 06033C104KAT2A 5 11 C12, C16, C23, C24, C25, C33, C36, Capacitor, X7R, 1μF, 16V, 10% 0603 C41, C58, C61, C62 AVX, 0603YC105KAT2A 6 2 C13, C14 Capacitor, X5R, 10μF, 10V, 20% 0805 Taiyo Yuden, LMK212BJ106MG 7 4 C15, C17, C19, C21 Capacitor, X7R, 0.01μF, 50V, 10% 0603 AVX, 06035C103KAT2A 8 1 C26 Capacitor, X5R, 47μF, 16V, 20% 1210 Taiyo Yuden, EMK325BJ476MM Capacitor, X5R, 4.7μF, 4V, 20% 0402 9 1 C40 10 8 C42, C43, C44, C45, C46, C47, C48, Capacitor, X5R, 0.1μF, 10V, 10% 0402 C49 AVX, 0402ZD104KAT2A Taiyo Yuden, AMK105BJ475MV-F 11 9 E1, E2, E3, E4, E5, E6, E7, E8, E9 Test Point, Turret, .064" Mill-Max, 2308-2-00-80-00-00-07-0 12 6 JP1, JP2, JP3, JP4, JP5, JP6 JMP, 1 × 3, 0.1" Samtec, TSW-103-07-L-S 13 6 Shunts On JP1 to JP6 Pins 1 and 2 Shunt, 0.1" Center Samtec, SNT-100-BK-G 14 1 JP7 JMP, 1 × 3, 0.079CC Samtec, TMM-103-02-L-S 15 1 Shunt On JP7 Pins 1 and 2 Shunt, 0.079" Center Samtec, 2SN-BK-G 16 1 JTAG Header, 2 × 5, 0.1" Samtec, TSW-105-07-L-D 17 1 J1 Header, 0.1 × 0.1 CNTRS, 40 Pin Samtec, TSW-120-07-L-S 18 3 J2, J3, J4 Connection, BNC, 5 Pins Connex, 112404 19 3 R1, R4, R6 Resistor, Chip, 0Ω, 1/10W, 0603 Vishay, CRCW06030000Z0EA 20 2 R2, R3 Resistor, Chip, 249Ω, 1/10W, 1% 0603 Vishay, CRCW0603249RFKEA 21 1 R7 Resistor, Chip, 499Ω, 1/10W, 1% 0603 Vishay, CRCW0603499RFKEA 22 3 R8, R9, R10 Resistor, Chip, 4.99k, 1/10W, 1% 0603 Vishay, CRCW06034K99FKEA 23 9 R11, R12, R14, R16, R18, R19, R28, R30, R37 Resistor, Chip, 1k, 1/10W, 5% 0603 Vishay, CRCW06031K00JNEA 24 2 R13, R15 Resistor, Chip, 3.92k, 1/10W, 1% 0603 Vishay, CRCW06033K92FKEA 25 1 R17 Resistor, Chip, 49.9Ω, 1/4W, 1% 1206 Vishay, CRCW120649R9FKEA 26 3 R20, R22, R49 Resistor, Chip, 33Ω, 1/10W, 5% 0603 Vishay, CRCW060333R0JNEA 27 1 R24 Resistor, Chip, 1Ω, 1/10W, 5% 0603 Vishay, CRCW06031R00JNEA 28 1 R25 Resistor, Chip, 1.69k, 1/10W, 1% 0603 Vishay, CRCW06031K69FKEA 29 1 R26 Resistor, Chip, 1.54k, 1/10W, 1% 0603 Vishay, CRCW06031K54FKEA 30 1 R27 Resistor, Chip, 2.80k, 1/10W, 1% 0603 Vishay, CRCW06032K80FKEA 31 0 R29, R36, R38, R50, R53, R55 Resistor, Chip, 0603 OPT 32 4 R31, R32, R33, R34 Resistor, Chip, 1k, 1/16W, 5% 0402 Vishay, CRCW04021K00JNED 33 5 R35, R40, R41, R42, R43 Resistor, Chip, 10k, 1/16W, 5% 0402 Vishay, CRCW040210K0JNED 34 4 R45, R46, R47, R48 Resistor, Chip, 300Ω, 1/16W, 5% 0402 Vishay, CRCW0402300RJNED 35 2 R51, R52 Resistor, Chip, 49.9Ω, 1/16W, 1% 0402 Vishay, CRCW040249R9FKED 36 1 R54 Resistor, Chip, 10k, 1/10W, 5% 0603 Vishay, CRCW060310K0JNEA dc1500af 6 DEMO MANUAL DC1500A PARTS LIST ITEM QUANTITY REFERENCE DESIGNATOR DESCRIPTION MANUFACTURERS PART NUMBER 37 1 SW1 Switch, 219-4MST CTS Electronic Components, 219-4MST 38 1 U2 IC., LT6350CMS8, MS8 Linear Tech., LT6350CMS8 39 1 U4 IC., 24LC025, TSSOP-8 Microchip, 24LC025-T/ST 40 1 U5 IC., LT1790ACS6-4.096, SOT23-6 Linear Tech., LT1790ACS6-4.096#PBF 41 1 U6 IC., LT1763CS8-1.8, SO8 Linear Tech., LT1763CS8-1.8#PBF 42 2 U7, U9 IC., LT1763CS8, SO8 Linear Tech., LT1763CS8#PBF 43 1 U8 IC., LT1763CS8-5, SO8 Linear Tech., LT1763CS8-5#PBF 44 1 U10 IC., LT1964ES5-SD, SOT23-5 Linear Tech., LT1964ES5-SD#PBF 45 1 U12 IC., NL17SZ74, US8 On Semi., NL17SZ74USG 46 1 U13 IC., NC7ST04P5X, SC70-5t Fairchild, NC7ST04P5X 47 1 U14 IC., EPM240GT100C5N, TQFP100 Altera Corp., EPM240GT100C5N 48 1 U15 IC., NC7SZ04P5X, SC70-5 Fairchild, NC7SZ04P5X 49 1 U16 IC., NC7SVU04P5X, SC70-5 Fairchild, NC7SVU04P5X 50 4 Stand-Off at 4 Corners Stand-Off, Nylon 0.25" Keystone, 8831(SNAP ON) 51 1 Stencil for Top Side Only DC1500A-1 LTC2393CLX Family, Demo Circuit 1500A-A ITEM QUANTITY REFERENCE DESIGNATOR DESCRIPTION 1 1 DC1500A-1 General BOM 2 1 U1 IC., LTC2393CLX-16, LQFP48-7X7 MANUFACTURERS PART NUMBER Linear Tech., LTC2393CLX-16#PBF LTC2392CLX-16, Demo Circuit 1500A-B ITEM QUANTITY REFERENCE DESIGNATOR DESCRIPTION 1 1 DC1500A-1 General BOM 2 1 U1 IC., LTC2392CLX-16, LQFP48-7X7 MANUFACTURERS PART NUMBER Linear Tech., LTC2392CLX-16#PBF LTC2391CLX-16, Demo Circuit 1500A-C ITEM QUANTITY 1 1 DC1500A-1 REFERENCE DESIGNATOR General BOM DESCRIPTION 2 1 U1 IC., LTC2391CLX-16, LQFP48-7X7 MANUFACTURERS PART NUMBER Linear Tech., LTC2391CLX-16#PBF dc1500af 7 A B C D J3 AC R6 0 1 C37 10uF 6.3V C9 OPT 6.3V C51 10uF INT EXT C1 OPT JP2 VCM 1 C41 1uF 1 2 3 JP3 -COUPLING 3 DC 2 R1 0 AC JP1 +COUPLING 3 DC 2 R17 49.9 1206 C27 0.1uF R38 OPT R37 1k C39 18pF 2 C52 OPT R28 1k R36 OPT R30 1k R19 1K R18 1K 5 R29 OPT 3 C10 10uF 6.3V C57 0.1uF R7 499 U15 NC7SZ04P5X 4 5 1. ALL RESISTORS ARE IN OHMS, 0603. ALL CAPACITORS ARE IN MICROFARADS, 0603 NOTES: UNLESS OTHERWISE SPECIFIED AIN0V - 4.096V J4 VCM E1 EXT_VCM VCM_BIAS AIN+ 0V - 4.096V VCM_BIAS J2 CLK 80MHz MAX 3.3VPP V- 2 5 3 2 8 C60 0.1uF +IN2 +IN1 + - - + U2 LT6350CMS8 V+ U16 NC7SVU04P5X 4 C35 0.1uF V- C61 1uF * C59 0.1uF C58 1uF 1 -IN1 4 ASSY -A -B -C C62 1uF V+ R2 249 1% R53 OPT R3 249 1% R4 0 R50 OPT C56 OPT CLK BITS 16 16 16 6 4 SW1 219-4MST VCM C55 OPT R49 33 PR VCC CSL RDL 2 1 3 4 C53 10uF 6.3V J2 SHUNT -AIN -AIN -AIN +3.3V JP4 REFIN C36 1uF EXT 2 C50 0.1uF JP6 REFSNS GND C33 1uF VREF FLT U13 NC7ST04P5X R40 - R43 10k, 0402 X 4 PLCS +3.3V -IN FULLY DIFFERENTIAL YES YES YES HIGH SER_PARL OB/2CL 3 42 * +IN R22 33 C38 0.1uF U5 LT1790ACS6-4.096 U1A C32 0.1uF 43 +5V 7 8 4 R52 49.9 0402 R51 49.9 0402 LOW Msps 1 0.5 0.25 8 7 6 5 C54 OPT CLR 2 D 1 CP GND CNVSTL U12 NL17SZ74 R45 - R48 300, 0402 X 4 PLCS C2 2200pF 1206 NP0 U1 LTC2393CLX-16 LTC2392CLX-16 LTC2391CLX-16 C63 0.1uF OUT2 5 4 OUT1 R20 33 3 4 5 3 +3.3V SHDN 7 5 NC VIN 6 VOUT NC 3 GND 2 GND 1 C34 0.1uF 3 V+ V6 1 2 3 4 R55 OPT R54 10k +3.3V CUSTOMER NOTICE R11 1k 29 28 27 26 25 24 23 22 21 16 15 14 13 12 11 10 9 8 7 GND 2 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. R12 1k REFIN JP5 REFOUT CNVST_33 BUSY D17 D16 D15 D14 D13/SCLK D12/SDOUT D11/SDIN D10 D9 D8 D7 D6 D5 D4 D3 D2 D1/A1 D0/A0 ADC RDL Q 5 ON 1 2 3 Q 3 4 3 2 1 34 CNVSTL VCM 36 OB/2CL 6 SER_PARL_MODE0 4 GND_MODE1 5 3 2 1 38 REFIN 37 REFOUT 39 REFSENSE RESET 32 PD 33 CSL 31 GUY H. APP ENG. SCALE = NONE KT PCB DES. APPROVALS OB2C SER_PARL GND_MODE1 SER_PARL_MODE0 16_18L BUSY D17 D16 D15 D14 D13/SCLK D12/SDOUT D11/SDIN D10 D9 D8 D7 D6 D5 D4 D3 D2 BYTESWAP_D1/A1 GND_D0/A0 4 3 2 1 C31 0.1uF 1 REV R24 1.0 C30 10uF 6.3V SCL WP VCC C11 0.1uF 5 6 7 8 1 R9 4.99k 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 R10 4.99k 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 J1 HD2X20-100SMT-TB DATE 03-24-10 DATE: B SIZE 1 LTC23XXCLX FAMILY DEMO CIRCUIT 1500A Wednesday, March 24, 2010 IC NO. SHEET 1 OF 2 1 REV. LOW NOISE HIGH SPEED SAR ADC FAMILY 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only R8 4.99k CLKOUT DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 DB12 DB13 DB14 DB15 DB17 DB16 C40 4.7uF 4V 0402 +3.3V C28 10uF 6.3V GUY H. PRODUCTION C29 0.1uF APPROVED DESCRIPTION REVISION HISTORY TECHNOLOGY 24LC025-I /ST VSS SDA A2 A1 A0 U4 TITLE: SCHEMATIC * U1B +5V ECO 47 AVP/AVL 46 45 40 2 AVP AVP AVP AVP 48 44 41 35 20 1 3 DVP/DVL 19 DVP GND GND GND GND GND GND 18 OVP OGND 17 8 30 5 A B C D DEMO MANUAL DC1500A SCHEMATIC DIAGRAM dc1500af A B C D E9 U14A EPM240T GND +9V/+10VIN IO21 IO20 IO19 IO18 IO17 IO16 IO15 IO8 IO7 IO6 IO5 IO4 IO3 IO2 IO1 21 20 19 18 17 16 15 8 7 6 5 4 3 2 1 C26 47uF 16V 1210 5 SER_PARL_MODE0 GND_MODE1 OB2C CNVST_33 CLKOUT DB15 DB14 DB13 DB12 DB11 C23 1uF 16V C24 1uF 16V C25 1uF 16V +9V_IN 5 8 5 8 5 8 U14B EPM240T SHDN IN U8 LT1763CS8-5 SHDN IN U7 LT1763CS8 SHDN IN U6 LT1763CS8-1.8 GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND IO50 IO49 IO48 IO47 IO42 IO41 IO40 IO39 IO38 IO37 IO36 IO35 IO34 IO33 IO30 IO29 IO28 IO27 IO26 3 6 7 D4 D3 D2 D1 D0 47 48 49 50 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 BUSY 4 2 1 4 2 1 4 2 1 42 41 40 39 38 37 36 35 34 33 30 29 28 27 26 BYP SEN OUT BYP SEN OUT BYP SEN OUT R26 1.54k R25 1.69k GND_D0/A0 BYTESWAP_D1/A1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11/SDIN D12/SDOUT D13/SCLK D14 D15 D16 D17 BUSY C21 0.01uF +5V C19 0.01uF +3.3V C17 0.01uF +1.8V 4 4 VCCIO VCCINT IO75 IO74 IO73 IO72 IO71 IO70 IO69 IO68 IO67 IO66 IO61 IO58 IO57 IO56 IO55 IO54 IO53 IO52 IO51 75 74 73 72 71 70 69 68 67 66 61 58 57 56 55 54 53 52 51 ADC_LOGIC U14C EPM240T C22 10uF 6.3V +3.3V JP7 VCCIO +2.5V R27 2.80k 3 2 1 C20 10uF 6.3V C18 10uF 6.3V E8 E4 E2 DB2 DB1 DB0 DB17 DB16 16_18L SER_PARL +5V +3.3V +1.8V IO99 IO98 IO97 IO96 IO95 IO92 IO91 IO90 IO89 IO88 IO87 IO86 IO85 IO84 IO83 IO82 IO81 IO78 IO77 IO76 IO100 E6 U14D EPM240T -9V/-10VIN 100 99 98 97 96 95 92 91 90 89 88 87 86 85 84 83 82 81 78 77 76 3 C16 1uF 16V C12 1uF 16V -9V_IN 3 GND SHDN IN DB10 DB9 DB8 DB7 DB6 DB5 DB4 SHDN IN U9 LT1763CS8 DB3 5 8 1 3 2 U10 LT1964ES5-SD BYP SEN OUT ADJ OUT +3.3V GND GND GND 3 6 7 E3 5 4 2 1 JTAG 9 7 5 3 1 C14 10uF 10V 0805 OPAMP OPAMP DEV_CLRN DEV_OE R31 - R33 CLK 1k, 0402 X 3 PLCS R16 1k R15 3.92k C13 10uF 10V 0805 2 SCALE: NONE PCB DES. K. TRAN THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. APPROVALS CONTRACT NO. CNTRL TDO TCK TDI TMS DEV_CLRN DEV_OE GCLK3 GCLK2 GCLK1 GCLK0 U14E EPM240T V+ V- ENG. G. HOOVER 25 24 23 22 44 43 64 62 14 12 E5 E7 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. CUSTOMER NOTICE R34 1k 0402 R35 10k 0402 C15 0.01uF V+ R14 1k R13 3.92k HD2X5-100 10 8 6 4 2 4 5 V- 2 TECHNOLOGY 13 63 9 31 45 59 80 94 GND GND GND GND GND GND GND GND G. HOOVER APPROVED 10 11 32 46 60 93 65 79 DATE 12-01-09 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 Fax: (408)434-0507 LTC Confidential-For Customer Use Only POWER VCCINT VCCINT VCCIO1 VCCIO1 VCCIO1 VCCIO2 VCCIO2 VCCIO2 U14F EPM240T 1ST PROTOTYPE DATE: B SIZE 1 LTC23XXCLX FAMILY DEMO CIRCUIT 1500A Tuesday, December 01, 2009 IC NO. SHEET 2 OF 2 1 REV LOW NOISE HIGH SPEED SAR ADC FAMILY TITLE: SCHEMATIC 1 DESCRIPTION REVISION HISTORY C42 C43 0.1uF 0402 +1.8V C44 - C49 0.1uF 0402 1 REV +3.3V ECO A B C D DEMO MANUAL DC1500A SCHEMATIC DIAGRAM dc1500af 9 DEMO MANUAL DC1500A ASSEMBLY DRAWINGS dc1500af 10 DEMO MANUAL DC1500A PCB LAYOUT AND FILM Top Silkscreen Top Solder Paste dc1500af 11 DEMO MANUAL DC1500A Top Solder Mask Top Layer dc1500af 12 DEMO MANUAL DC1500A PCB LAYOUT AND FILM GND Plane 1 GND Plane 2 dc1500af 13 DEMO MANUAL DC1500A PCB LAYOUT AND FILM Bottom Layer Bottom Solder Mask dc1500af 14 DEMO MANUAL DC1500A FABRICATION DRAWINGS dc1500af Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 DEMO MANUAL DC1500A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright © 2004, Linear Technology Corporation dc1500af 16 Linear Technology Corporation LT 0410 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2010