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Semiconductor Materials
Product Guide
Company Overview
MEMC® is a global leader in semiconductor and solar technology, and a leading solar energy
services provider. Our products are the building blocks for the $1 trillion electronics and the
$51 billion solar energy markets. Driven by world class research and development capabilities,
MEMC has earned over 750 patents and continues to build on the corporate culture of
innovation and cutting-edge technology. In the energy arena, through our SunEdison® subsidiary,
MEMC is one of the largest developers of solar power projects. Our solar materials and
SunEdison businesses are providing the electricity that powers those technologies — while
reducing the world’s dependence on fossil fuels. Our semiconductor wafer products are the
foundation for the technologies that entertain us, educate us, and connect us to each other.
Ultimately, our strength lies not only in producing best-in-class products, but in forging mutually
beneficial relationships with our customers.
Figure 1 MEMC Process
Granular polysilicon
Chunk polysilicon
MEMC produces its own electronic-grade polysilicon using
a fully-integrated front-end manufacturing strategy with
strict quality control across each step of the process.
1
MEMC Semiconductor Materials
Ingot
Wafers
Our on-site technical field engineers work closely with customers to ensure each
product meets precise specifications and technical requirements suited to their
specific applications.
St. Peters, Missouri
Epi
100 mm
125 mm
150 mm
200 mm
SOI
200 mm
300 mm
CZ Mono-crystal
100 mm
125 mm
150 mm
300 mm
450 mm
Arsenic
Antimony
DSS Multi-crystal
Mono-crystalline
and Multi-crystalline
Solar Wafers
Merano, Italy
Ipoh, Malaysia
CZ Mono-crystal
Polysilicon
100 mm
Chunk
125 mm
Gas/Other
150 mm
Trichlorosilane
200 mm
Hydrochloric
Arsenic
acid
Red Phosphorus
Antimony
Polished
200 mm
Polished
300 mm
Epi
100 mm
125 mm
150 mm
200 mm
Epi
300 mm
Utsunomiya, Japan
Cheonan, South Korea
CZ Mono-crystal
for Silicon Parts
325 mm+
Polished
200 mm
300 mm
CZ Mono-crystal
200 mm
300 mm
BG SOI
200 mm
CZ Mono-crystal
for Silicon Parts
315 mm
Novara, Italy
Polished
150 mm
200 mm
Epi
100 mm
125 mm
150 mm
200 mm
Hsinchu, Taiwan
Kuala Lumpur, Malaysia
Polished
100 mm
125 mm
150 mm
Polished
200 mm
300 mm
CZ Mono-crystal
200 mm
300 mm
Epi
200 mm
300 mm
CZ Mono-crystal
for Silicon Parts
315 mm
Semiconductor Customer Locations
Manufacturing Facilities
MEMC Semiconductor Materials
2
The MEMC Advantage
MEMC is uniquely positioned to deliver maximum value to customers. We utilize leading-edge design and
manufacturing to continually improve both our processes and end-product attributes. And we deliver our
solutions to customers through a global footprint to meet customer requirements and mitigate risk.
Innovative, Vertically-Integrated Manufacturing
Building on Advanced Manufacturing Processes
MEMC is one of only three companies in the world that produce both chunk and granular polysilicon in high
volume. Our fully-integrated front-end manufacturing strategy with strict quality control delivers a steady
supply of exceptionally pure polysilicon that can be blend-tailored to meet specific customer requirements.
The result is maximum yield and efficient delivery to customers — as well as superior value.
Delivering Dependable Quality and Consistency
An established leader in semiconductor wafering, MEMC applies 50 years of technical expertise, together
with continued R&D focus, to every step of product development. We apply robust management to every
parameter and step of wafer production, for dependable delivery and consistently superior quality.
• Exercising complete control over defects and oxygen/precipitation boosts quality and efficiency of
manufacturing.
• Best-in-class quality levels in impurity concentrations, surface defects, and wafer flatness ensure
maximum performance and reliability.
Figure 2 Polysilicon Production Processes
Siemens
FBR
Chunk Polysilicon
Granular Polysilicon
Batch Process
Continuous Process
Traditional Technology
Proprietary Technology
Chunk polysilicon manufactured using an industry standard
Siemens process
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MEMC Semiconductor Materials
Granular polysilicon supports multiple recharge, providing
a continuous supply of polysilicon for customers
Expertise in Developing Customized Wafers to Meet Customer Needs
MEMC applies leading-edge design technology rules to create customized wafers developed and built to
meet our customers’ requirements. Depending on customer requirements, MEMC delivers single-side or
double-side wafers polished to a mirror-like surface. MEMC prime polished wafer products are used in a
variety of integrated circuit (IC) applications, including memory and other leading market segments. For
applications that are sensitive to extended point defects, such as crystal-originated-pits (COPs), we offer a
full range of wafer products, from low COP prime to annealed to Optia™ offerings.
• Advanced wafers can meet demanding design rules such as 22 nm or below.
• Attributes including range of diameter, dopants, and defect levels drive the design of polished, Epi, and
SOI wafers.
A Global Manufacturing Footprint
Local, Responsive Customer Service
As a global organization, MEMC prides itself on its ability to respond to customers’ specific requirements.
Our field application engineers stationed near customer sites work continuously to understand application
requirements, providing constant, real-time feedback that can be incorporated in our wafer production and
align them precisely with customer needs.
• On-site field application engineering support provides access to MEMC research and development
scientists, to build a collaborative customer relationship and a deep understanding of their requirements.
Maximum Quality, Minimal Risk
MEMC leverages a global manufacturing presence to help minimize risk and ensure steady, uninterrupted
supplies. In the event of a natural disaster or other disruption, MEMC can smoothly offload manufacturing
tasks to avoid any interruption and continue to meet customer requirements.
• With more than 40 local manufacturing, sales, and support centers worldwide, MEMC enhances business
agility, mitigates risk, and accelerates time to market.
Commitment to our customers has enabled MEMC to
create new products, new manufacturing methods, and
innovation critical to our continued success.
MEMC Semiconductor Materials
4
Semiconductor Products for a Broad Range of Applications
MEMC offers a diverse portfolio of semiconductor wafers that are appropriate for a wide range of
applications, as shown in Figure 3, “Product Portfolio.” MEMC products utilize our innovative polysilicon
manufacturing processes to deliver unmatched value to our customers.
MEMC offers a broad range of polished wafer products with diameters from 100 mm to 300 mm,
manufactured through standard and advanced Cz crystal technologies. Our wafers are p-type doped
with boron to the desired resistivity target or n-type doped with arsenic, antimony, phosphorus or red
phosphorus to the desired resistivity target.
Figure 3 Product Portfolio
®
MDZ
Optia ™
Perfect
Sta
Silicon+MD
Z C M ndar
EP
I
P
Di ow
sc er
Ep rete /
i
Sta
nda
rd
High
Resistivity
Wafers
I
PW = Polished Wafer
MDZ = Magic Denuded Zone
EPI = Epitaxial Wafer
SOI = Silicon On Insulator
MEMC Semiconductor Materials
SOI
SO
Perfect
SOI
wer
Po
100 mm
125 mm
150 mm
200 mm
300 mm
5
OS d
Ep
i
om
st i
Cu Ep
Lo
w
Pr CO
im P
e
PW
led
ea
n
An
t
rfec
Pe con™
Sili
Magic
d
Denude
®
Zone
Optia ™
Figure 4 Semiconductor Wafer Application Based on IC Design
Leading edge IC design
with smallest design
rule and tightest wafer
specifications — especially
for flatness, particles,
and uniformity.
Proven IC design with
smallest design rule.
Somewhat less stringent
wafer specifications. Scales
to lower voltage supply
lines (e.g. from 5 V to 3.3 V).
Proven IC design,
optimized around
350-90 nm technology. Less
stringent wafer flatness and
particle specifications.
Tight resistivity and
uniformity specifications.
Wafer specification
depends on device
function. May also require
special orientations to
achieve desired etching
characteristics.
Microprocessors
Memory, DRAM,
Flash, SRAM
and other
Microcontrollers
CMOS logic
Analog: Amplifiers,
Regulators,
Automotive
Opto ICs: CIS
with CMOS
image sensor
Mixed Signal
MEMS: Applicationspecific
PW =
Annealed =
Optia =
Discrete: RF,
power and Opto
EPI =
SOI =
MEMC Semiconductor Materials
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Polished Products
Our Flagship Product, Ideal for Many Applications
MEMC prime polished wafers are highly refined, ultra-pure wafers of crystalline silicon with ultra-flat surfaces
free of particles and defects. MEMC prime polished wafers are highly versatile products and offer a broad
portfolio that is ideal for a variety of applications.
Product Portfolio
Standard Polished—Single and double-sided polished wafers are tailored to customer needs. Our
standard polished wafers are flat to ultra-flat, available with a symmetric or asymmetric edge profile.
Low COP Prime—Low Crystal Originated Pits (COP) prime wafers minimize wafer defect density
for high yield. COPs are undesirable because they decrease CMOS device yields by increasing field
oxide leakage and junction leakage.
Annealed— As device geometries continue to shrink, there is an increasing need for a silicon
wafer that is free of COPs and has Epi-like gate oxide integrity (GOI) together with built-in gettering
capability for removal of harmful metallic impurities away from the active device regions. Argon
annealed wafers provide a defect-free surface region for high device yield and internal gettering for
resistance to contamination. They are excellent for advanced CMOS technology processes.
Perfect Silicon™—The most advanced silicon materials available today, Perfect Silicon brand wafers utilize
MEMC’s proprietary defect-free crystal growth process that rapidly transports growth-incorporated excess
intrinsic point defects to harmless sinks— before they have a chance to react to form defects. The result is a
highly homogenous, defect-free silicon wafer that requires no post-growth engineering.
Annealed Attributes
Creates a well-defined denuded zone of ≥ 20 μm
BMD density ≥ 5x108 defects/cm3
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MEMC Semiconductor Materials
Perfect Silicon Attributes
Bulk defects — eliminated
Surface defects — eliminated
Metal contamination on surface — none
Bulk precipitation — denuded
High-Resistivity Prime— To support RF-CMOS process technologies scaled to the 0.1 μm design rule and
smaller, wafers must be available in large diameter sizes like 200 mm and 300 mm, and must support all the
advanced wafer parametrics such as site flatness and nanotopography. As wireless standards move to even
higher GHz range frequencies, ultra-high resistivity wafers will be required to maintain acceptable inductor
quality factors and minimize cross-talk between transistors.
Micro Electro Mechanical Systems (MEMS) Grade Prime—MEMS Grade Prime wafers are designed
to meet the demanding needs of miniscule mechanical devices built into semiconductor chips. Applications
include accelerometers, pressure, and temperature sensors. In some cases, non-standard thickness of <
400 microns to > 1000 microns is also available.
Benefits
• Meets all advanced wafer parametric requirements for global and local flatness, warp, surface roughness,
and metals.
• Minimal COPs provide high GOI yield and improved fabrication efficiency.
• Out of Box Gettering (OOBG) ensures that any harmful metals introduced during fab processing are safely
gettered into the bulk, away from the active device regions.
• Robust internal gettering and precipitate free zone (PFZ) provided by patented MDZ treatment if required
by customer.
• One hundred percent free of COPs, D-defects, I-defects, and other defects.
• MEMC high resistivity wafers provide substrate resistivity
≥ 1000 ohm-cm.
• Optia and Annealed wafers offer Epi-like performance at lower cost.
• BMDs present in an annealed wafer ensure immediate gettering for low thermal budget processes.
MEMC Semiconductor Materials
8
Magic Denuded Zone® (MDZ)
The Magic Denuded Zone (MDZ) manufacturing process is a patented Rapid Thermal Process (RTP)
technique that manipulates vacancy to control precipitation behavior and minimize device yield issues. It
enables robust, reliable internal gettering that is superior to other gettering processes, such as hydrogen
annealing and nitrogen doping. MEMC utilizes its proprietary MDZ process to minimize contamination risks
and help customers control integrated circuit (IC) fabrication costs.
The MDZ process pre-programs oxygen precipitation density and depth distribution to specific targets
(Figure 4). This rapid method of achieving reproducible, reliable internal gettering is nearly independent of
initial oxygen concentration, IC application, and thermal history effects, such as the wafer’s position within an
ingot. The result is a silicon wafer with the ideal oxygen precipitation behavior — even when other variables
fluctuate in the manufacturing and IC processes.
The process erases the crystal history of the wafer and provides a singular, highly simplified solution,
regardless of the crystal growth process or the wafer’s oxygen content. MEMC’s groundbreaking MDZ
process plays a critical role in our effort to help customers improve device yield consistency and efficiency.
Benefits
• MDZ simplifies the IC process, reducing thermal budgets by 40% and reducing processing costs.
• Advanced manufacturing process reduces risks to significantly enhance device yields.
• MDZ is adaptable to present and future technologies, providing maximum flexibility.
Challenge
9
Solution
Improve reliability of DRAMs & NAND by excellent gate
oxide integrity (GOI )
Perfect Si completely free of COPs guarantees superior GOI
performance
Prevent trench to trench shorts in the DRAM caused by
COPs in the bulk
Perfect Si completely free of COPs in the entire bulk
Prevent die loss due to oxygen precipitates at near
surface
MDZ provides a denuded zone where oxygen precipitation is
avoided
Prevent die loss due to excessive junction leakage
current
MDZ provides robust intrinsic gettering outside the denuded zone
to capture metallic impurities
Improve processing cost of ownership by reduced
thermal cycle time
MDZ helps reduce the thermal budget by as much as 40%,
eliminating denuding and nucleation cycles at FEOL
Minimize stored charge loss at tunnel oxide region of
NAND
Perfect Si provides excellent GOI of tunnel oxide, while MDZ
getters metals causing charge loss
MEMC Semiconductor Materials
Optia™—The Optia wafer is a high-performance silicon substrate for Very Large-Scale Integration (VLSI) and
Ultra Large-Scale Integration (ULSI) IC devices, which utilize increasingly dense and complex architectures.
Crystal-related defects in wafers have been correlated with decreased GOI performance. Optia wafers have
zero COPs and feature Epi-like GOI, providing an ideal solution for next-generation IC devices. These wafers
are also ideal for leading-edge memory applications at sub-50 nm design rule.
In addition to low COP densities, many customers require intrinsic gettering, with increasingly tight
specifications. Optia wafers achieve this using the MEMC patented process, Magic Denuded Zone thermal
treatment. MEMC Optia wafers offer an unparalleled combination of superior quality, performance, and cost
of ownership compared to annealed wafers. A built-in IG template through MDZ eliminates the need for
custom oxygen out-diffusion and nucleation, and reduces customer cycle time.
LPDs: Light Point Defects
Advanced Flatness:
30 max @ > 0.05 micron
SFQR ≤ 0.04 μm for 300 mm
(site flatness quality requirements )
GOI: > 95%
Figure 5 MDZ Cycle Time Savings
1800 minutes
total time when
using MDZ
2900 minutes
total time
without MDZ
1100 minutes
total process
time savings
Modified Thermal Cycle with MDZ
Standard Thermal Cycle without MDZ
0
500
1000
1500
2000
2500
3000
Process Time (min)
MEMC Semiconductor Materials
10
EPI Products
Built for Advanced Semiconductor Applications
MEMC Epi wafers enable improved electrical isolation of IC elements, which is critical for maximum
performance and reliability. Without sufficient isolation, latchup issues can ruin device performance.
Smaller device features reduce the distance between circuit elements, exacerbating isolation problems,
as well as increasing sensitivity of the devices to microscopic surface imperfections in the wafer.
MEMC Epi wafers support customization of attributes such as resistivity, conductivity type, layer
thickness, and the number of layers. This provides additional flexibility and enables MEMC to deliver
high-quality wafers designed to precise customer requirements.
Benefits
• MEMC epitaxial wafers offer high performance in a bulk wafer, together with increased reliability of finished
semiconductor devices.
• Our epitaxial wafers are designed to help minimize latchup issues.
• MEMC wafers provide the ability to tailor attributes in the substrate and Epi layer to meet specific
application requirements.
Challenge
11
Solution
Maintain dimensional scaling at
maximum yields & performance
Perfect surface and bulk quality with ultra-flat edge to edge, minimal
nanotopography & edge rolloff
Highly reliable GOI
Defect free Epi layer provides GOI benchmark performance
Prevent excessive junction leakage
The P+ substrate provides built-in gettering. Add MDZ or nitrogen in
the P- substrate to enhance gettering
Improve resistance to furnace slip,
dislocations, etc.
Optimized window of oxygen concentration and resistivity in the P+
substrate to maintain sufficient yield strength
Low on-state resistance of low voltage
power devices
Epi substrate doped highly with arsenics, red phosphorus or boron
lowers sub-drain resistance
High yields of power devices despite
the tradeoff of BV and Rds
Precisely controlled Epi layer thickness and resistivity targets and
variability
Reduce dark current of CMOS image
sensor
Lowest trace metals in the Epi layer
MEMC Semiconductor Materials
Product Portfolio
Standard CMOS Epi—MEMC standard CMOS epitaxial wafers meet the technological demands of our
advanced manufacturing customers. We offer a variety of resistivity targets.
CMOS Image Sensor Epi—Our CMOS image sensor Epi wafers are ideal for demanding optical and
imaging applications.
Power Discrete Epi— MEMC provides Epi wafers specifically for power metal–oxide semiconductor fieldeffect transistor (MOSFET), bipolar and other discrete applications. Combinations of n-type and p-type Epi
layers and heavily-doped substrates are available for these applications.
Thin Layer P/P Epi—These advanced wafers offer highly-controlled resistivity for the electrically active
region in devices.
TABLE 1 Uniformity: Thickness and Resistivity
Diameter
Reactor
<=150 mm
Uniformity
Thickness
Resistivity
Batch
5%
8%
150 mm
Single Wafer
2%
4%
200 mm
Single Wafer
2%
5%
300 mm
Single Wafer
2%
7%
TABLE 2 DEVIATION from TARGET: thickness and Resistivity
Diameter
Reactor
<=150 mm
Deviation from Target
Thickness
Resistivity
Batch
2%
9%
150 mm
Single Wafer
2%
4%
200 mm
Single Wafer
2%
4%
300 mm
Single Wafer
2%
4%
MEMC Semiconductor Materials
12
SOI Products:
Increased Cost-effective Performance and Functionality
SOI enables very high voltage devices for power control. SOI also significantly increases fabrication
productivity by allowing for more compact circuit designs, yielding more chips per wafer. They include an
advanced insulating layer that enables smooth, efficient performance to support faster applications.
These products offer superior power consumption, and are ideal for applications that require the performance
and die shrink advantages provided by SOI. They provide robust performance desirable in industrial
applications. SOI technology also enables increased chip functionality without the cost of major fab process
equipment changes.
Product Portfolio
Perfect SOI—Our CMOS SOI wafers utilize Perfect Silicon to provide superior performance, flexibility, and
functionality, while minimizing power consumption. CMOS SOI wafers meet nominal thickness targets of
< ~ 2 um. Thicker specifications are available for specific applications as required.
Perfect SOI wafers are produced on Perfect Silicon that is free of COPs. Utilizing Perfect Silicon, together
with MEMC’s superior technology, provides a simplified SOI process compared to traditional manufacturing
processes. The result is cost-effective SOI wafer fabrication with exceptional material quality and yield.
High resistivity handle SOI is a high performance and lower cost alternative to RF switches on expensive
GaAs wafers.
Challenge
13
Solution
Achieve low power System On Chip (SOC) with
increased performance at faster speed
Exploit Perfect SOI’s thin Si and buried oxide (BOX) enabling no
floating body effect for full depletion (FD)
Higher level of integration with increased packing
density
Perfect SOI ‘s BOX eliminates junction isolation structures and
reduces parasitic capacitance
Higher bandwidth and low noise of high performance
analog devices
Perfect SOI with high resistivity handle wafer reduces substrate
coupling to passives at high frequency
High breakdown voltage at low Rds(on) of high power
and analog devices
Power SOI offers a wide range of thicknesses of the top silicon and
the buried oxide layers
Cost effective micromachining process for various
MEMS applications
Power SOI’s BOX acts a natural etch stop releasing a thick top Si
for a strong moving part
Design and fabricate back illumination CMOS image
sensors at low cost of ownership
Exploit SOI’s BOX as a natural etch stop, helping the process flows
MEMC Semiconductor Materials
Applications
MEMC Perfect SOI wafers are ideally suited for ultra-thin applications for advanced CMOS devices, as well
as thick SOI applications that include MEMS and power devices. Thick SOI wafers meet nominal thickness
targets of > 5 um.
Power SOI—Flexible Power SOI wafers from MEMC can be customized for a wide range of
attributes, including SOI layer thickness, carrier type, resistivity, and orientation. MEMC thick SOI
wafers utilize Power SOI, and are an excellent choice for automotive applications, as well as analog
and power applications, including accelerometers and gyroscopes in consumer electronic devices.
MEMC Power SOI products take advantage of a unique SOI layer smoothing process performed in a
commercial epitaxial reactor. The use of an epitaxial reactor for smoothing processes enables precise insitu thickening of the SOI layer to the layer thickness specification. The result is a highly uniform SOI layer
produced in the most cost-effective manner available.
Applications
MEMC SOI products are well-suited for RF front-end devices, which are utilized in integrated handsets that
require cost and footprint reduction. They are also appropriate for MEMS applications, as well as CMOS
image sensors. SOI with high resistivity handles allow integration of CMOS with RF switching.
The faster circuit operation and higher power handling and breakdown voltages
made possible by SOI technology enhances the performance of integrated
circuits for a broad variety of consumer, automotive, and industrial applications.
• Improve device performance such as switch signal speed
• Enhance thermal performance and noise resistance
• Minimize latchup issues
• Maximize power efficiency and performance
MEMC Semiconductor Materials
14
MEMC Semiconductor Materials
Figure 6 Semiconductor Product Evolution
TECHNOLOGY NODE PROGRESSION OVER TIME
>110 nm
90 nm
65 nm
45 nm
32 nm
22 nm
10 nm
Materials Improvements
Wafering Improvements
Polished Silicon
Flatness,
particles,
metals, 3 mm
edge exclusion
Thick SOI
Thick SOI
Engineered
Orientation
Engineered
Orientation
Engineered
Orientation
SOI
SOI
SOI
SOI
Defect
Engineered Si
Defect
Engineered Si
Defect
Engineered Si
Defect
Engineered Si
Defect
Engineered Si
Epi
Epi
Epi
Epi
Epi
Epi
Polished Silicon
Polished Silicon
Polished Silicon
Polished Silicon
Polished Silicon
Polished Silicon
... plus polished
edge, smooth
backside
... plus
nanotopography,
double-side
polished
... plus 2 mm
edge exclusion
... plus fab
process
specific wafer
shape
...plus flatter,
edge to edge
... plus flatter,
cleaner and
purer for
13 nm/10 nm
max 1 large
area defect
TO SuPPOrT ONe geNerATiON AHeAD
Crystal Improvements
INNOVATION AT EVERY STEP DRIVEN BY APPLICATION
450 mm
Bulk Si
...plus Oxygen
Control, Point
Defect Control
... plus Perfect
Si + MDZ,
Resistivity
0.002 to 100
Ohm-cm
FLATTer, Purer, CLeANer AND CuTTiNg eDge POrTFOLiO
... plus 300mm
Perfect Si +
MDZ, Resistivity
0.0015 to 250
Ohm-cm
... plus Resistivity
0.0012 to 1000
Ohm-cm
... plus
Enhanced
Resistivity
0.001 to >1000
Ohm-cm
... plus Next
Gen Hot Zone
Resistivity <0.001
to >10 k ohmcm enhanced
Portfolio
MEMC drives innovation at every step of the value chain to
maximize efficiency, deliver superior value for customers and
a relentless effort in research and development.
R&D:
ProDUCT:
Constantly and
consistently
improving our
manufacturing
Our strength
stems from
decades of
experience
Customer:
Our relentless
effort to be in
tune with our
customers
17
MEMC Semiconductor Materials
A Commitment to Innovation and Our Customers
MEMC leverages advanced manufacturing capabilities and industry-leading technology to consistently
improve efficiency while reducing cost. Our innovative processes, together with our clear understanding of
customers’ business objectives, offer a clear path to success now and in the future.
Relentless Innovation
Innovation lies at the heart of MEMC’s corporate culture. Our commitment to innovation has enabled MEMC
to create new products, new manufacturing methods, and above all, build on advanced research and
development. MEMC drives innovation in all areas of our businesses and at all levels within the company,
including R&D, manufacturing, and in our customer relations and services.
• MEMC is an industry pioneer with decades of participation in global standards organizations to drive
advanced technologies and maximize inter-operability.
• Partnerships with leading universities propel innovation and support the latest features and functionality.
• Rigorous quality control with ISO-certified manufacturing enhances performance and reliability.
Aligning Our Processes to Meet Customer Needs
Our strength lies not only in producing best-in-class products, but in forging mutually beneficial relationships
with our customers. Every step of our design, development, and manufacturing processes is focused on
close collaboration with our customers to meet their specific technical requirements.
MEMC leverages a global organization to station field application engineers near customer sites. These
engineers work continuously with our customers to understand their specific product requirements,
providing constant, real-time feedback to MEMC. We then apply this input to our production processes to
refine and customize our products and align them precisely with customer needs.
Ready to Make a Difference
MEMC extends its innovation and customer-centric focus well beyond manufacturing. We apply what
we have learned to our research and development processes, to continually fine-tune and optimize every
aspect of product development. The result is maximum efficiency and consistent superior value for our
customers.
© 2012 MEMC Electronic Materials Inc. All rights reserved. MEMC, SunEdison, the MEMC logo, the SunEdison Logo and the Joint
MEMC SunEdison logo are registered trademarks or trademarks of MEMC Electronic Materials, Inc. and/or its affiliates in the United
States and certain other countries. All other trademarks mentioned in this document are the property of their respective owners. The
use of the word “partner” does not imply a partnership relationship between MEMC Electronic Materials Inc. and any other company.
MEMC Semiconductor Materials
18
Global Locations
North America
Canada
Puerto Rico
United States
South America
Brazil
Europe
Germany
Greece
Italy
Spain
Asia
China
Dubai
India
Japan
Korea
Malaysia
Singapore
Taiwan
Thailand
MEMC • 501 Pearl Drive • St. Peters, MO 63376 • (636) 474-5000 • www.memc.com
SunEdison • 600 Clipper Drive • Belmont, CA 94002 • (650) 453-5600 • www.sunedison.com
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