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6 October University
Faculty of Applied Medical Sciences
Department of Biomedical equipment and systems
BIOELECTRONICS 1
Lec 9:
Op Amp Applications
By
Dr. Eng. Hani Kasban Mahmoud
2017
1
The Unity-gain Amplifier or “Buffer”
• This is a special case of the non-inverting amplifier, which is also
called a voltage follower, with infinite R1 and zero R2. Hence Av = 1.
• It provides an excellent impedance-level transformation while
maintaining the signal voltage level.
• The “ideal” buffer does not require any input current and can drive any
desired load resistance without loss of signal voltage.
• Such a buffer is used in many sensor and data acquisition system
applications.
The Summing Amplifier

Since the negative amplifier
input is at virtual ground,
v
v
1
i 
i  2 i   vo
1 R
2 R
R
1
2 3
3
Since i-=0, i3= i1 + i2,
R
R
vo  3 v  3 v
R 1 R 2
1
2
• Scale factors for the 2 inputs
can be independently adjusted
by the proper choice of R2 and
R1 .
• Any number of inputs can be
connected to a summing
junction through extra
resistors.
• This circuit can be used as a
simple digital-to-analog
converter. This will be
illustrated in more detail, later.
The Difference Amplifier
R
Since v-= v+ vo   2 (v  v )
R 1 2
1
For R2= R1 vo  (v1  v2)
• This circuit is also called a
differential amplifier, since it
amplifies the difference between
the input signals.
v o  v-  i R  v-  i R
• Rin2 is series combination of R1
2 2
1 2
and R2 because i+ is zero.


R R 
R
R

2 v-  2 v • For v2=0, Rin1= R1, as the circuit
 v-  2 ( v  v- )   1

R 1
R 
R 1
reduces to an inverting amplifier.

1
1 
1

• For general case, i1 is a function
R
of both v1 and v2.
2 v
Also, v 

R R 2
1 2
Difference Amplifier: Example
•
•
•
•
Problem: Determine vo
Given Data: R1= 10kW, R2 =100kW, v1=5 V, v2=3 V
Assumptions: Ideal op amp. Hence, v-= v+ and i-= i+= 0.
Analysis: Using dc values,
R
100kW
A  2 
10
dm
R
10kW
1


Vo  A V V 10(5 3)
dm 1 2 
Vo 20.0 V
Here Adm is called the“differential mode voltage gain” of the difference amplifier.
Finite Common-Mode Rejection Ratio
(CMRR)
A(or Adm) = differential-mode gain
Acm = common-mode gain
vid = differential-mode input voltage
vic = common-mode input voltage
v
v
v  v  id
v  v  id
1 ic 2
2 ic 2
A real amplifier responds to signal
common to both inputs, called the
common-mode input voltage (vic).
In general,
v v 
vo  A (v v ) Acm 1 2 
dm 1 2

2 

vo  A (v ) Acm(v )
ic
dm id
An ideal amplifier has Acm = 0, but for a
real amplifier,




Acm v 
v


ic  A v  ic 
vo  A v 

dm id
dm id CMRR 
A


dm 
A
CMRR  dm
Acm
and CMRR(dB) 20log (CMRR)
10
Finite Common-Mode Rejection Ratio:
Example
• Problem: Find output voltage error introduced by finite CMRR.
• Given Data: Adm= 2500, CMRR = 80 dB, v1 = 5.001 V, v2 = 4.999 V
• Assumptions: Op amp is ideal, except for CMRR. Here, a CMRR in dB
of 80 dB corresponds to a CMRR of 104.
• Analysis: v  5.001V 4.999V
id
v  5.001V 4.999V  5.000V
ic
2




v
5.000


ic

V 6.25V
vo  A v 
 25000.002

dm id CMRR 

104 
In the "ideal" case, vo  A v  5.00 V
dm id
6.255.00
% output error
100% 25%

5.00
The output error introduced by finite CMRR is 25% of the expected ideal
output.

uA741 CMRR Test: Differential Gain
Differential Gain Adm = 5 V/5 mV = 1000
uA741 CMRR Test: Common Mode Gain
Common Mode Gain Acm = 160 mV/5 V = .032
CMRR Calculation for uA741
Adm 1000
CMRR 

 3.125x10 4
Acm .032
CMRR(dB)  20log 10 CMRR   89.9 dB

Instrumentation Amplifier
R
vo   4 (va  v )
b
R
3
va  iR  i(2R )  iR  v
2
1
2 b
v v
i 1 2
2R
1
R  R 
vo   4 1 2 (v  v )
R  R  1 2
3
1
NOTE
Combines 2 non-inverting amplifiers
with the difference amplifier to
provide higher gain and higher input
resistance.
Ideal input resistance is infinite
because input current to both op
amps is zero. The CMRR is
determined only by Op Amp 3.
Instrumentation Amplifier: Example
• Problem: Determine Vo
• Given Data: R1 = 15 kW, R2 = 150 kW, R3 = 15 kW,R4 = 30 kW V1 = 2.5 V,
V2 = 2.25 V
• Assumptions: Ideal op amp. Hence, v-= v+ and i-= i+= 0.
• Analysis: Using dc values,


R  R  30kW  150kW 
1
 22
A   4 1 2 

dm R  R  15kW  15kW 
3 
1 
Vo  A (V V )22(2.5 2.25)5.50V
dm 1 2

The Active Low-pass Filter
Use a phasor approach to gain analysis of
this inverting amplifier. Let s = jw.
v˜o ( jw) Z2( jw )
Z jw  R
Av 

1
1
v˜( jw)
Z ( jw )
1
1

R
R
2 jwC

2
Z ( jw)

2
1
jwCR 1
R 
2
2 jwC
R
R e j
1
Av  2
 2

R (1 jwCR ) R (1 jw )
1
2
1
wc
wc  2f c  1  f c  1
RC
2R C
2
2

fc is called the high frequency “cutoff” of
the low-pass filter.

Active Low-pass Filter (continued)









j









• At frequencies below fc (fH in the
figure), the amplifier is an
inverting amplifier with gain set
by the ratio of resistors R2 and
R1 .
• At frequencies above fc, the
amplifier response “rolls off” at
-20dB/decade.
• Notice that cutoff frequency and
gain can be independently set.








j








1(w /w )]
R
R
R
j[

tan
e
e
2
2
c
Av  2


e
1(w /w )
R (1 jw )

2

2
jtan
1
c
 w 
 w 
wc
phase
R 12    e
R 1   magnitude




1
1
w 
w 
 c 
 c 
Active Low-pass Filter: Example
• Problem: Design an active low-pass filter
• Given Data: Av= 40 dB, Rin= 5 kW, fH = 2 kHz
• Assumptions: Ideal op amp, specified gain represents the desired lowfrequency gain.
• Analysis: A 1040dB/ 20dB 100
v
Input resistance is controlled by R1 and voltage gain is set by R2 / R1.
The cutoff frequency is then set by C. R
R  R  5kW
Av  2  R 100R  500kW
and
1 in
2
1
R
1
1
1
C

159pF
2f R 2 (2kHz)(500kW)
H 2 
The closest standard capacitor value of 160 pF lowers cutoff frequency
to 1.99 kHz.

Low-pass Filter Example PSpice Simulation
Output Voltage Amplitude in dB
Output Voltage Amplitude in Volts (V) and Phase in Degrees (d)
Cascaded Amplifiers
• Connecting several amplifiers in cascade (output of one stage connected to
the input of the next) can meet design specifications not met by a single
amplifier.
• Each amplifer stage is built using an op amp with parameters A, Rid, Ro,
called open loop parameters, that describe the op amp with no external
elements.
• Av, Rin, Rout are closed loop parameters that can be used to describe each
closed-loop op amp stage with its feedback network, as well as the overall
composite (cascaded) amplifier.
Two-port Model for a 3-stage Cascade
Amplifier
• Each amplifier in the 3-stage cascaded amplifier is replaced by its 2-port




model.
R
R





inB


inC
A
vo  A vs
A 

 vC
vA R
 R  vBR
R

 outA
inB   outB inC 
vo
Av 
A A A
SinceRout= 0
vA vB vC
vs
Rin= RinA and Rout= RoutC = 0
A Problem: Voltage Follower Closed
Loop Gain Error due to A and CMRR
The ideal gain for the voltage
follower is unity. The gain error
here is:
A
1
CMRR
GE1 Av 


1


1 A1




2(CMRR)


v v
v  s o
ic
2
v  vs  vo
id
vs  vo 

vo  A vs  vo
2(CMRR)
















1
vo
2(CMRR)
Av  


vs
1


1 A1



2(CMRR)


A 1


Since, both A and CMRR are
normally >>1,
1
1
GE 
A CMRR
Since A ~ 106 and CMRR ~ 104 at
low to moderate frequency, the gain
error is quite small and is, in fact,
usually negligible.
Questions?????
24