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Boostable Repeater Design using Dickson charge pump
M.Yamini Saraswathi,
Department of ECE
Vasireddy Venkatadri Institute of Technology
Email:[email protected]
ABSTRACT:
Process variations and circuit aging
continue to be one of the main challenges to
the power-efficiency of VLSI circuits. The
boostable repeater design enables finegrained circuit adaptation and therefore,
power-efficient resilience to variations. The
main idea is a Boostable repeater design that
can transiently and autonomously raise its
internal voltage rail to boost switching speed.
In this paper a new technique is implemented
for increasing the boosting feature by
introducing the multistage charge pump and
Dickson charge pump. In this Boostable
repeater we compare both multistage charge
pump and dickson charge pump. The
Boostable repeater design with dickson
charge pump boosts voltage without delay
and it was validated by P-SPICE simulationbased experiments.
Sk.Riyazuddien, Assistant Professor
Department of ECE
Vasireddy Venkatadri Institute of Technology
Email:[email protected]
voltage regulators or an additional power grid.
Since interconnect is a widely recognized cause
of bottleneck in chip performance, and
tremendous repeaters are employed on chip
designs, boostable repeater has plenty of chances
to improve system robustness.
In the previous paper Boostable repeater
[4] is used, which can boost its switching speed
through transiently and autonomously [3]
enhancing its internal voltage rail. An overview
of our boostable repeater design is depicted in
Fig. 1. It is composed of three parts: a
conventional repeater, booster, and control
circuit. The core part is the booster, which is a
capacitive charge pump. When the repeater is in
steady state, the pump is charged. When the
repeater has a rising switching, the pump
discharges and provides a transient voltage that
is higher than VDD. The boosting features can be
turned ON and OFF at runtime, and therefore,
can adaptively compensate delay variations.
KEY WORDS: Boostable Repeater, Dickson
Charge pump, Multi stage charge pump,
Conventional Repeater.
I.INTRODUCTION
Length of interconnect and number of
repeaters are increasing with the advancement in
VLSI Technology [1]. Requirement of repeaters
is increasing as the length of interconnect is
increasing. The power delay product and
frequency of operation plays significant role in
designing of repeater. Boostable repeater design
toward supply voltage adaptation for variation
resilience in VLSI interconnects. The boosting
can be turned on/off to compensate variations.
The boostable repeater design achieves finegrained voltage adaptation without stand-alone
Fig. 1. Overview of boostable repeater. The control block
turns the booster block on and off through the enable
signal. When turned on, the booster block raises the rising
transition speed of the repeater block output. Connections
between devices are simplified through dotted lines.
In the conventional boostable repeater
the capacitor charge pump circuit is modified by
either multi stage charge pump or dickson
charge pump. This paper provides a novel
technique i.e. Dickson charge pump, which
increases the switching speed of the boostable
repeater.
Charge pump [5] circuits are mostly
used in the applications where voltages higher
than the nominal power supply voltages. High
voltages are necessary for the programming of
nonvolatile memories, for biasing the PMOS in
order to reduce the leakage currents and for
driving electrostatic actuators and the analogue
switches in switched-capacitor systems. Charge
pumps transfer charge packets [12] from the
power supply to the output terminal using only
capacitors and switches to generate the required
voltage level, thereby allowing integrated
implementations. The charge pump circuit
reported by Dickson has been widely used, for
generating high voltages. The specific circuit
makes use of capacitors interconnected with
diodes and coupled in parallel by two nonoverlapping clocks. The diodes of the Dickson
circuit can be replaced by NMOS transistors as
shown in Fig. 6, resulting in a more efficient
implementation.
II.CONVENTIONAL REPEATER
WITH INTERCONNECT
Fig. 2. Conventional repeater circuit with interconnect
III.BOOSTABLE REPEATER DESIGN
The Boostable repeater operates in 4 modes
1) Boosting On: If the boosting feature is
always on and cannot be turned off, i.e., it
is not programmable, the design is a
simplified version shown in Fig. 3(a). The
transistor P2 is the pass transistor that
delivers current from C pump to the output
node. Transistor P1, N1, and the inverter
between the output and node 3 coordinate
the operations. The operations mainly
include two phases: charging and boosting.
The below Figure 2 shows the
conventional repeater with interconnect and
output load capacitor. In the Conventional
repeater, the substrate bias voltage is zero for
both the NMOS and PMOS. The circuit shows
the grounded body bias repeater with
interconnect having capacitive load. In the
STGB bias repeater substrate bias voltage for the
NMOS is set to zero but for the PMOS it is not
at zero value, thus the threshold voltage of the
PMOS changes with applied voltage, while in
case of the conventional repeater threshold
voltage of PMOS and NMOS are not depending
upon the change of the applied input voltage.
Fig 3. Schematics of boostable repeater. (a) Simplified
schematic. (b) Complete schematic.
2) Charging phase: Charging to the capacitor
C pump takes place when both the input
and the output are stabilized to high, or
VDD. When the input and the output are
high, P1 is OFF, N1 is ON, and V3
(voltage at node 3) is low. Since N1 is ON,
V1 (voltage at node 1) is at VDD – Vtn, where
Vtn is the threshold voltage of N1. Then, the
pass transistor P2 is partially ON and VDD
at the output charges node 2 through P2. In
other words, C pump is charged.
3) Boosting Phase: The boosting occurs when
there is a rising switching at the input. Due
to the gate delays between the input and the
output, there is a short time period when
the output is still low even the input goes
high. During this period, N1 is turned ON
and pulls V1 towards low. The low voltage
at node 1 turns ON pass transistor P2 and C
pump starts to discharge and pull up the
output voltage, i.e., the boosting starts. At
the same time, the input rising is
propagated to the output and the output is
pulled up by VDD as well. Evidently, the
boosting accelerates the rising transition of
the output, and therefore, improves
switching speed. The main area overhead is
due to pass transistor P2 and capacitor C
pump. The C pump can be implemented
using trench capacitor [2], which is very
area efficient.
4) Boosting Off: When the “Enable” signal is
high, the circuit operates in the same way
as that in Fig. 3(a). When “Enable” is low,
the NAND2 gate outputs constant high. At
the same time, transistor N2 is off and P3 is
on. Therefore, pass transistor P2 is turned
off. The booster part is disconnected from
the output node.
charge pump circuit. The MOS’T in multi stage
charge pump function as diodes [10], so that the
charges can be pushed only in one direction.
However the nodes of the diode chain are
coupled to the inputs via capacitors in parallel,
instead of series so that the capacitors have to
withstand the full voltage developed along the
chain. Two pumping clocks are used [9]. The
two pumping clocks Clk1 and Clk2 are out of
phase and have a voltage amplitude V. The
value of Vφ is equal to VDD.
Fig. 4. Multi stage charge pump
Through the coupling capacitors C1-C4, two
clocks push the charge voltage upward through
the transistors. Cs is the parasitic capacitance
associated with each pumping node, f is the
frequency of the pumping clocks and I0 is the
output current loading.
V.DICKSON CHARGE PUMP
IV.MULTI STAGE CHARGE PUMP
In Boostable Repeater design replacing
the capacitor charge pump [6] with multi stage
charge pump shown in the figure4, the
performance is increases, boosting can be
achieved with faster compared to the capacitor
Fig. 5.Two complementary clock phases
The first widely used monolithic charge
pump is the Dickson charge pump [11]. This
circuit, shown in Fig. 6, uses diode connected
(N) MOS transistors and a chain of capacitors
(C) driven by two complementary phases _1 and
_2 to transfer charges from the power supply at a
voltage VDD to the load capacitor CL at a higher
voltage. The ratio between the output voltage
and the input voltage is the conversion ratio.
VI.EXPERIMENTAL DATA
By using Boostable Repeater with
capacitor charge pump design the boosting can
be achieved at 1.0 ms instead of boostable
Repeater with multistage charge pump the delay
is less compared to Capacitor charge pump and
boosting is achieved at 10.0ns. The Proposed
dickson charge pump with Boostable Repeater
has delay is very very less and is about 1.0ns,and
it can be observed in the Figures 7,8,9,10.so the
Performance is better in Dickson charge pump
compared to the Capacitor charge pump and
multistage charge pump. By using the
conventional repeater there is no boosting at all.
Fig. 6. The Dickson charge pump circuit with NMOS.
The Dickson charge pump [7], [8]
circuit shown in Figure 6 has been widely
deployed for generating higher voltages. This
circuit consists of capacitor stages connected by
NMOS transistors and coupled in parallel by two
non-overlapping clocks [9]. The diodeconnected NMOS transistors are used instead of
p-n junction diodes for implementing the circuit
in standard CMOS process. The diode connected
NMOS allow the charge flow only in the
direction of the output stage in ideal conditions.
The charges are pushed from one stage to the
next, resulting in higher DC voltage at the
output.
When Clk1 goes from low to high and
Clk2 goes from high to low, the voltage at node
1 is settled to V1+∆V and the voltage at node 2
is settled to V2 , where V1 and V2 are defined as
steady-state lower voltage at node 1 and node 2.
Both MD1 and MD2 are reverse biased and the
charges are being pushed from node 1 to node 2
through MD2. The final voltage difference
between node 1 and node 2 is the threshold
voltage MD2. The necessary condition for the
charge pump to function is that ∆V must be
larger than the MOST’s threshold voltage Vtn ,i.e
∆V>Vtn, The voltage pumping gain for the
second pumping stage GV2 is defined as the
voltage difference Between V1 and V2 .
Fig.7. The output waveform of Conventional Repeater
Circuit
Fig.8.The output waveform of Boostable Repeater Design
with capacitor charge pump
5
4
Dickson
Chargepump
3
2
MultiStage
Chargepump
1
0
Capacitor
chargepump
Fig. 9. The output waveform of Boostable repeater with
multi stage charge pump
Fig. 11.Comparision of different types of Boostable
Repeater circuits Performance and Power.
The curves are depicted in Fig. 12. One can see
that solutions of our approach are superior to
those from conventional Capacitor charge pump
in terms of the entire performance.
14
12
Dickson
chargepump
10
8
Multi stage
chargepump
6
Fig.10.The output waveform of Dickson Boostable
Repeater
4
2
Capacitor
chargepump
0
performance
VII.COMPARISON OF THE BOOSTABLE
REPEATER CIRCUITS WITH RESPECT
TO PERFORMANCE AND POWER
The bars of Fig. 11 show more clear
comparison in performances between three
systems. The leftmost bar is for the performance
in dickson charge pump system, the middle is
for multistage charge pump, and the rightmost
bar is for capacitor charge pump approach with
boostable repeaters. Our proposed dickson
charge pump system shows the best performance
among all the systems. And compare to power,
the capacitor charge pump and dickson charge
pump power consumption is almost equall but
the multistage charge pump consumes more
power.
Fig.12.Performance
Characteristics
of
Multicharge and Capacitor Charge Pumps
Dickson,
VIII.CONCLUSION
Two methods are proposed for
increasing the boosting feature without delay
they are multistage charge pump and Dickson
charge pump. By replacing the capacitor charge
pump in our boostable repeater design with these
charge pumps the speed of the operation is
achieved. Compared to multistage charge pump
the performance is better in Dickson charge
pump. Results show that the Dickson charge
pump (voltage doubler) is the best structure for
boosting. Therefore, these techniques to improve
performance and conversion efficiency of
boostable repeater are proposed.
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