Download TDA8921TH class-D audio amplifier 2 x 50W single chip

TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
mei 09, 2001
file: /user/nybuiten/n7260/specificatie/TDS8921N1F.fm
Tentative specification
TDA8921TH class-D audio amplifier 2 x 50W
single chip
1. General description
The TDA8921 is an high efficiency class-D audio power amplifier system. Typical output power is 2 x 50 W and it operates with high efficiency and very low dissipation. The devices comes in a HSOP24 power package with a small
internal heatsink. No external heatsink is required, or depending on supply voltage and load a very small one. The
system operates over a wide supply voltage range from +15 up to =+30 V and consumes a very low quiescent current.
2. Features
-
High efficiency (>90%)
Operating voltage from +15 V to + 30V
Very low quiescent current
Low distortion
Fixed gain of 30 dB in Single Ended and 36 dB in BTL
High output power
Good ripple rejection
Internal switching frequency can be overruled by an external clock
No switch-on or switch-off plop noise
Short-circuit proof across the load
Usable as a stereo Single-Ended (SE) amplifier or
as a mono amplifier in Bridge-Tied Load (BTL)
Electrostatic discharge protection (pin to pin)
Thermally protected
-
3. Applications
-
Television sets
Home-sound sets
Multimedia systems
All mains fed audio systems
Car audio (boosters)
4. Quick reference data
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
General, Vp = + 25V
Vp
Iq(tot)
η
operating supply voltage
total quiescent current
efficiency
Po = 30 W
+15
-
+25
55
90
+30
75
-
V
mA
%
37
50
30
68
200
50
65
0
31
400
150
W
W
dB
kΩ
µV
dB
dB
mV
Stereo single-ended configuration
Po
Po
Gv
Zi
Vn(o)
SVRR
αcs
|Vo
output power, RLOAD = 8 ohm
output power, RLOAD = 4 ohm
closed loop voltage gain
input impedance
noise output voltage
supply voltage ripple rejection
channel separation
DC output offset voltage
Tentative specification
THD = 10%, Vp= + 25 V 30
THD = 10%, Vp= + 21 V 40
29
45
40
-
1
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
SYMBOL
PARAMETER
Mono Bridge-Tied load configuration
Po
output power, RLOAD = 8 ohm
Gv
closed loop voltage gain
Zi
input impedance
Vn(o)
noise output voltage
SVRR
supply voltage ripple rejection
Vo
DC output offset voltage
CONDITIONS
MIN.
THD = 10%, Vp= + 21 V 80
35
23
-
TYP.
100
36
34
280
44
0
MAX.
37
-
UNIT
W
dB
kΩ
µV
dB
mV
200
5. Ordering information
TYPE
NUMBER
TDA8921TH
PACKAGE
NAME
HSOP24
Tentative specification
DESCRIPTION
heatsink small outline package; 24 leads
VERSION
SOT566BB1C
2
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
6. Block diagram digital power stage
VDDA1
VDDA2
VDDP1 VDDP2
10
3
14
23
15
BOOT1
16
OUT1
18
STABI
22
BOOT2
21
OUT2
TDA8921TH
IN1+
9
+
ANALOG
IN1-
SGND1
PROT
8
DIGITAL
-
11
13
PROTECTION
STABILIZER
VDD2
SGND2
IN2-
2
5
ANALOG
IN2+
MODE
4
DIGITAL
+
6
OSCILLATOR
MODE
12
1
VSSA1
VSSA2
7
24
17
19
20
OSC VSSD VSSP1 VSSP2
VSSA2
1
24 VSSD
SGND2.
2
23
VDDP2
VDDA2
3
22
BOOT2
IN2+
4
21
OUT2
IN2-
5
20
VSSP2
MODE
6
19
SUB
OSC
7
18
STABI
IN1-
8
17
VSSP1
IN1+
9
16 OUT1
VDDA1
10
15
BOOT1
SGND1.
11
14
VDDP1
VSSA1
12
13 PROT
SUB
Figure 1 Block diagram
TDA8921TH
Figure 2 Pin configuration
Tentative specification
3
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
7. Pinning
SYMBOL
VSSA2
SGND2
VDDA2
IN2+
IN2MODE
OSC
IN1IN1+
VDDA1
SGND1
VSSA1
PROT
VDDP1
BOOT1
OUT1
VSSP1
STABI
SUB
VSSP2
OUT2
BOOT2
VDDP2
VSSD
Tentative specification
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
DESCRIPTION
Negative analog supply channel 2
Signal ground channel 2
Positive analog supply channel 2
Positive audio input channel 2
Negative audio input channel 2
Mode select input (standby/mute/operating)
Oscillator frequency adjustment, or tracking input
Negative audio input channel 1
Positive audio input channel 1
Positive analog supply channel 1
Signal ground channel 1
Negative analog supply channel 1
Time constant capacitor for protection delay
Positive power supply channel 1
Bootstrap capacitor channel 1
PWM output channel 1
Negative power supply channel 1
Decoupling internal stabilizer for logic supply
Substrate, must be connected to negative supply
Negative power supply channel 2
PWM output channel 2
Bootstrap capacitor channel 2
Positive power supply channel 2
Negative digital supply
4
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
8. Functional description
The TDA8921TH is a two channel audio power amplifier system using the class-D technology. In the analog controller
part the analog audio input signal is converted into a digital PWM signal. For driving the low pass filter and the loudspeaker load a digital power stage is used. It performs a level shift from the low power digital PWM signal at logic
levels to a high power PWM signal switching between the main supply lines. A second order low pass filter converts
the PWM signal to an analog audio signal across the loudspeaker.
Digital power stage
It contains the high power D-MOS switches, the drivers, timing and handshaking between the power switches and
some control logic. For protection a temperature sensor and a maximum current detector is on the chip.
Analog low power controller
For the two audio channels it contains two pulse width modulators (PWM), two analog feedback loops and two
differential input stages. Furthermore it contains circuits common to both channels like the oscillator, all reference
sources, the mode functionality and a digital timing manager.
Using this chip an audio system with two independent amplifier channels with high output power, high efficiency
(90%), low distortion and a low quiescent current is obtained. The amplifiers channels can be connected in the
following configurations:
- Mono bridge-tied load (BTL) amplifier
- Stereo single-ended (SE) amplifiers.
The amplifier system can be switched in three operating modes with the MODE select pin:
- Standby mode, with a very low supply current.
- Mute mode, the amplifiers are operational, but the audio signal at the output is suppressed.
- Operating mode (amplifier fully operational) with output signal.
For suppressing pop noise the amplifier will remain automatically for approx. 220ms in the mute mode before
switching to operating. In this time the coupling capacitors at the input are fully charged. See fig. 5 for an example
of a switching circuit for driving the mode pin.
Pulse Width Modulation (PWM) frequency
+5V
The output signal of the amplifier is a PWM signal with a carrier frequency of
approx. 350 kHz. Using a second order LC demodulation filter in the application
results in an analog audio signal across the loudspeaker. This switching
frequency is fixed by an external resistor ROSC connected between pin OSC
and VSS. With the resistor value given in the schematic of the reference design,
the carrier frequency is typical 350 kHz. The carrier frequency can be calculated
using:
standby/
mute
fosc = 9 x
109
mute/on
R
MODE pin
R
SGND
/ Rosc [Hz]
If two or more class-D systems are used in the same audio application, it is
advised to have all devices working at the same switching frequency. This can Figure 3. Mode select circuit
be realized by connecting all OSC pins together and feed them from a external
central oscillator. Using an external oscillator it is necessary to force the OSC pin to a DC-level above SGND for
switching form internal to external oscillator. In this case the internal oscillator is disabled and the PWM will be
switching on the external frequency.The frequency range of the external oscillator must be in the range as specified
in the switching characteristics.
Application in a practical circuit:
Internal oscillator:
Rosc connected from OSC pin to VSS
external oscillator:
connect oscillator signal between OSC pin and SGND pin; delete Rosc
Tentative specification
5
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
Protections
Temperature-, supply voltage- and short circuit protections sensors are included on the chip. In case of exceeding the
maximum current or maximum temperature the system shuts down. The protection is activated in case of:
1. Over-temperature
If the junction temperature (Tj) exceeds 150°C, then the power stage shuts down immediately. The power stage starts
switching again if the temperature is dropped to approx. 130oC, so there is a hysteresis of approx. 20°C.
2. Short-circuit across the loudspeaker terminals:
When the loudspeaker terminals are short-circuited it will be detected by the current protection. If the output current
exceeds the maximum output current of 5 Amp, then the power stage shuts down within less than1µs and the high
current is switched off. In this state the dissipation is very low. Every 220ms the system tries to restart again. If there
is still a short across the loudspeaker load, the system is switched off again as soon as the maximum current is
exceeded.The average dissipation will be low because of this low duty cycle.
3. Start-up safety test
During the start-up sequence, when the mode pin is switched from standby to mute, the condition at the output terminals of the power stage are checked. In case of a short of one of the output terminals to VDD or VSS the start-up procedure is interrupted and the systems waits for un-shorted outputs. Because the test is done before enabling the
power stages, no large currents can be flowing in case of a short circuit. This system protects for shorts at both sides
of the output filter to both supply lines. When there is a short from the power PWM output of the power stage to one
of the supply lines - so before the demodulation filter - it will also be detected by the ‘start-up safety test. Practical use
from this test feature can be found in detection of shorts on the pcb.
Remark: this test is only operational prior or during the start-up sequence, so not during normal operation.
4. Supply voltage alarm
If the supply voltage goes below the value of + 12.5V the under voltage protection is activated and system shuts down
correctly and silently without plopnoises. When the supply voltage comes above the threshold the system is restarted
again after 220ms. If the supply voltage exceeds + 32V the overvoltage protection is activated and the power stages
shuts down. They are enabled again as soon as the supply voltage drops down the threshold.
Additional there is balance protection which compares the positive (Vdd) and the negative (Vss) supply voltages and
triggers if the voltage difference between them exceeds a certain level. This level is dependent on the sum of both
supply voltages. Example: the protection is triggered if Vdd = +25V and Vss = -30V.
Differential audio inputs
For a high common mode rejection and a maximum of flexibility of application, the audio inputs are fully differential.
By connecting the inputs anti-parallel the phase of one of the channels is inverted, so that a load can be connected
between the two output filters. In this case the system operates as a mono BTL amplifier and with the same loudspeaker impedance a four times higher output power can be obtained. For more information see the application information.
Also in the stereo single ended configuration it is recommended to connect the two differential inputs in anti-phase.
This has advantages for the current handling of the power supply at low signal frequencies.
IN1+
OUT1
IN1Vin
Sgnd
IN2+
IN1-
OUT2
power stage
Tentative specification
Figure 4 Mono BTL application
6
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
9. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
Vp
Vms
supply voltage
mode select switch voltage
Vsc
IORM
Tstg
Tamb
Tvj
short circuit voltage of output pins
repetitive peak current in output pin
storage temperature
operating ambient temperature
virtual junction temperature
CONDITIONS
with respect to
SGND
MIN.
MAX.
−
−
+30
5.5
V
V
−
−
−55
−40
−
+30
5
+150
+85
150
V
A
°C
°C
°C
10. Thermal characteristics
SYMBOL
PARAMETER
Rth(j-a)
thermal resistance from junction to ambient
Rth(j-c
thermal resistance from junction to case
*) Under investigation
Tentative specification
CONDITIONS
in free air
UNIT
VALUE
UNIT
40
2 *)
K/W
K/W
7
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
11. Static characteristics
Vp = +25 V; Tamb = 25 °C; measured in Fig. 8; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
Vp
Iq
Istb
supply voltage range
quiescent current
standby current
(1)
+15
-
+25
55
200
+30
75
500
V
mA
µA
(2)
0
0.8
3.0
-
1.6
1.0
600
3.8
3.2
600
5.5
1000
2.0
4.0
-
V
µA
V
V
mV
V
V
mV
no load connected
Mode select pin; see Fig. 5
Vms
input voltage range
Ims
input current
Vth1+
threshold voltage
Vth1−
threshold voltage
VmsH1
hysteresis (Vth1+) − (Vth1−)
Vth2+
threshold voltage
Vth2−
threshold voltage
VmsH2
hysteresis (Vth2+) − (Vth2−)
Audio input pins
VinDC
DC input level
Amplifier outputs
VOO
output offset voltage
∆VOO
delta output offset voltage
Stabilizer 12V
Vstabi
Stabilizer output voltage
Istabi max
Stabilizer max. output current
Vms = 5.5 V
standby → mute;
mute → standby;
(2)
(2)
mute → on;
on → mute;
(2)
(2)
on and mute
on ↔ mute
(2)
0
(2) (2) -
-
150
80
mV
mV
13
15
V
mA
mute and operating (3) 11
mute and operating
10
V
Notes
1. The circuit is DC adjusted at Vp = +15 to +30 V.
2. With respect to SGND (0 V).
3. With respect to VSS
pagewidth
on
mute
standby
VmsH1
Vth1−
Vth1+
VmsH2
Vth2−
Vms
Vth2+
MGR662
Fig. 5 Mode select pin
Tentative specification
8
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
12. Switching characteristics
Vp = +25 V; Tamb = 25 °C; measured in Fig. 8; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
Switching frequency
foscTYP
typical oscillator frequency
foscTYP
typical oscillator frequency
fosc
VOSC
oscillator frequency range
maximum voltage at OSC pin
ROSC = 30.0 kohm
ROSC = 27 kohm, see
reference design
Note 1
frequency tracking
VOSC_trip
Triplevel at OSC pin for tracking
frequency tracking
ftrack
frequency range for tracking
frequency tracking
VOSCEXT
Amplitude at OSC pin for tracking Note 2
PWM output
tr
rise time output voltage
tf
fall time output voltage
tblank
blanking time
minimal pulse width
note 3
tmin
Rds_on
RDS_ON output transistors
MIN.
TYP.
MAX.
329
UNIT
309
317
360
210
210
tbf
600
kHz
SGND+ V
12
SGND+ V
2.5
600
kHz
tbf
V
-
30
30
40
190
0.2
240
0.3
kHz
kHz
ns
ns
ns
ns
ohm
Note 1: frequency set with Rosc, according to formula in functional description
Note 2: for tracking the external oscillator has to switch around (SGND+2.5V) with a minimum
amplitude of VOSCEXT
Note 3: The effective minimal pulse width during clipping is tmin/2
For the practical useable minimal and maximal duty cycle which determines the maximum output power:
(tmin . fosc / 2) . 100% < duty cycle < (1 - (tmin . fosc) / 2 ) . 100%
Using the typical values:
3.5% < duty cycle < 96.5%
1/fOSC
Vdd
PWM out
time
0V
Vss
tr
Tentative specification
tf
tblank
Fig. 6 Timing diagram PWM output
9
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
13. Dynamic AC characteristics
Single ended application
Vp = +25 V; RL = 8 Ω; fi = 1 kHz; Tamb = 25 °C; measured in Fig. 9; unless otherwise specified.
SYMBOL
Po
PARAMETER
output power, RLOAD = 8 ohm
output power, RLOAD = 4 ohm
output power, RLOAD = 8 ohm
THD
total harmonic distortion
Gv
η
closed loop voltage gain
efficiency
SVRR
supply voltage ripple rejection
Zi
Vn(o)
input impedance
noise output voltage
αcs
∆Gv
Vo
CMRR
channel separation
channel unbalance
output signal in mute
common mode rejection ratio
CONDITIONS
Vp = +25 V; THD = 0.5%
Vp = +25 V; THD = 10%
Vp = +21 V; THD = 0.5%
Vp = +21 V; THD = 10%;
Vp = +30 V; THD = 0.5%;
Vp = +30 V; THD = 10%;
Po = 1 W; note 1
fi = 1 kHz
fi = 10 kHz
note 9
Vi(CM)(rms) = 1 V
TYP.
MAX.
UNIT
25 *)
30 *)
30 *)
40 *)
-
30
37
40
50
40
52
-
W
W
W
W
W
W
29
85
0.01
0.1
30
90
0.05
31
-
%
%
dB
%
40
45
note 5 note 6 -
55
50
55
80
68
220
230
220
70
75
-
dB
dB
dB
dB
kΩ
µV
µV
µV
dB
dB
µV
dB
Po = 30 W; fi = 1 kHz;
note 2
on;
fi = 100 Hz; note 3
on;
fi = 1 kHz; note 4
mute; fi = 100 Hz; note 3
standby; fi=100 Hz; note 3
on; Rs = 0 Ω;
on; Rs = 10 kΩ;
mute; note 7
note 8
MIN.
400
1
400
-
Note *) indirect measurement based on Rds_on measurement
Notes
1. Total Harmonic Distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a
lower order lowpass filter a significant higher value will be found, due to the switching frequency outside the audio
band.
2. Output power measured across the loudspeaker load.
3. Vripple = Vripple(max) = 2 V (p-p); fi = 100 Hz; Rs = 0 Ω.
4. Vripple = Vripple(max) = 2 V (p-p); fi = 1 kHz; Rs = 0 Ω.
5. B = 22 Hz to 22 kHz; Rs = 0 Ω.
6. B = 22 Hz to 22 kHz; Rs = 10 kΩ.
7. B = 22 Hz to 22 kHz; independent of Rs.
8. Po = tbf W; Rs = 0 Ω.
9. Vi = Vi(max) = 1 V (RMS).
Tentative specification
10
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
Mono BTL application
Vp = +21 V; fi = 1 kHz; Tamb = 25 °C; measured in Fig. tbf; unless otherwise specified.
SYMBOL
PARAMETER
Po
output power, RLOAD = 8 ohm
THD
total harmonic distortion
Gv
SVRR
closed loop voltage gain
supply voltage ripple rejection
Zi
Vn(o)
input impedance
noise output voltage
Vo
CMRR
output signal in mute
common mode rejection ratio
CONDITIONS
Vp = + 21V; THD = 0.5%
Vp = + 21V; THD = 10%
Po = 1 W; note 1
fi = 1 kHz
fi = 10 kHz
on;
fi = 100 Hz; note 3
on;
fi = 1 kHz; note 4
mute; fi = 100 Hz; note 3
standby; fi=100 Hz; note 3
on; Rs = 0 Ω; note 5
on; Rs = 10 kΩ; note 6
mute; note 7
note 8
Vi(CM)(rms) = 1 V
MIN.
70
80
35
36
22
-
*)
*)
TYP.
MAX.
UNIT
80
100
-
W
W
0.01
0.1
36
49
44
49
80
34
280
300
280
75
0.05
37
-
%
%
dB
dB
dB
dB
dB
kΩ
µV
µV
µV
µV
dB
500
500
-
Notes
1. Total Harmonic Distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a
low order lowpass filter a significant higher value will be found, due to the switching frequency outside the audio
band.
2. Output power measured across the loudspeaker load.
3. Vripple = Vripple(max) = 2 V (p-p); fi = 100 Hz; Rs = 0 Ω.
4. Vripple = Vripple(max) = 2 V (p-p); fi = 1 kHz; Rs = 0 Ω.
5. B = 22 Hz to 22 kHz; Rs = 0 Ω.
6. B = 22 Hz to 22 kHz; Rs = 10 kΩ.
7. B = 22 Hz to 22 kHz; independent of Rs.
8. Vi = Vi(max) = 1 V (RMS).
*) indirect measured, based on Rds_on measurement
Tentative specification
11
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
audio
switching
Vmode
operating
4V
When switching from standby to mute
there is a delay of 110ms before the
output starts switching.
Audio signal is available after the
mode pin has been set to operating,
but not earlier than 220ms after
switching to mute.
mute
2V
0V(SGND)
standby
110ms
time
> 110ms
audio
switching
Vmode
operating
4V
When switching from standby to operating
there is a first delay of 110ms before the
outputs starts switching.
After a second delay of 110ms the audio
signal is available
0V(SGND)
standby
110ms
Tentative specification
110ms
time
Figure 7. Mode pin timing
12
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
14. Test information
To be finished
VDDA1
VDDA2
VDDP1 VDDP2
10
3
14
23
15
BOOT1
16
OUT1
18
STABI
22
BOOT2
21
OUT2
TDA8921TH
IN1+
9
+
ANALOG
IN1-
SGND1
PROT
8
DIGITAL
-
11
13
PROTECTION
STABILIZER
VDD2
SGND2
IN2-
2
5
ANALOG
IN2+
MODE
4
DIGITAL
+
6
OSCILLATOR
MODE
12
1
VSSA1
VSSA2
7
24
17
20
19
OSC VSSD VSSP1 VSSP2
SUB
Figure 8. Test circuti
Tentative specification
13
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
15. Application information
Reference design
One chip class D application PCB
Version 1.1 3-2001
Power supply
GND
C40 1nF
+
C14
220nF
See
note
5
VDD
1
2
3
GND
-25V
C17
220nF
C15
220nF
VddA
L8
R9
10k
GND
R10
9k1
VSS
Qgnd
C18
220nF
Qgnd
Mode select
BEAD
L5
+25V
C13
220nF
C16
220nF
VddA
BEAD
C12
47µF/35V
+
C11
47µF/35V
VddP
Qgnd
BEAD
BEAD
L6
C41 1nF
VssA
L7
VssP
See note 4
R2 39k
R1
39k
VssP
VddP
VssA
Outputs
C20
560pF
S1
On
Mute
Off
DZ1
5V6
VddA
C21
560pF
Qgnd
Vmode
6
10 3
1
R12
5R6
12
R13
5R6
Sumida 33µH
CDRH127-330
C1
220nF
C36
1nF
Out21
2 1
2
21
R3 27k
GND
VssA
(pin 12)
C2
Clock
Out2
C22
15nF
U1
7
L2
R16
24
VddP
22
Boot2
220nF
C32
470nF
23
TDA8920TH
Sgnd1
GND
Sgnd2
C25
220nF
11
TDA8921TH
TDA8922TH
2
C23
220nF
+
+
C26
220nF
VssP
HSOP24
C33
470nF
15
See
note 6
VssP
C29
15nF
8
4
16
Qgnd
C38
1nF
R14
5R6
5
J5
24
19
18
13
C30
560pF
8 Ohm
BTL
Out12
1 2
1
L1
C4
330pF
J6
2
1
R17
24
Sumida 33µH
CDRH127-330
Out1
2
1
Out1+
C35
220nF
Boot1
C3
330pF
GND
C28
1500µF/35V
20
9
Out2 -
C27
1500µF/35V
C24
220nF
17
4 or 8 Ohm
SE
Qgnd
C34
220nF
VddP
14
Out2+
C37
1nF
R15
5R6
Out1+
C39
1nF
C31
560pF
Qgnd
4 or 8 Ohm
SE
12V
C5
470nF
C6
470nF
R5
10k
R6
10k
C7
470nF
C8
470nF
R7
10k
C19
220nF
VddP
VssP
Notes
R8
10k
1. SMD capacitors between Vdd, GND and/or Vss supply range
C9
1nF
of at least 63V
C10
1nF
VssA
2. C5, C6, C7 and C8 should be MKT, C9 and C10 are optional
3. C27 and C28 low ESR electrolytic capacitors
4. Mode circuit : R1 <= (Vdd,min - 5V6) / 100µA
5. R9 and R10 only necessary with an asymmetrical supply
In1
Qgnd
In2
See
note
8
J1
J3
J4
J2
Inputs
VSS
in a BTL application
Qgnd
6. BTL: Remove In1, R5, R6, C5, C6 and C3 in BTL and close J5 and J6
7. Demodulation coils L1 and L2 should be matched in BTL
8. Inputs floating or inputs referred to Qgnd (close J1 and J4) or referred
to VSS (close J2 and J3)
Fig.9 Application circuit for stereo single-ended application
Tentative specification
14
TDA8921TH
Philips Semiconductors
2 x 50 W class-D audio amplifier
BTL application
For using the system in mono BTL application (for more output power), the inputs of both channels must be connected
in parallel. The phase of one the inputs must be inverted. In principle the loudspeaker can be connected between the
outputs of the two single-ended demodulation filters.
MODE pin
For correct operation the switching voltage at the mode pin should be de-bounced. If the mode pin is driven by a mechanical switch an appropriate debouncing low pass filter should be used. If the mode pin is driven by an electronic
circuit or micro controller then it should remain for at least 100ms at the mute voltage level (Vth1+) before switching
back to the standby voltage level.
External clock
See Fig. 10 for a external clock oscillator circuit.
5k
Fig.10 External oscillator circuit
Output power
The output power in several applications can be estimated using:
for single ended:
Pout_1% =
RLOAD
(
RLOAD + RDS_ON + Rs
. Vp ( 1 - tmin . fosc) )2
2 . RLoad
the maximum current : Iout^ =
for BTL
:
Pout_1% =
Vp ( 1 - tmin . fosc)
should not exceed 5 Amp
RLOAD + RDS_ON + RS
(
RLOAD
RLOAD + 2 (RDS_ON + Rs)
. 2Vp ( 1 - tmin . fosc) )2
2 . RLoad
the maximum current : Iout^ =
2 Vp ( 1 - tmin . fosc)
should not exceed 5 Amp
RLOAD + 2 (RDS_ON + RS)
While:
RLOAD
=Load impedance
Rs
=Serie resistance of filter coil
Pout_1% =Output power just at clipping
Pout_10% = Output power at THD = 10%
Pout_10% =1.25 x Pout_1%
Tentative specification
15
Philips Semiconductors
TDA8921TH
2 x 50 W class-D audio amplifier
16. Package outline
Tentative specification
16