Download Reverse Biased Capacitance + + + + +

Reverse Biased Capacitance
• The charge at the p-n junction, qj, changes with applied voltage
• The depletion region is “sort of” like a parallel plate capacitor
dq j
C j = -------dV
anode
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Vo+V
_ +
_ +
_ +
_ +
_ +
+
-
-
-
-
-
-
-
cathode
-V
• Because the depletion region changes with applied voltage, (roughly
speaking) the distance between +q and -q changes, hence capacitance changes
• Does Cj increase or decrease with negative applied voltage?
Lecture 10-1
Reverse Biased Capacitance
• How can we tell from this voltage vs. charge plot that the capacitance is a
qj
nonlinear function of the applied voltage?
dq j
C j = -------dV
at some voltage bias point
V
• What does this capacitance represent?
Lecture 10-2
Depletion Capacitance
Often called Junction Capacitance
• Vo is the built-in voltage
K
C j = -----------------------------m
(V o – V D)
• Applied only for negative external voltage, VD.
• K is a constant that is a function of the Si
doping, etc.
• m is a constant that depends on how the
junction was formed (how the impurities were
added) --- varies between 1/3 and 1/2 for Si
diodes
Lecture 10-3
Positive Applied Voltage
• A positive external voltage will reduce the barrier and allow more carriers to
diffuse
• The depletion region width is also reduced
anode
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Vo-V
_ +
_ +
_ +
_ +
_ +
+
-
-
-
-
-
-
-
cathode
0 < V < Vo
I = ID - IS
• Now the diffusion current dominates the drift current
Lecture 10-4
Positive Applied Voltage
• With a lower potential barrier, more free carriers are able to diffuse
anode
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I
Vo-V
_ +
_ +
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+
-
-
-
-
-
-
-
cathode
0 < V < Vo
excess
carriers
npo pno
equilibrium
value
Lecture 10-5
+
Positive Applied Voltage - p n diode
• The lower doped region is sometimes called “the base”.
• For the asymmetrical doping of p and n regions the minority carrier
concentrations in both regions differ. The excess carrier concentrations will
differ as well.
•
∆pn >> ∆np
Why?
n
p+
∆pn
pno
∆np
npo
equilibrium
value
Lecture 10-6
Positive Applied Voltage
• At steady state for V>0, the excess carrier distributions correspond to
diffusion currents that comprise the external diode current, I
• Excess carriers decay exponentially with distance (due to recombination),
therefore the minority carrier distributions are exponential
• The minority carrier injection at the edge of the depletion region increases
exponentially with increasing voltage
minority hole concentration
• The total excess charge, Qp,
is directly proportional to ev
because it varies
exponentially with distance
∆p n ( 0 ) ∝ e
v
Ip
pno
equilibrium
value
Lecture 10-7
Forward Bias - “Recombination Current”
• Diffusion current within the neutral region is bigger closer to the depletion layer
where the gradient is bigger. What about current continuity?
• The charge transport through the forward biased diode can be attributed to acts of
recombination!
• Minority holes injected into the n region attract electrons from the contact. The
electron-hole pairs diffuse according to the hole gradient until the pair recombines.
In equilibrium, each time such a recombination occurs, a new hole is injected. Thus,
the each act of recombination corresponds to an act of transport of an elementary
charge. Similar thing happens at the p side of the junction... (at low current levels,
recombination in the depletion region is also an important mechanism contributing to the overall current).
“recombination”
electron
current
J
current
density
depletion
region
J
Total current
density
hole current
metal
contact
+
+
+
+
+
+
X
xn
X
xn
Lecture 10-8
Reverse Bias - “Generation Current”
• Diffusion current within the neutral region is bigger closer to the depletion
layer where the gradient is bigger.
• In equilibrium, each time generation occurs, a new electron-hole pair starts
diffusing towards the depletion region. At xn, the pair is separated: hole is
swept through the depletion layer and electron goes to contact of n region.
Thus, each act of generation corresponds to an act of transport of an
elementary charge. Similar thing happens at the p side of the junction...
(generation in the depletion region is also an important mechanism contributing to the overall current in Si diodes,
especially for large reverse bias voltage, when the depletion layer is wide).
• The charge transport through the reverse biased diode can be attributed to acts
of generation! The explanation based on the drift current (given earlier) is still
valid: generated holes and electrons drift through the depletion layer.
J
minority hole concentration
Here: ∆pn < 0
Ip
∆p n ( 0 ) ∝ e
v
pno
equilibrium
value
xn
+
+
+
+
+
+
X
xn
Lecture 10-9
Positive Applied Voltage
• The minority carrier charges have an average lifetime of τ , before they
recombine
• What is the rate at which charge must be flowing in from the external circuit
to replenish the lost charge?
∆p ( 0 ) ∝ e
v
pno
• What does this charge flow represent?
Qp
Ip
equilibrium
value
Lecture 10-10
Diffusion Capacitance
• The change in this charge with change in voltage represents the diffusion
capacitance
• By definition
dQ
C = ------dV
∆p n ( 0 ) ∝ e
v + dv
∆p n ( 0 ) ∝ e
v
pno
equilibrium
value
• Since Q is directly proportional to IA, the current at operating point A, then
dI A
C ∝ --------dV
• And since I is an exponential function of voltage
C ∝ IA
• Diffusion Capacitance (nonlinear function of voltage):
Cd = kcI
A
Lecture 10-11
Positive Applied Voltage
• From
I∝e
v
• One can derive the complete expression for the steady state diode current:
v ⁄ nV
T
– 1
i = I Se


• IS is saturation current (component due to drift) which depends on area of the
junction and temperature --- why?
• IS is on the order of 10-15Amps for ICs, but doubles with every 5º C increase
in temperature
• n varies between 1 and 2, and depends on how the junction is formed
• VT is the thermal voltage, KT/q
q ≡ 1.602 × 10
– 19
C
K ≡ 1.38 × 10
– 23 j
------°K
• At room temperature, 20ºC, VT = 25.2mV
Lecture 10-12
Positive Applied Voltage
• Does the equation agree with the physical explanation when v=0 and v<<0?
i = I Se

v ⁄ nV T
– 1

• What’s the expression look like for v >> VT?
Lecture 10-13
Positive Applied Voltage
• Since the current varies exponentially with voltage, the look of the curve as
compared to an ideal curve depends very much on the range over which the
plot is made
• One might say that the turn-on voltage is 0.7 volts in this plot, but this really
depends on how you view the current scale
• Note that Vo is NOT the turn-on voltage
Vo=Vj=1.0v
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
30
mA
ID1
>>>>>> MA
20
+
VD
5V
D0
Custom
10
0
ID
Lecture 10-14
Positive Applied Voltage
• On a semi-log scale, it is easy to see that an order of magnitude change in
current corresponds to ~60mV (n=1) change in voltage at room temperature
I 1 = I Se
I 2 = I Se
V 1 ⁄ nV T
 I 2
 I 2
V 2 – V 1 = nV T ln  ----- = 2.3nV T log  -----
 I 1
 I 1
V 2 ⁄ nV T
1e-4
I [A]
1e-5
1e-6
1e-7
500
LOG(I)
520
540
560
580
600 V [mV]
Lecture 10-15
Variation with Temperature
• The diode characteristic varies with temperature since IS and VT vary with T
• The change in voltage is approximately 2mV for every 1º C increase
I [A]
1e-4
30º C
25º C
20º C
1e-5
1e-6
1e-7
500
LOG(ID2)
520
540
LOG(ID1)
560
580
600 V [mV]
LOG(ID3)
Lecture 10-16
Variation with Temperature
• The change in voltage is approximately 2mV for every 1º C increase
Linear Scale for ID
– 2mV ⁄ °C
700
710
720 mV
2
mA
30º C
25º C
1
20º C
0
ID1
ID2
ID3
Lecture 10-17
Complete Characteristic
• The reverse current is approximately, IS, but it can be much larger than this
value as V becomes more negative
-5
-4
-3
-2
-1
0
1
0.2
A
0.1
0.0
-0.1
ID1
Lecture 10-18
Reverse Characteristic
• A plot of the reverse characteristic only shows the increase in saturation
current with reverse bias
-5
-4
-3
-2
-1
0
0
pA
-1
-2
-3
-4
-5
-6
ID1
• The SPICE model we use is linear for this portion of characteristics.
Lecture 10-19
Breakdown Characteristic
• A plot of the reverse characteristic including breakdown
-7
-6
-5
-4
-3
-2
-1
0
0.0
PA
-0.1
-0.2
ID1
Lecture 10-20
Diode Circuits
• Solving for the loop current requires solving a nonlinear equation in the
circuit below
• Superimpose Thevenin characteristic on diode i-v curve
id
R
Vs
-------
R
VS
Vs
vd
Lecture 10-21
Diode Circuits in SPICE
• SPICE solves these circuit problems via Newton-Raphson iteration
id
Vs
-------
R
Vs
vd
initial guess for diode voltage
Lecture 10-22
Simplified Diode Models
• For hand calculations we generally use a simplified diode model
• A two-piece piecewise-linear model is the most obvious choice
R
id
VS
V D0
vd
• What are the equations for this straight-line characteristic?
Lecture 10-23
Simplified Diode Models
• What does the diode equivalent circuit model look like?
id
slope = 1/rD
V D0
vd
Lecture 10-24
Even Simpler Model
• To further simplify a hand analysis, we generally rely on the following model:
id
VD0
V D0
vd
ON
OFF
• The value of VD0, the “on”-voltage, is based on the current level for which
one would consider the diode to be “on” ---- typically ~ 0.7 volts
Lecture 10-25
Example
• Solve for the current, I, and the voltage, V, in the circuit below:
VCC
R
I
+
V
_
Lecture 10-26
Small Signal Diode Model
• For analog design we’re often interested in the small signal response
• Especially for transistor circuits, we will bias a nonlinear circuit to a dc
operating point, then model it as linear for the small ac analog signals
• Model the diode as a single piecewise linear segment that passes through the
bias point
R
vs(t)
VS
id
+
vd(t)
_
ID
VD
vd
Lecture 10-27
Small Signal Diode Model
• With a piecewise linear tangential approximation passing through the bias
point, the model represents the exact dc solution
• If the ac signal is small, we can assume that the diode variation in current due
to a small variation in voltage follows the piecewise linear approximation
id
slope=1/rd
ID
VD
vd
Lecture 10-28
Small Signal Diode Model
• This approximation, if valid, allows us to analyze the ac and dc responses
separately
R
vs(t)
VS
+
vd(t)
_
Lecture 10-29
Small Signal Diode Model
R
vs(t)
VS
+
vd(t)
_
Lecture 10-30