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Optimization of a RF CMOS technology for High-Q-Inductors
Gerhard Metzger-Brückl1, Dr. Volker Mühlhaus2, Christophe Holuigue3
1. Landshut Silicon Foundry GmbH, Jenaer Str. 1, 84034 Landshut, Germany
2. Dr. Mühlhaus Consulting and Software GmbH, Drosselweg 11, 58455 Witten, Germany
3. Analog Alchemy GmbH, Agnes-Pockels-Bogen 1, 80992 München, Germany
1. Introduction
LFoundry is developing an on-chip spiral inductor technology based on their advanced
150nm RF CMOS process. An electromagnetic (EM) analysis based inductor design flow
is applied to optimize the performance of the inductors towards high quality factor at radio
frequencies, by providing a large conductor cross section while at the same time minimizing
the substrate induced losses. The effect of these technology parameters on the inductor Q
factor in the frequency range 2.4 and 5.8GHz is discussed in detail and compared to results
obtained with standard technologies. To verify the analysis, simulation results are compared
to measurements.
Leading analog
device performance
•low leakage transistor
• high speed transistor
• high current resistors
• low power applications
User-friendly PDK
• GPIO library
• 370 digital std. cells
LFoundry
0,15µm
Analog / MS
Technology
2. LFoundry LF150 CMOS process as basis for High-Q-Inductors
Variety of de vice options
• high voltage (LDMOS)
• MIM, MOS Cap
• extra thick top metal
The user-friendly process design kit PDK has as base technology a 19 mask standard
CMOS process with 150nm physical gate length and the shallow trench isolation concept.
The transistor variety is set for three I/O voltages (1.8/3.3/5V) and for a low leakage and also
a high speed option.
The High-Q-Inductors are a further step in broadening the PDK options fitting well to the
already available extra thick top metal (up to 6µm thickness) and the poly- metal- and
diffusion resistors, MIM and MOS-Cap capacitors, special RF performance devices, etc.
Constantly increasing IP
Portfolio
• NVM
• µControler
•ADC, LDO, ...
LFoundry’s analog / mixed signal technology based on a 0,15µm CMOS process ‘LF150’
3. Simulation flow for inductor EM analysis
Sonnet is a high precision full wave EM simulator for planar structures, which can capture all
physical effects in our simulation models. Sonnet can be used stand-alone or integrated into
major EDA frameworks.
Sonnet
Cadence Integration
Cadence Database IC 5.141 or IC 6.1
Sonnet Interface for Cadence Virtuoso
Sonnet EM View
matl technology file *
• At low frequency, the Q factor is limited by the conductor loss.
• The 6µm Al thick metal option for conductor improves the Q factor in the low GHz
frequency range, where the skin depth is large and current is taking advantage of
the additional metal cross section.
• Due to skin effect and current crowding, there is a limit where increasing the
conductor cross section further gives no improvement in Q factor.
* Pre-configured by
LFoundry
Sonnet model file
Sonnet model editor
Sonnet EM solver
Result as S/Y/Z param, SPICE model, RLCG model,
lumped element extraction
Current distribution plot for 2.5GHz and 5.8GHz
Frequency
Skin depth /µm for Al
1GHz
2.8µm
2.5GHz
1.7µm
5 GHz
1.2µm
10GHz
0.9µm
2.5 GHz
Symbol utility
Cadence Schematic, Spectre, SPICE
5. Improving the inductor Q-factor
Sonnet Data Display
When an inductor layout does not yet exist, the Spiral Inductor Assistant tool can be used to
estimate the required inductor shape, and create a Sonnet simulation model for accurate
analysis.
Inductor on demand workflow with Sonnet
* pre-defined by
Material template file *
LFoundry
5.8 GHz
• At high frequency, the Q factor is limited by coupling to the substrate.
• If we increase the metal cross section, by wider lines or multiple metal layers
in parallel, we increase the capacitance to the substrate and thus the
substrate losses -> frequency of maximum Q decreases
• The LF150 technology with the 6 layer option offers a large distance from
the thick metal to the substrate, reducing the substrate induced loss.
6. Substrate Back Etching
• With the standard technology, increasing the metal cross section by wider lines
or by adding lower metal layers in parallel means increased capacitance to
the substrate, so that the frequency of maximum Q decreases.
• With the substrate back etch option, the substrate is removed below the
inductor and replaced by PIQ dielectric. This reduces the substrate induced losses.
Spiral Inductor Assistant
10S/m metal to represent the
substrate around the back etching region
Sonnet *.son model file
layout
GDSII
Sonnet model editor
Optimization
Sonnet EM solver
Result as S/Y/Z param, SPICE model, RLCG model,
lumped element extraction
1.0 nH
Symbol utility
Virtuoso
Cadence Schematic, Spectre
Sonnet Data Display
4. Simulation and measured comparison
• Now, we can make the lines wider or add lower metal levels in parallel.
This is only limited by the skin effect and proximity effect, where bigger metal
cross sections give no further improvement.
2.0 nH
Results are for inductor with pads, not de-embedded
• The influence of the back etch area is plotted below. Etching the substrate below
the inductor gives a strong effect in Q factor. Some improvement at very high
frequency is possible by a larger back etch area.
450µm
Inductor diameter 390µm
Substrate back etching size 450µm … 750µm
750µm
Copyright 2009 - Landshut Silicon Foundry GmbH