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Silicon Photonic IC Development at CTI/Brazil Roberto R. Panepucci, Celio A. Finardi, Leandro T. Zanvettor, Daniel S. Spozito*, Antonio C. Gozzi CTI - Centro de Tecnologia da Informação Renato Archer, Rod. Dom Pedro I (SP-65) Km 143,6 –13069-901 - Campinas-SP, Brazil *Instituto Federal de Educação, Ciência e Tecnologia de São Paulo - Campus Salto, Rua Rio Branco, 1780 - 13320-271 – Salto-SP, Brazil ABSTRACT Silicon photonics is a key technology in data communications, a key component of display subsystems. We present the current status of the photonic integrated circuit design initiative at CTI, sponsored by the IC-Brazil program. We use a multi project wafer approach with open-source software for layout and fabless approach for the fabrication of highly complex silicon photonic devices. The institutional platform implemented to support photonic IC design is described and initial results for the design and fabricated wafer are presented. While access to foundry services is available directly, this platform will be made available to academic users to leverage costs and overhead locally, starting in 2013. INTRODUCTION Data communication plays a key role in information technology today. This increased demand for data throughput is occurring at datacenters on the one hand, and at the data hungry high-definition media applications at the consumer side. Regarding display applications, it is believed that the resolution will quadruple by 2015 (ultra high-definition), requiring very fast data interconnections (in excess of 20 Gb/s) [1]. Since light beams have practically unlimited information capacity, these new solutions will be able to handle higher bit rates (tens to hundreds Gb/s moving to Tb/s) over distances up to 100 m. Current tecnologies such as HDMI (version 1.3 – 10Gb/s), USB (version 3.0 – 5 Gb/s), DisplayPort (version 1.2 – 17 Gb/s) and many others, should be replaced by optical solutions. Silicon photonics is believed to be the next step in enabling 50 Gb/s and beyond in display technologies [1]. In addition, silicon photonics is driving new external interconnection solutions based on optical components with optical cables. It is possible that in a few years they will be used in personal computers, tablets, smartphones, televisions and other electronics [1]. The Brazilian government has recognized the importance of the integrated circuit (IC) design in the product development cycle and several tax incentives have been put in place to foster such developments locally. The need for data communications of IT industry, display industry included, had not been met by previous initiatives until recently. Several projects were implemented within the National Microelectronics Program (Programa Nacional de Microeletrônica), and among them, the IC-Brazil (Circuito Integrado Brasil - CI-Brasil) program aims to foster the consolidation of fabless design-houses in the country. In late 2011, the IC-Brazil program admitted activities in photonic IC-Design on CMOScompatible platforms as part of its program, and CTI (Information Technology Center from brazilian Ministry of Science and Technology and Innovation) initiated activities in this area, focusing on IC designs for photonic devices and systems compatible with foundry processes. This approach seeks to enhance technological competence in the field and establish a new level of photonic integration with microelectronics. This technological convergence occurs not only in terms of CMOS technology, but also the development methodology, through sharing of design environment (Cadence and Mentor suites), and in the form and procedures of the complete design cycle. This paper describes the activities and mode of operation of the photonic integrated circuit group at CTI, the proposed multi-wafer-project methodology, and the main activities currently underway. SILICON PHOTONICS– CTI CTI´s photonic integrated circuit initiative was incorporated into CTI´s activities having as main objectives the training of designers, mastering of the technology in the country and promoting the inclusion of the same locally, through projects with the productive sector. Another important role is to facilitate the implementation of photonic competencies in all areas of expertise at CTI in which research, development and technological services are routinely provided, namely: microelectronic IC design; post-processing of semiconductor devices at the micro- and nano- scales; IC packaging; and IC testing. To achieve this goal, CTI is establishing a development platform for photonic integrated circuits in silicon, including a framework to provide shared access to the infrastructure, and to the technology in a fabless approach. The development platform includes CAD tools, simulation tools, design-kits from foundries with which NDAs are signed, and, facilities for postprocessing of IC´s, as well as wafer level characterization. Klayout [3] was used as a layout verification tool. It is a GDSII editor and viewer. In the design rule checking (DRC) phase of the project, Mentor Graphics Inc.´s DRC tool Calibre was used. The modeling of devices requires waveguide parameter extraction which were carried out using MIT´s software MPB [4], and also with Lumerical Inc.´s Mode tool. POST-PROCESSING CTI has a Microsystems laboratory with a cleanroom capable of physical-chemical processing and several standard microfabrication techniques suitable for post-processing of wafers after foundry fabrication. This enables us to carry out metal and dielectric deposition, lithography, lift-off processing, wet and dry etching, polishing and saw dicing. In Fig 3 we show an optical micrograph of postprocessed microheater devices added to a 2nd order microring resonator filter [5], achieved through photolithography and lift-off of NiCr on a silicon photonic IC carried out at CTI. Fig. 1 – CTI´s platform workflow Our goal is to provide access to the academic community, technical-scientific institutions, and businesses in the country. CTI supports all aspects necessary for implementation of the projects, performing the consolidation of final layout for manufacturing at the foundry (Figure 1). PHOTONIC INTEGRATED CIRCUIT DESIGN Currently, layout of photonic integrated circuits is carried out using the IPKISS open source software platform [2], developed by Gent University, which is based on Python scripting and provides a parametric design environment. Fig. 2 – Layout implemented Figure 2 shows the layout of the design that includes 2-port, 3-port, 4-port and other custom cells that were implemented in this run. Fig. 3 – Optical micrograph of post-processed microheater It is important to highlight the role of microelectronics facilities in partner institutions such as CCS-Unicamp (Centro de Componentes Semicondutores), Lamult-Unicamp (Laboratório Multiusuário), and LMF-LNLS(Laboratorio Micro Fabricação), with which CTI cooperates enabling programs such as these. TESTING AND PACKAGING OF PHOTONIC ICS CTI is working to develop adequate photonic IC testing and packaging solutions, with the goal of enabling research groups, not equipped with such sophisticated micromanipulation systems, to achieve the characterization of their designs. An environment for users to be able to quickly assess the functionality and performance of their devices, and a minimum capability for pigtailing fibers is being prepared. IC DESIGNED RUN MPW² The first foundry run was produced through Europractice [6] and used ePIXfab´s design kit and process flow for IMEC´s passive SiPhot run. In this multiproject wafer run, our submitted design included devices and structures from four institutions that collaborate in the framework of the National Institute of Science and Technology (Instituto Nacional de Ciencia e Tecnologia – INCT) Fotonicom. Subprojects from CTI, Unicamp, IEAv and Mackenzie University were included, that take advantage of silicon photonics for a variety of applications in telecom, datacom and fundamental physics studies. We call this approach MPW², (similar approach used by other R&D institutions abroad) which should allow a quick dissemination with low cost, of photonic IC design methodologies, foundry capabilities, larger statistics in device characterization, and faster path to products. A high level view of the layout is shown in Fig 2 above. Figures. 4a and 4b, show a section of the layout, and an optical micrograph of same section as (a), of the final fabricated die. Additional nonfunctional structures are inserted by the foundry for processing reasons. as DWDM and G-PON, and are currently being characterized. Work is ongoing in the design of photonic circuits to be manufactured using the OPSIS-IME process [7]. This process enables the simultaneous production of photodetectors and optical modulators with performance compatible with single wavelength modulation at 20Gb/s. The platform allows the integration of tens of wavelength channels. As such, we believe this platform can lead to data communication for display solutions in the foreseeable future. Integrating light sources is still seen as a challenge for widespread applications. Figure 5a shows the layout of a directional coupler and figure 5b its expected curves. Fig. 5a – Directional coupler (DC) layout Fig. 5b – DC- Simulated results Fig. 4a – Layout implemented Figure 6 shows the full 8” wafer received with nominally 20 dies which are approximately 25x25 mm2 in size. Fig. 4b – Optical micrograph of same section of layout above, containing a variety of optical devices and grating couplers for wafer-level testing In our design, a series of structures such as filters, couplers and other devices suited were implemented. These devices target sub-system design in optical communication applications, such Fig. 6 – CTI´s photonics design in 8” SOI wafer CONCLUSION We presented our ongoing work on silicon photonics technology for data communication applications. A multi wafer project platform is used to enable advanced research in photonic integrated circuit design. The near term display communication challenges can be met ideally by available silicon photonics technologies. We are currently investigating solutions for integrated circuits with low cost using CMOS compatible photonics with the semiconductor processing carried out through external foundries. ACKNOWLEGDMENTS The authors would like to thank the technical staff of CTI, Fotonicom INCT for contributions during this development, and the Brazilian Research National Council (CNPq) for the financial support. REFERENCES [1] A. Shah, “Intel Eyes Post-Thunderbolt Interconnect for 2015” – PC World, April 27 (2011) [2] www.ipkiss.org/, Tutorial Design and Simulation of Photonic Components , Circuits and Masks with IPKISS/PICAZZO version 2.1 – Gent University/IMEC, INTEC Photonics Research Group, (2011) [3] http:// www.klayout.de/ [4]http://ab_initio.mit.edu/wiki/index.php/MIT_Photo nic_Bands [5] W.S. Fegadolli, G. R. Vargas, X. Wang, F. Valini, L.A.M. Barea, J.E.B. Oliveira, N. Frateschi, A. Scherer, V.R. Almeida, R.R. Panepucci, “Reconfigurable silicon thermo-optical ring resonator switch based on Vernier effect control”Optics Express, 20, 14722 (2012) [6] http://www.europractice_ic.com/SiPhotonics_ge neral.php [7] http://opsisfoundry.org/