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PRESSE RELEASE
Brussels, 25 January 2017
New power devices for electric vehicles
Radical innovations in material growth of 3C-SiC to address new applications
The CHALLENGE project officially started in Brussels with its Kick-off meeting, proposing a
new strategic approach to nanotechnology innovation applied to power devices.
CHALLENGE is a research and innovation action funded by the European Union’s Horizon
2020 research and innovation programme, with the objective of developing an advanced,
cost-effective, sustainable material speeding up the operation of power- electronic devices
based on the improved properties of the new material and its component.
The activities will focus on cubic silicon carbide (3C-SiC) growth, processing and device
optimisation. This technology can have a large impact in the future power device market,
which is segmented by voltage rating.
In particular CHALLENGE is looking at improving power efficiency in the consumer market
between 600V and 1200V. This market is growing rapidly and according to the main
market agency previsions, it will go from 100 million dollars in 2020 to 300 million
dollars in 2023. Manufactures are still looking for the best technological solution that will
enable better performances, efficiency and consistent low costs of power devices. The low
cost of the 3C-SiC approach and the high scalability of this material makes this technology
extremely competitive in the motor drives of Electric-Hybrid Vehicles. This research activity
is strategic, as it has applications in several fields: from telecommunication to automotive,
from consumer electronics to electrical household appliances, from industrial applications to
home automation.
CHALLENGE is willing to overcome the technological barrier and facilitate the use of a cost
effective, low environmental impact new material in the semiconductor’s family. 14 partners
from 7 countries with expertise across the whole supply chain (equipment, materials,
characterizations, processing, power devices, simulations), are engaged for the next 4 years
to maintain excellence and competitiveness in Europe and further develop the
semiconductor’s sector.
This project has received funding from the European Union’s Horizon 2020 research
and innovation programme under Grant Agreement No 720827.
CHALLENGE partners
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Consiglio Nazionale delle Ricerche (ITA)
University of Erlangen
(D)
LPE SPA
(ITA)
NOVASiC SA
(FRA)
Anvil Semiconductors Ltd
(UK)
ASCATRON AB
(SWE)
University of Milano-Bicocca (ITA)
Silvaco Europe Ltd
(UK)
MOVERIM Consulting sprl (BE)
Ion Beam Services
(FRA)
University of Linkoping
(SWE)
University of Warwick
(UK)
STMicroelectronics
(ITA)
CUSIC
(JAP)
Project title:
3C-SiCHetero-epitaxiALLy grown on silicon compliancE substrates and new 3C-SiC
substrates for sustaiNable wide-band-Gap powEr devices (CHALLENGE)
Duration: 48 months
Total H2020 grant: 7,997,822 €
For further information please contact:
Coordinator CNR-IMM: Francesco La Via
Strada VIII 5, 95121 Catania, Italy
e-mail: [email protected]
tel: +39 0955968229
This project has received funding from the European Union’s Horizon 2020 research
and innovation programme under Grant Agreement No 720827.
Background information:
CHALLENGE project focuses on cubic silicon carbide (3C-SiC) growth, processing and devices
has started at the beginning of 2017. This technology can have a large impact in the future
power device market, which is segmented by voltage rating such that different materials can find
their applications according to their technical capability and cost. In the low voltage (~100V)
section silicon (Si) dominates thanks to the technology that has been developed over the last 50
years. In the high voltage (>1200V) section of the market, hexagonal silicon carbide (4H-SiC)
will probably be the best semiconductor material thanks to its properties and the possibility to
grow large wafers (up to 6 inches). The high voltage segment is not overly cost sensitive and so
the high cost of the 4H-SiC substrate is not critical.
The technology choices for improving power efficiency in the consumer market between 200V
and 1200V are still being debated. One key characteristic of this market is that it is very price
sensitive, consequently 4H-SiC technology is unlikely to fit here. These huge markets are likely to
be divided between two emerging technologies. We can suggest that between 200V and 500V
GaN/Si is best suited to the market needs, while between 600V and 1200V the 3C-SiC/Si
technology is optimum. This market is growing rapidly and according to the HIS market agency
previsions it will go from 100 million dollars in 2020 to 300 million dollars in 2023.
The potential electrical activity of extended defects in 3C-SiC is a concern for electronic device
functionality. To achieve viable commercial yields the mechanisms of defects must be
understood and methods for their reduction developed. CHALLENGE is willing to solve this
problem and facilitate the use of a cost effective, low environmental impact new material in the
semiconductor’s family.
This project proposes a toolbox of solutions for the reduction of defects in bulk 3C-SiC material
based around new compliance substrates. Different substrate structures will be developed and
tested. The structure of the substrates is intended to force the bulk growth along selected
pathways, thus helping to reduce the inherent hetero-epitaxy stress and the defect density,
usually observed with such kind of materials. This, in turn, will allow for more efficient energy
transfer and decreased energy loss upon use. Numerical simulations of the bulk growth and
simulations of the stress reduction will be implemented constantly during the research process.
Several high voltage devices operating at high power and with low power consumption will be
realized inside the project.
The low cost of the 3C-SiC hetero-epitaxial approach, and the high scalability of this process to
300 mm wafers and beyond, makes this technology extremely competitive in the motor drives of
Electric Vehicle/Hybrid Electric Vehicle (EV/HEV), air conditioning systems, refrigerators, etc..
Furthermore, the opportunity of using a p+ Si substrate can be used to realize an Insulated Gate
Bipolar Transistor (IGBT), the most advanced power transistor, allowing further reduction in
device power dissipation to be realised.
This project has received funding from the European Union’s Horizon 2020 research
and innovation programme under Grant Agreement No 720827.