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energies
Article
A Multistage DC-DC Step-Up Self-Balanced and
Magnetic Component-Free Converter for Photovoltaic
Applications: Hardware Implementation
Mahajan Sagar Bhaskar 1 , Sanjeevikumar Padmanaban 1, * and Frede Blaabjerg 2
1
2
*
Department of Electrical and Electronics Engineering, University of Johannesburg, PO Box 524,
Auckland Park, Johannesburg 2006, South Africa; [email protected]
Centre for Reliable Power Electronics (CORPE), Department of Energy Technology, Aalborg University,
9000 Aalborg, Denmark; [email protected]
Correspondence: [email protected]; Tel.: +27-79-219-9845
Academic Editor: Tapas Mallick
Received: 24 December 2016; Accepted: 15 May 2017; Published: 18 May 2017
Abstract: This article presents a self-balanced multistage DC-DC step-up converter for photovoltaic
applications. The proposed converter topology is designed for unidirectional power transfer and
provides a doable solution for photovoltaic applications where voltage is required to be stepped up
without magnetic components (transformer-less and inductor-less). The output voltage obtained from
renewable sources will be low and must be stepped up by using a DC-DC converter for photovoltaic
applications. 2 K diodes and 2 K capacitors along with two semiconductor control switch are used in
the K-stage proposed converter to obtain an output voltage which is (K + 1) times the input voltage.
The conspicuous features of proposed topology are: (i) magnetic component free (transformer-less
and inductor-less); (ii) continuous input current; (iii) low voltage rating semiconductor devices
and capacitors; (iv) modularity; (v) easy to add a higher number of levels to increase voltage gain;
(vi) only two control switches with alternating operation and simple control. The proposed converter
is compared with recently described existing transformer-less and inductor-less power converters in
term of voltage gain, number of devices and cost. The application of the proposed circuit is discussed
in detail. The proposed converter has been designed with a rated power of 60 W, input voltage is
24 V, output voltage is 100 V and switching frequency is 100 kHz. The performance of the converter
is verified through experimental and simulation results.
Keywords: DC-DC converter; self-biased; magnetic component free; multistage; step-up;
photovoltaic application
1. Introduction
Renewable energy resources are becoming popular and trendy with the increase in demand
and cost of energy. The proper utilization of energy resources is one of the most important issues of
the present century. There are various renewable energy resources, including solar, tidal, wind, bio,
nuclear and geothermal, with zero pollution emissions. Solar energy is a free, inexhaustible source
of energy and is increasingly competitive with other energy sources. This energy is utilized with the
help of arrays, consisting of a number of solar panels, connected in series [1–3]. In the past, various
PV system methods or structures were adopted to minimize the cost to efficiency ratio. In [4–8],
a Photovoltaic Central Inverter Structure (PV-CIS) is employed to feed photovoltaic energy to the
electric grid. In PV-CIS PV lines are arranged in parallel and connected to one central inverter as
shown in Figure 1. The drawback of CIS are: (i) a large number of panels are required which increases
the cost of system; (ii) more number of DC cables with high-voltage rating are needed; (iii) losses in
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losses
inloss
the line;
line;
(iv) loss
loss
of power
power
due to
to
module mismatch;
mismatch;
(v) common
common
Maximum
Power
Point
the line;
(iv)
of power
due
to
module
mismatch;
(v) common
Maximum
PowerPower
PointPoint
Tracking
losses
in
the
(iv)
of
due
module
(v)
Maximum
Tracking
(MPPT)
is
used;
(vi)
system
reliability
depends
on
the
single
inverter.
(MPPT)
is used;
(vi) system
the single
inverter.
Tracking
(MPPT)
is used;reliability
(vi) systemdepends
reliabilityon
depends
on the
single inverter.
Figure
1. Photovoltaic
Central
Inverter
Structure
(PV-CIS)
forfor
transfer
Figure
1. Photovoltaic
Central
Inverter
Structure
(PV-CIS)
transferofofPV
PVenergy
energytotoan
anelectric
electric grid.
Figure 1. Photovoltaic Central Inverter Structure (PV-CIS) for transfer of PV energy to an electric
grid.
grid.
In [4–8], a Photovoltaic String Inverter structure (PV-SIS) is employed to feed photovoltaic energy
In [4–8],
[4–8],
Photovoltaic
String
Inverter
structure
(PV-SIS)
is
employed
to feed
feed seriesphotovoltaic
In
String
structure
(PV-SIS)
employed
to
photovoltaic
to the electric
grid.aaInPhotovoltaic
PV-SIS, several
PVInverter
lines are
used, which
are is
made
up of several
connected
energy
to
the
electric
grid.
In
PV-SIS,
several
PV
lines
are
used,
which
are
made
up
of
several
seriesenergy
to
the
electric
grid.
In
PV-SIS,
several
PV
lines
are
used,
which
are
made
up
of
several
seriesPV panels as shown in Figure 2. All the PV lines are connected to separate inverters via a DC-DC
connected PV
PV panels
panels as
as shown
shown in
in Figure
Figure 2.
2. All
All the
the PV
PV lines
lines are
are connected
connected to
to separate
separate inverters
inverters via
via aa
connected
converter
and
the inverter
outputs
are
connected
in parallel
and and
feedfeed
intointo
thethe
electric
grid.
The
DC-DC
converter
and
the
inverter
outputs
are
connected
in
parallel
electric
grid.
DC-DCofconverter
andsystem
the inverter
outputs
are connected
in parallel
and feed
into
the aelectric
grid.
drawbacks
the
PV-SIS
are:
(i)
it
requires
a
large
number
of
panels
to
design
several
PV
line;
The drawbacks
drawbacks of
of the
the PV-SIS
PV-SIS system
system are:
are: (i)
(i) it
it requires
requires aa large
large number
number of
of panels
panels to
to design
design aa several
several
The
(ii) a large
number
of converters
are required
to
feed the
grid;the
(iii)
the(iii)
costthe
is cost
highisdue
to
thetoseparate
PV
line;
(ii)
a
large
number
of
converters
are
required
to
feed
grid;
high
due
the
PV line; (ii) a large number of converters are required to feed the grid; (iii) the cost is high due to the
MPPTseparate
and complex
control
circuitry
iscircuitry
requiredisto
synchronize
all the inverters.
MPPT and
complex
control
required
to synchronize
all the inverters.
separate MPPT and complex control circuitry is required to synchronize all the inverters.
Figure 2. Photovoltaic String Inverter Structure (PV-SIS) for transfer of PV energy to the electric grid.
Figure
2. Photovoltaic
String
InverterStructure
Structure (PV-SIS)
(PV-SIS) for
ofof
PVPV
energy
to the
electric
grid. grid.
Figure
2. Photovoltaic
String
Inverter
fortransfer
transfer
energy
to the
electric
In [4–8],
[4–8], Photovoltaic
Photovoltaic AC
AC Module
Module Structure
Structure (PV-ACMS)
(PV-ACMS) is
is discussed
discussed to
to fed
fed photovoltaic
photovoltaic energy
energy
In
to [4–8],
the electric
electric
grid and
andAC
it provides
provides
viable solution
solution
to overcome
overcome
the drawbacks
drawbacks
of PV-CIS
PV-CIS and
and
In
Photovoltaic
ModuleaaStructure
(PV-ACMS)
is discussed
to fed photovoltaic
energy
to
the
grid
it
viable
to
the
of
PV-SIS.
Ingrid
PV-ACMS
a
single
photovoltaic
panel
is
connected
to
the
electric
grid
via
an
inverter
as
to thePV-SIS.
electricIn
and
it
provides
a
viable
solution
to
overcome
the
drawbacks
of
PV-CIS
and
PV-SIS.
PV-ACMS a single photovoltaic panel is connected to the electric grid via an inverter as
shown
in
Figure
3a.
The
drawbacks
of
PV-ACMS
are:
(i)
it
requires
several
module
inverters
which
In PV-ACMS
single3a.
photovoltaic
panel
is connected
the
electricseveral
grid via
an inverter
shown in
shown in aFigure
The drawbacks
of PV-ACMS
are: to
(i) it
requires
module
invertersaswhich
Figure 3a. The drawbacks of PV-ACMS are: (i) it requires several module inverters which increase the
cost of the system; (ii) separate MPPT is needed for each panel; (iii) the overall efficiency is low. In [4–8],
Photovoltaic Multi-String Inverter Structure (PV-MSIS) is discussed to overcome the drawback of
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2017, 10,
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increase the cost of the system; (ii) separate MPPT is needed for each panel; (iii) the overall efficiency
is low.
In [4–8],
Multi-String
Inverterseveral
Structure
discussed totoovercome
the
PV-CIS,
PV-SIS
and Photovoltaic
PV-SIS structures.
In PV-MSIS
PV(PV-MSIS)
panels areisconnected
a single inverter
drawback
of PV-CIS,
PV-SISconverters
and PV-SISas
structures.
PV-MSIS
PV panelscombines
are connected
to a
connected
via several
DC-DC
shown inInFigure
3b.several
This structure
the features
singleand
inverter
connected
several DC-DC
converters concept
as shown
3b. This
structure
of PV-SIS
PV-ACMS.
Thevia
drawback
of the PV-MSIS
is:in(i)Figure
it required
several
DC-DC
combines the features of PV-SIS and PV-ACMS. The drawback of the PV-MSIS concept is: (i) it
converters to transfer energy to the inverter; (ii) high cost due to the greater number of converters and
required several DC-DC converters to transfer energy to the inverter; (ii) high cost due to the greater
separate MPPT.
number of converters and separate MPPT.
(a)
(b)
Figure 3. (a) Photovoltaic AC Module Structure (PV-ACMS); (b) Photovoltaic Multi-String Inverter
Figure 3. (a) Photovoltaic AC Module Structure (PV-ACMS); (b) Photovoltaic Multi-String Inverter
Structure (PV-MSIS) for transfer of PV energy to the electric grid.
Structure (PV-MSIS) for transfer of PV energy to the electric grid.
The output obtained from a photovoltaic cell/array is usually low, so before feeding this voltage
to the
inverter
for practical
purposes,
it must is
beusually
stepped low,
up using
a conventional
DC-DC
The
output
obtained
fromapplication
a photovoltaic
cell/array
so before
feeding this
voltage
converter
[1–15]. application
With the increase
in the
duty-cycle
of switch
and leakage
resistanceDC-DC
of
to theboost
inverter
for practical
purposes,
it must
be stepped
up using
a conventional
inductors,
the
performance
of
the
converter
degrades.
Due
to
these
practical
problems,
conventional
boost converter [1–15]. With the increase in the duty-cycle of switch and leakage resistance of inductors,
DC-DC converters are unable to provide doable solutions for step-up voltage applications [15]. In
the performance of the converter degrades. Due to these practical problems, conventional DC-DC
theory, when a duty cycle approaches 100%, an infinite voltage conversion ratio is achieved with a
converters are unable to provide doable solutions for step-up voltage applications [15]. In theory, when
conventional boost converter, but in practice, the inductor leakage resistance of the inductor limits
a duty
approaches
infinite[16],
voltage
ratio is achieved
with
conventional
thecycle
voltage
conversion100%,
of thean
converter
so theconversion
traditional converters
cannot be
useda where
the
boostrequired
converter,
but
in
practice,
the
inductor
leakage
resistance
of
the
inductor
limits
the voltage
conversion ratio is four or more [16]. Furthermore, to achieve a high conversion ratio
by
conversion
of the
converter
[16], so the
converters
cannot
used
where
the required
using large
duty
cycle compromises
thetraditional
utilization of
high frequency
forbe
Pulse
Width
Modulation
(PWM)ratio
because
of semiconductor
control devices’
delay. Unluckily,
a largelarge
conversion
is four
or more [16]. Furthermore,
to inherent
achieve aswitching
high conversion
ratio by using
reactive
network
follows
the
limited
switching
frequency
which
is
employed
to
protect
from
the
duty cycle compromises the utilization of high frequency for Pulse Width Modulation (PWM) because
ripple
condition
of
voltage
and
current
[17].
The
traditional
buck-boost
converter
is
not
reliable
due
of semiconductor control devices’ inherent switching delay. Unluckily, a large reactive network follows
to its discontinuous
input current,
results in
utilization
of ripple
the input
source [13,15].
By and
the limited
switching frequency
whichwhich
is employed
to low
protect
from the
condition
of voltage
increasing the switching frequency of the converter, the problem of leakage resistance for certain
current [17]. The traditional buck-boost converter is not reliable due to its discontinuous input current,
values of ripple can be overcome. The finite switching time in a normal power device limits the
which results in low utilization of the input source [13,15]. By increasing the switching frequency of
switching frequency if the duty ratio is either too high or too small, so in order to abolish the above
the converter,
of leakage
resistance
forhigh
certain
values
of ripple
can be overcome.
The finite
problemsthe
andproblem
simultaneously
acquire
essential
voltage,
isolated
converters
can be engaged.
switching
in aand
normal
power device
limits
the switching
frequency
the duty
either
Manytime
isolated
non-isolated
converter
topologies
have proposed
overiftime,
whichratio
makeisuse
of too
high or
too small,
so in inductors
order to abolish
the above[16–27].
problems
acquire due
essential
inductors,
coupled
and transformers
Theand
highsimultaneously
voltage stress occurring
to the high
transformer
inductance
to switching
losses and
electromagnetic
(EMI)
voltage,
isolated leakage
converters
can be leads
engaged.
Many isolated
and
non-isolated interference
converter topologies
problems,
resulting
in
the
reduced
efficiency
of
conventional
converters.
Hard
switching
converters
have proposed over time, which make use of inductors, coupled inductors and transformers [16–27].
are inconvenient
to occurring
use for highdue
voltage
applications
dueleakage
to theirinductance
circuit complexity,
higher
voltage
The high
voltage stress
to the
transformer
leads to
switching
losses
and electromagnetic interference (EMI) problems, resulting in the reduced efficiency of conventional
converters. Hard switching converters are inconvenient to use for high voltage applications due
to their circuit complexity, higher voltage stress across the switch and the increased cost of the
converter. Hence, for isolated topologies the size, weight and losses of power transformers are
Energies 2017, 10, 719
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limiting factors. Recently, various combinations of coupled inductors, voltage multipliers or switched
stress across the switch and the increased cost of the converter. Hence, for isolated topologies the
capacitor multipliers [23–35] along with a switched inductor (SI), switched capacitor (SC), voltage lift
size, weight and losses of power transformers are limiting factors. Recently, various combinations of
switched
inductor
(VLSI)
and modified
VLSI
were used
to accomplish
thealong
necessity
coupled
inductors,
voltage
multipliers
or principles
switched capacitor
multipliers
[23–35]
with [15,26].
a
Figure
4a–c
shows
the
recent
SI,
VLSI
and
modified
VLSI
inductive
networks.
For
acquiring
a high
switched inductor (SI), switched capacitor (SC), voltage lift switched inductor (VLSI) and modified
boostVLSI
ratio,principles
a cascaded
approach
is introduced.
To design
a Cascaded
Converter
(CBC),
a number
were
used to accomplish
the necessity
[15,26].
Figure Boost
4a–c shows
the recent
SI, VLSI
of inductors
are essential,
which networks.
is the most
part.
In addition,
losses
and increased
and modified
VLSI inductive
Forcomplex
acquiring
a high
boost ratio,
a cascaded
approachcurrent
is
introduced.
Toadesign
Cascaded
(CBC),
a and
number
of efficiency
inductors are
essential,
ripple
prove to be
barriera to
achieveBoost
a highConverter
conversion
ratio
better
[36–38].
With an
which
the most complex
part. In gain
addition,
and aincreased
currentthe
ripple
prove toBoost
be a barrier
objective
ofisacquiring
a high voltage
just losses
by using
single switch,
Quadratic
Converter
to
achieve
a
high
conversion
ratio
and
better
efficiency
[36–38].
With
an
objective
of
acquiring
a high
(QBC) was proposed, though, in a QBC, higher voltage rating switches are required with
higher
voltage gain just by using a single switch, the Quadratic Boost Converter (QBC) was proposed,
RDS-ON , as voltage stress raised across the switch is equal to the output voltage [39–41]. Multilevel
though, in a QBC, higher voltage rating switches are required with higher RDS-ON, as voltage stress
converters provide a suitable solution for power conversion because of the low voltage stress across
raised across the switch is equal to the output voltage [39–41]. Multilevel converters provide a
each suitable
device [42].
High
is achieved
by multilevel
converters
capacitors
solution
for voltage
power conversion
because
of the lowDC-DC
voltage stress
acrossusing
each device
[42]. and
diodeHigh
circuitry
at
the
output
end
and
the
output
voltage
level
can
be
increased
without
voltage is achieved by multilevel DC-DC converters using capacitors and diode circuitry at actually
the
disturbing
varying
of output
levels
anddisturbing
duty cycle,
voltage
output the
end actual
and thecircuit.
output By
voltage
levelthe
cannumber
be increased
without
actually
thethe
actual
gain circuit.
of multilevel
converters
can beofvaried
[43,44].
multilevel
converters,
designing
By varying
the number
output
levels For
andconventional
duty cycle, the
voltage gain
of multilevel
converters
can be like
varied
[43,44]. isFor
conventional
designing magnetic
magnetic
components
inductors
a complex
task, multilevel
which alsoconverters,
induces electromagnetic
emission
components
like
inductors
is
a
complex
task,
which
also
induces
electromagnetic
emission
noise. Other than these issues the presence of inductors and transformers in the power
circuitnoise.
degrades
Other than capability
these issuesand
the increases
presence ofthe
inductors
and transformers
theconverters.
power circuit
degrades
the
the integration
cost, weight
and size ofin
the
Switched
Capacitor
integration capability and increases the cost, weight and size of the converters. Switched Capacitor
(SC) power circuits provide good integration ability due to their small volume and weight, since
(SC) power circuits provide good integration ability due to their small volume and weight, since
magnetic components like transformers and inductors is not needed to design a SC converter [33].
magnetic components like transformers and inductors is not needed to design a SC converter [33].
(a)
(b)
(c)
Figure 4. Inductive networks: (a) Switched Inductor; (b) Voltage Lift switched Inductor cell; (c)
Figure
4. Inductive
(a) Switched
Inductor; (b) Voltage Lift switched Inductor cell;
modified
voltage liftnetworks:
switched inductive
cell.
(c) modified voltage lift switched inductive cell.
In this article, a new magnetic component-free (transformer-less and inductor-less) DC-DC
converter
is proposed
to magnetic
overcome the
drawbacks of PV-CIS,
PV-SIS, PV-ACMS,
PV-MSIS and the
In this article,
a new
component-free
(transformer-less
and inductor-less)
DC-DC
above discussed converter topology. The proposed converter provides a viable solution for existing
converter is proposed to overcome the drawbacks of PV-CIS, PV-SIS, PV-ACMS, PV-MSIS and the
photovoltaic application systems where voltage must be stepped up without magnetic components
above discussed converter topology. The proposed converter provides a viable solution for existing
before transferring energy to a multilevel-inverter. The single proposed converter is sufficient to
photovoltaic
application
systemsinverter
where as
voltage
be stepped
up without magnetic components
transfer energy
to a multilevel
shownmust
in Figure
5.
before transferring
energy
to a multilevel-inverter.
The single
proposed
is sufficient
to
The proposed
photovoltaic
system (PV System) consists
of PV
modules, converter
the proposed
DC-DC
transfer
energybattery
to a multilevel
inverter as
shown(MLI)
in Figure
converter,
and the multilevel
inverter
which5.converts the battery/proposed DC-DC
The
proposed
photovoltaic
(PV
consists
of PV modules,
proposed
DC-DC
converter
voltage
to AC voltagesystem
to power
ACSystem)
loads/feed
in the electric
grid. Somethe
amount
of power
is
lost
during
the
conversion
of
photovoltaic
energy
to
electric
energy.
The
PV
device
maximum
converter, battery and the multilevel inverter (MLI) which converts the battery/proposed DC-DC
outputvoltage
power to
(product
of voltage
and current)
is described
by the
Maximum
Poweramount
Point (MPP)
converter
AC voltage
to power
AC loads/feed
in the
electric
grid. Some
of power
and
it
is
also
depends
on
the
environmental
conditions
(generally
on
temperature
andmaximum
light
is lost during the conversion of photovoltaic energy to electric energy. The PV device
conditions). A Maximum Power Point Tracker is compulsory to ensure the maximum power output
output power (product of voltage and current) is described by the Maximum Power Point (MPP) and
(Pmax) of a solar PV device. The Maximum Power Point Tracker can be used to adjust its input
it is also depends on the environmental conditions (generally on temperature and light conditions).
voltage to utilize the maximum photovoltaic output power and then transform this power to supply
A Maximum
Power
Point
Tracker is compulsory
ensureisthe
maximum
powerwill
output
(Pmax ) of a
the varying
voltage
requirements.
When the PVtovoltage
increased
the current
ultimately
solardecrease,
PV device.
The
Maximum
Power
Point
Tracker
can
be
used
to
adjust
its
input
voltage
utilize
and when the PV current is increased the voltage will ultimately decrease. Dependingtoon
the maximum
photovoltaic
output
power
and
then
transform
this
power
to
supply
the
varying
voltage
parameters like irradiance and temperature the MPP of the I-V curve of a PV module changes
requirements. When the PV voltage is increased the current will ultimately decrease, and when the PV
current is increased the voltage will ultimately decrease. Depending on parameters like irradiance and
temperature the MPP of the I-V curve of a PV module changes dynamically. Therefore, the MPP needs
to be located by a tracking algorithm as it is not known beforehand.
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2017, 10, 719 Therefore, the MPP needs to be located by a tracking algorithm as it is not known5 of 28
dynamically.
dynamically.
beforehand. Therefore, the MPP needs to be located by a tracking algorithm as it is not known
beforehand.
Figure 5. Proposed multistage self-balanced and magnetic component-free DC-DC converter in a
Figure 5. Proposed multistage self-balanced and magnetic component-free DC-DC converter in a
Figure
5. Proposed
self-balanced
and magnetic
converter in a
photovoltaic
systemmultistage
for the transfer
of photovoltaic
energy tocomponent-free
a DC load, gridDC-DC
or motor.
photovoltaic
system for the transfer of photovoltaic energy to a DC load, grid or motor.
photovoltaic system for the transfer of photovoltaic energy to a DC load, grid or motor.
To achieve the maximum power transfer from the PV module to the load it is necessary to
To
achieve
the maximum
transfer
from
the
module
to
the
load
it is
necessary
match
the
load
resistance
Rpower
L topower
thetransfer
best
possible
output
resistance
the
PV
module
RPV (Rmpp
=
To achieve
the maximum
from
the
PVPV
module
toof
the
load
it
is
necessary
totomatch
match
the
load
resistance
R
L to the bestand
possible
output
resistance
of
the
PV
module
R
PV
(R
mpp =
V
mpp/Impp
).
Characteristic
power-voltage
current-voltage
graphs
or
curves
are
shown
in
Figure
the load resistance RL to the best possible output resistance of the PV module RPV (Rmpp = Vmpp /Impp ).
V
mpp/Impp). Characteristic power-voltage and current-voltage graphs or curves are shown in Figure
6a.
Characteristic
power-voltage and current-voltage graphs or curves are shown in Figure 6a.
6a.
(a)
(a)
(b)
(b)
(c)
(c)
(d)
(d)
(e)
(e)
(f)
(f)
Figure 6. (a) Power- voltage or current- voltage graphs of a photovoltaic system; (b) MPPT when
∆P = 0 and ∆V = 0; (c) MPPT when ∆P < 0 and ∆V < 0; (d) MPPT when ∆P > 0 and ∆V > 0; (e) MPPT
when ∆P > 0 and ∆V < 0; (f) MPPT when ∆P < 0 and ∆V > 0.
Energies 2017, 10, 719
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Energies 2017, 10, 719
6 of 28
Figure 6. (a) Power- voltage or current- voltage graphs of a photovoltaic system; (b) MPPT when ∆P
= 0 and ∆V = 0; (c) MPPT when ∆P < 0 and ∆V < 0; (d) MPPT when ∆P > 0 and ∆V > 0; (e) MPPT when
The
of PVwhen
module
∆P >output
0 and ∆Vpower
< 0; (f) MPPT
∆P < will
0 andbe
∆Vzero
> 0. when the photovoltaic current (IPV ) is
equal to the
short circuit current (ISC ) or the photovoltaic voltage (VPV ) is equal to the open circuit voltage (VOC ).
power
of PVthe
module
will bepower
zero when
the(MPP)
photovoltaic
current (IPV) cell
is equal
to the
Thus, The
it is output
possible
to track
maximum
point
of a photovoltaic
by regulating
the
short circuit
current
SC) or
the
photovoltaic
voltage
(V
PV
)
is
equal
to
the
open
circuit
voltage
(V
OC).
operating
voltage
of(IV
.
In
[45]
Maximum
Power
Point
Tracking
is
discussed
for
a
reconfigurable
PV
Thus, it is possible to
track the and
maximum
point (MPP)
of observation
a photovoltaic(P&O)
cell byalgorithm
regulating is
the
switched-capacitor
converter
in [46]power
a perturbation
and
discussed
operating voltage of VPV. In [45] Maximum Power Point Tracking is discussed for a reconfigurable
for DC-DC converters connected to photovoltaic generators. The concept to control power of a
switched-capacitor converter and in [46] a perturbation and observation (P&O) algorithm is
multistage magnetic component-free DC-DC converter is explained in Figure 6b–f. Thus, to regulate
discussed for DC-DC converters connected to photovoltaic generators. The concept to control power
the
operating voltage V component-free
, the ON timeDC-DC
of the converter
capacitorisand
number of stages (if the structure is
of a multistage magneticPV
explained in Figure 6b–f. Thus, to
reconfigurable)
are
two
controlled
parameters
in
the
proposed
therefore
it forces
the MPPT
regulate the operating voltage VPV, the ON time of the capacitor system,
and number
of stages
(if the
charge
controller
to
extract
the
maximum
power
PV
module
to
operate
at
a
voltage
close
structure is reconfigurable) are two controlled parameters in the proposed system, therefore it forces to the
maximum
point which
causesthe
it maximum
to draw the
maximum
available
power
theclose
PV module.
the MPPT power
charge controller
to extract
power
PV module
to operate
at afrom
voltage
to the
maximum
power
point which
it tofor
draw
maximum
available power
from systems
the PV where
The
proposed
converter
is alsocauses
suitable
thethe
DC
link application
in DC-AC
module. voltage balancing is the main challenge. The proposed converter also provides a viable
capacitor
Thefor
proposed
converter
is also suitable
for the DC and
link transformers
application in are
DC-AC
systems where
solution
low power
applications,
since inductors
not required
to design the
capacitor voltage balancing is the main challenge. The proposed converter also provides a viable
proposed converter.
solution for low power applications, since inductors and transformers are not required to design the
converter.
2.proposed
Recent Transformer-Less
and Inductor-Less DC-DC Converters
2. Recent
and Inductor-Less
Converters
In thisTransformer-Less
section recent transformer-less
andDC-DC
inductor-less
DC-DC converter power circuit topologies
and their
drawbacks
are
discussed
in
detail.
Various
multilevel
DC-DC
converters
and switched
In this section recent transformer-less and inductor-less DC-DC
converter
power circuit
capacitor
topologies
inductor
were recently
in the literature.
topologies
and their without
drawbacks
are discussed
in detail.addressed
Various multilevel
DC-DC converters and
switched capacitor topologies without inductor were recently addressed in the literature.
2.1. Series-Parallel Switched Capacitor (SC) Converter
2.1. Series-Parallel Switched Capacitor (SC) Converter
In [47–49], a series-parallel switched capacitor (SPSC or series-parallel SC) converter using only
Inswitching
[47–49], a series-parallel
switched
capacitor
(SPSC or series-parallel
SC)
converter using
only
control
elements and
capacitors
was proposed.
In Figure 7a
three-level
series-parallel
SC
control
switching
elements
and
capacitors
was
proposed.
In
Figure
7a
three-level
series-parallel
SC
converter is depicted. The operation of this topology is simple and divided into only two modes
(two
converter states
is depicted.
operation
of this
is in
simple
divided
into
two modes
switching
only). The
All the
switches
are topology
controlled
such and
a way
that all
theonly
capacitors
are charged
(two switching states only). All the switches are controlled in such a way that all the capacitors are
in series and discharged in parallel. The conversion ratio of an N-level series-parallel SC converter
charged in series and discharged in parallel. The conversion ratio of an N-level series-parallel SC
is 1/N (in step-down mode) and N times (in step-up mode). More than 90% efficiency is reported in
converter is 1/N (in step-down mode) and N times (in step-up mode). More than 90% efficiency is
the
literature.
reported
in the literature.
(a)
(b)
Figure 7. (a) Three–Level Series-Parallel Switched Capacitor (Series-Parallel SC) Converter; (b) Flying
Capacitor Multilevel DC-DC Converter (FCMDC).
Energies 2017, 10, 719
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However the series-parallel SC converter has following drawbacks:
1.
2.
3.
4.
5.
Difficult to change the switching state of the converter due to the several switching elements.
Unequal voltage across switches, thus power switches of various ratings are required.
Series-parallel SC is bidirectional, but it is not possible to control the power flow. It depends on
the voltages at the input and output DC buses.
If switching is not properly controlled, it may instigate a charge unbalance situation among the
converter capacitors.
Non-modularity, since a large number of switches, gate drivers and diodes are required and the
number of devices increases with the number of levels. Due to this a series parallel converter is
large in size and has high cost.
2.2. Flying Capacitor Multilevel DC-DC Converter (FCMDC)
In [49–51], flying capacitor multilevel DC-DC converter (FCMDC) is proposed. Figure 7b depicts
the power circuit of a three–level FCMDC. The conversion ratio of an N-level FCNDC is 1/N (in
step-down mode) and N times (in step-up mode). FCMDC is a bidirectional converter with efficiency
higher than 95%. The voltage stress of switches is also equal and thus requires same rating of the
switching devices. Nevertheless FCMDC has the following drawbacks:
1.
2.
3.
4.
5.
A large number of transistors and capacitors is required (2N the number of switches and N
number of capacitors are required to design an N-level FCMDC), hence this converter is large in
size and also has a high cost.
Difficult to extend the power circuit to increase the number of stages to change the output
conversion ratio since the converter does not have a modular structure.
A complicated switching scheme is required to operate the converter.
FCMDC is inefficient at high switching frequency when the ON time is comparable to the rise
and fall time of the switches since; to transfer energy from the input source to the capacitors a
very small time frame is allowed.
Utilization of components is less. It is not possible to control the power circuit if any of the
switches fails.
2.3. Magnetic-Less Multilevel DC-DC Converter (MMDC)
In [52], a magnetic-less multilevel DC-DC converter (MMDC) is proposed by connecting two
transistor and one capacitor switching cells (modular block) in a mesh pattern. Figure 8 depicts the
power circuitry of the three-level MMDC. The conversion ratio of an N-Level MMDCC is 1/N (in
step-down mode) and N times (in step-up mode). The voltage stress of each transistor of the switching
cells is the same and equal to Vin and also it is independent of the duty cycle and conversion ratio of
the converter. However, the following are the drawbacks of the MMDC:
1.
2.
3.
A very large number of switching devices and capacitors are required to design an MMDC
N (N + 1) switches, N (N + 1) diodes and 0.5N (N + 1) capacitors are required to design the
N-Level MMDCC.
It is difficult to manage direction of power flow of the converter due to the greater number of
transistors present in the conducting path.
The power flow of the converter is also depends on the voltages at the input and output DC
buses, thus it is not a good option for the applications where the source voltage may vary.
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Figure 8. Three-Level Magnetic-Less Multilevel DC-DC Converter (MMDC).
Figure 8. Three-Level Magnetic-Less Multilevel DC-DC Converter (MMDC).
2.4. Fibonacci DC-DC Converter
2.4. Fibonacci DC-DC Converter
In [53], a Fibonacci DC-DC converter is proposed using capacitors and switching device
Figure 8. Three-Level Magnetic-Less Multilevel DC-DC Converter (MMDC).
In
[53], a Fibonacci
DC-DC
converter
is proposed
using
capacitors
and switching
device
circuitry.
circuitry.
The voltage
conversion
ratio of
the converter
follows
the well-known
Fibonacci
series.
Figure
9
depicts
the
power
circuitry
of
the
three
stage-Fibonacci
converter.
High
voltage
is
achieved
The voltage
conversion
ratio
of
the
converter
follows
the
well-known
Fibonacci
series.
Figure
9
depicts
2.4. Fibonacci DC-DC Converter
but it circuitry
still requires
large stage-Fibonacci
number of switching
devices
andvoltage
capacitors.
The following
are requires
the
the power
of thea three
converter.
High
is achieved
but it still
In [53],
Fibonacci
DC-DC
converter
is proposed using capacitors and switching device
drawbacks
of athe
Fibonacci
DC-DCand
converter:
a large
number of
switching
devices
capacitors. The following are the drawbacks of the Fibonacci
circuitry. The voltage conversion ratio of the converter follows the well-known Fibonacci series.
DC-DC
1. converter:
A large number of control switches are required to design the converter (3N + 1 number of
1.
2.
3.
Figure 9 depicts the power circuitry of the three stage-Fibonacci converter. High voltage is achieved
control
switchesaare
required
to design
an N-stage
converter)
but it
still requires
large
number
of switching
devices
and capacitors. The following are the
A large
number
of DC-DC
control switches
are
required
to design series
the converter
+ 1not
number
of control
2.
The
Fibonacci
converter
follows
the
Fibonacci
and thus(3N
it is
possible
to
drawbacks of the Fibonacci DC-DC converter:
switches
arevoltage
required
to design
an N-stage
achieve
conversion
ratios
like 2, 4…converter)
(which are not present in the Fibonacci converter)
1. Fibonacci
A islarge
number
control switches
required
to design
the converter
(3N possible
+ 1 number
of
3.
It
not capable
ofoftransferring
powerare
inthe
both
directions.
The
DC-DC
converter
follows
Fibonacci
series and
thus it is not
to achieve
control switches are required to design an N-stage converter)
voltage conversion ratios like 2, 4 . . . (which are not present in the Fibonacci converter)
2. The Fibonacci DC-DC converter follows the Fibonacci series and thus it is not possible to
It is not
capable
of transferring
power
directions.
achieve
voltage
conversion ratios
likein
2, both
4… (which
are not present in the Fibonacci converter)
3. It is not capable of transferring power in both directions.
Figure 9. Three-Level Fibonacci DC-DC converter.
2.5. Modified Step-Up DC-DC Converter (Switch Mode DC-DC Converter)
In [54], a modified step-up DC-DC converter (switch mode DC-DC converter) is proposed
Figure 9. Three-Level Fibonacci DC-DC converter.
Figure
9. Three-Level
converter.
which has continuous input
current
capability. Fibonacci
Figure 10 DC-DC
depicts the
switch mode DC-DC converter.
Its
power
circuitry
is
divided
into
two
parallel
parts.
A
detailed
study
2.5. Modified Step-Up DC-DC Converter (Switch Mode DC-DC Converter) about the mode of operation
and
capacitor
state
is given
in Table(Switch
1. The operation
of theConverter)
proposed converter is simple and the
2.5. Modified
Step-Up
DC-DC
Converter
Mode DC-DC
In [54],ratio
a modified
step-up isDC-DC
converter
(switch
modecycle.
DC-DC
converter)
proposed
conversion
of the converter
adjusted
by varying
the duty
In addition,
theiscontinuous
which
has
continuous
input
current
capability.
Figure
10
depicts
the
switch
mode
DC-DC
converter.
In
[54],current
a modified
step-up
DC-DC
converter
(switch
mode
DC-DC converter) is proposed which
input
from low
voltage
input sources
reduces
the EMI
problem.
Its power circuitry
is divided
into twoFigure
parallel
A detailed
study
about
the mode
of operation
has continuous
input current
capability.
10parts.
depicts
the switch
mode
DC-DC
converter.
Its power
andiscapacitor
given
in Table
1. The
operation
of the
proposed
converter
is simpleand
andcapacitor
the
circuitry
dividedstate
into is
two
parallel
parts.
A detailed
study
about
the mode
of operation
conversion
ratio
of
the
converter
is
adjusted
by
varying
the
duty
cycle.
In
addition,
the
continuous
state is given in Table 1. The operation of the proposed converter is simple and the conversion ratio of
input current from low voltage input sources reduces the EMI problem.
the converter is adjusted by varying the duty cycle. In addition, the continuous input current from low
voltage input sources reduces the EMI problem.
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Figure 10. Modified Step-up DC-DC Converter (Switch Mode DC-DC Converter).
Figure 10. Modified Step-up DC-DC Converter (Switch Mode DC-DC Converter).
Table 1. Mode of operation and state of capacitors of Modified Step-up DC-DC Converter.
Table 1. Mode of operation and state of capacitors of Modified Step-up DC-DC Converter.
Operation
Mode
Switches State
Capacitors of
Capacitors of
Figure 10. Modified Step-up DC-DC Converter (Switch Mode DC-DC
LeftConverter).
Part
Right Part
S1
S2
S3
S4
S5
S6
S7
S8
Switches
State
(Section-I)
(Section-II)
Capacitors of Left
Capacitors
of Right
Operation
Mode-I Table
OFF
ONstate
ONcapacitors
ON PartOFF
Discharging
1. Mode
ofS3operation
Step-up Charging
DC-DC Converter.
(Section-I)
Part (Section-II)
Mode
S1OFF
S2 ON
S4 and
S5
S6of
S7 OFFS8of Modified
Mode-II
Mode-I
Mode-III
Operation
Mode-II
Mode-III
Mode
Mode-III
Mode-III
Mode-I
OFF
OFF
OFFON ON OFF
OFF
OFFON OFF OFF
OFF
S1
S2
ON OFF ON
ONOFFOFF ON
ON
OFF
OFF
ON
OFF
ON Switches
ON
State
ON
OFF OFF
OFF ON ONOFF
OFF ON
OFF
ONOFFOFF
ON
OFF
OFF
S3
S4
S5
S6
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
S7
OFF OFF
OFF
ON OFF
ON OFFOFFOFF ON
HoweverOFF
this converter
has theOFF
following
drawbacks:
Mode-II
OFF
OFF
ON
OFF
ON
Mode-III
ON
OFF
ON
OFF
OFF
ON
OFF
1. A large number of switching devices is required.
Mode-III thisON
OFF has
ON
OFF
OFFdrawbacks:
OFF
OFF
However
converter
the following
OFF
No action
OFF
ON
OFF
No action
Discharging
Discharging
Charging
Capacitors
of
ON
Discharging
Left Part
No
actionDischarging
OFF
S8
Discharging(Section-I)
Discharging
OFF
Charging
Discharging
Discharging
Capacitors
Chargingof
Right
Part
Discharging
No Action
(Section-II)
Charging
NoDischarging
Action
Discharging
Charging
No Action
2. It introduces high switching losses and thus the efficiency of the converter is less.
3. Moreover, there is no extension of the circuit to increase the voltage conversion ratio.
However
thisof
converter
hasdevices
the following
drawbacks:
1.
A large
number
switching
is required.
4. This converter is not suitable for high power high voltage applications due to the lower voltage
2.
It introduces
high
switching
losses
andisthus
the efficiency of the converter is less.
1.
A
large number
of switching
devices
required.
conversion
ratio.
2.
It introduces
and
thus the
efficiencythe
of the
converter
is less. ratio.
3.
Moreover,
there high
is noswitching
extensionlosses
of the
circuit
to increase
voltage
conversion
3.
Moreover,
there
is
no
extension
of
the
circuit
to
increase
the
voltage
conversion
2.6.
Switched
Capacitor
DC-DC
Converter
4.
This converter is not suitable for high power high voltage applications due toratio.
the lower voltage
4. This converter is not suitable for high power high voltage applications due to the lower voltage
conversion
In [55], aratio.
new switched capacitor DC-DC converter with low ripple input current is proposed.
conversion ratio.
Figure 11 depicts the power circuit of the converter. The low ripple and continuous input current
2.6. Switched
Capacitor
DC-DC
help to reduce
EMI
of the Converter
circuit. However this circuit has no provision to increase the voltage
2.6. Switched Capacitor DC-DC Converter
conversion ratio.
In [55], a new switched capacitor DC-DC converter with low ripple input current is proposed.
In [55], a new switched capacitor DC-DC converter with low ripple input current is proposed.
Figure
11 depicts
the the
power
circuit
The low
lowripple
rippleand
and
continuous
input
current
Figure
11 depicts
power
circuitofofthe
theconverter.
converter. The
continuous
input
current
help help
to reduce
EMIEMI
of the
circuit.
circuithas
hasnonoprovision
provision
increase
voltage
to reduce
of the
circuit.However
However this
this circuit
to to
increase
the the
voltage
conversion
ratio.ratio.
conversion
Figure 11. Switched Capacitor DC-DC Converter.
2.7. Multilevel Modular Capacitor Clamped DC-DC Converter (MMCCC)
Figure 11. Switched Capacitor DC-DC Converter.
Figure 11. Switched Capacitor DC-DC Converter.
2.7. Multilevel Modular Capacitor Clamped DC-DC Converter (MMCCC)
Energies 2017, 10, 719
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2.7. Multilevel Modular Capacitor Clamped DC-DC Converter (MMCCC)
Energies 2017, 10, 719
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In [56], a multilevel modular capacitor clamped DC-DC converter (MMCCC) is proposed.
2017, 10,
719
10 of 28 of
Figure Energies
12 In
depicts
power circuit
of the
MMCCC
for five
levels.converter
The following
are the
drawbacks
[56],
athe
multilevel
modular
capacitor
clamped
DC-DC
(MMCCC)
is proposed.
Figure 12 depicts the power circuit of the MMCCC for five levels. The following are the drawbacks
the MMCCC:
1.
2.
In [56], a multilevel modular capacitor clamped DC-DC converter (MMCCC) is proposed.
of the MMCCC:
Figurethis
12 depicts
theapower
circuit ofconversion
the MMCCC
for is
five
levels. The
areathe
drawbacks
Using
topology
high voltage
ratio
achieved,
butfollowing
it requires
large
number of
1.of the
Using
this topology a high voltage conversion ratio is achieved, but it requires a large number
MMCCC:
switching
devices
and capacitors.
of switching
devices
and capacitors.
1.
Using
this
topology
a switches
high
voltage
conversion
ratio
is
achieved,
but
itlevel
requires
a large
number
The
voltage
stress
across
ofofthe
high.
For
N
MMCCC
the
voltage
2. The voltage stress
across
switches
the converter
converter
isishigh.
For
anan
N
level
MMCCC
the voltage
of
switching
devices
and
capacitors.
stress
of N-2
devices
is equal
to 2V
and
thethe
remaining
switches
have
VinVinvoltage
stress
of switching
N-2 switching
devices
is equal
toin2V
in and
remaining
switches
have
voltagestress.
2. stress.
The voltage stress across switches of the converter is high. For an N level MMCCC the voltage
stress of N-2 switching devices is equal to 2Vin and the remaining switches have Vin voltage
stress.
Figure 12. Multilevel Modular Capacitor Clamped DC-DC Converter (MMCCC).
Figure 12. Multilevel Modular Capacitor Clamped DC-DC Converter (MMCCC).
Figure 12. Multilevel
ModularComponent-Free
Capacitor ClampedMultistage
DC-DC Converter
(MMCCC).
3. Proposed Self-Balanced
and Magnetic
DC-DC
Converter
3. Proposed Self-Balanced and Magnetic Component-Free Multistage DC-DC Converter
3. Proposed
Self-Balanced and Magnetic Component-Free Multistage DC-DC Converter
3.1.
Mode of Operation
3.1. Mode of Operation
power
circuit of the proposed self balanced and magnetic component-free (transformer-less
3.1.The
Mode
of Operation
The
circuit of
the proposed
selfconverter
balanced for
andKmagnetic
(transformer-less
and power
inductor-less)
multistage
DC-DC
stages iscomponent-free
depicted in Figure
13. The
The
power
circuit
of
the
proposed
self
balanced
and
magnetic
component-free
(transformer-less
conspicuous features
of theDC-DC
proposed
topologyfor
are:K(i)stages
it is magnetic
components
free;
continuous
and inductor-less)
multistage
converter
is depicted
in Figure
13.(ii)
The
conspicuous
and current;
inductor-less)
multistage
DC-DC
converterdevices
for K and
stages
is depictedmodularity;
in Figure (v)
13.easy
The
input
(iii) lowtopology
voltage rating
semiconductor
capacitors;
features
of the proposed
are: (i)
it is magnetic
components
free; (ii)(iv)
continuous input
current;
conspicuous
features
of
the
proposed
topology
are:
(i)
it
is
magnetic
components
free;
(ii)
continuous
to add
a higher
number
of levels to increase
(vi) only
control switches
aretoused
(iii) low
voltage
rating
semiconductor
devicesthe
andvoltage;
capacitors;
(iv)two
modularity;
(v) easy
addwith
a higher
input current;
(iii) low
voltage
rating control.
semiconductor
devicesDC-DC
and capacitors;
modularity;
easy
alternating
operation;
and
(vii) simple
The proposed
converter(iv)
topology
is free(v)
from
number
of
levels
to
increase
the
voltage;
(vi)
only
two
control
switches
are
used
with
alternating
to
add
a
higher
number
of
levels
to
increase
the
voltage;
(vi)
only
two
control
switches
are
used
with
magnetic components like inductors and it is designed for unidirectional power transfer
operation;
and (vii)
simpleand
control.
The proposed
DC-DC converter
topologytopology
is free from
magnetic
alternating
operation;
(vii)
simple
control. The
DC-DC
converter
is free
from
applications.
The proposed
topology
provides
an proposed
output voltage
higher
than the input
voltage
components
like
inductors
and
it
is
designed
for
unidirectional
power
transfer
applications.
The
magnetic
components
like
inductors
and
it
is
designed
for
unidirectional
power
transfer
without any magnetic components. The operation at high frequency permits a reduction in the size
proposed
topology
provides
an
output
voltage
higher
than
the
input
voltage
without
any
magnetic
applications.
The
proposed
topology
provides
an
output
voltage
higher
than
the
input
voltage
of capacitors thus enabling a reduced size of the circuit without external components. In this
withoutThe
anyoperation
magneticofcomponents.
The operation
at
high frequency
permits
reduction
in
theenabling
size
components.
atcontrol
high frequency
permits
a reduction
in the
size of
topology
the
number
switches
does
not depend
on the
number
of acapacitors
levels.
The thus
required
of
capacitors
thus
enabling
a
reduced
size
of
the
circuit
without
external
components.
In
this
a reduced
size
the circuit
withoutdepends
externaloncomponents.
this topology
thediodes
number
control
number
of of
diodes
and capacitors
the number ofInoutput
levels. Two
andoftwo
topology
the
number
of
control
switches
does
not
depend
on
the
number
of
levels.
The
required
capacitors
are required
to increase
the level
of the The
proposed
converter
by one.
Thus, to
design
a
switches
does not
depend on
the number
of levels.
required
number
of diodes
and
capacitors
number
of diodesstep-up
and capacitors
depends on
the number
of
output
levels. Two
diodes
and two
4-stage
proposed
DC-DC
converter
topology,
two
control
switches,
eight
uncontrolled
depends on the number of output levels. Two diodes and two capacitors are required to increase the
capacitors
are and
required
to increaseare
therequired.
level of the proposed converter by one. Thus, to design a
diodes)
eight capacitors
level (power
of the proposed
converter
by one. Thus,
to design a 4-stage proposed step-up DC-DC converter
4-stage proposed step-up DC-DC converter topology, two control switches, eight uncontrolled
topology,
two
control
switches,
eight
uncontrolled
(power diodes) and eight capacitors are required.(power diodes) and eight capacitors are required.
Figure 13. Self-balanced and magnetic component-free multistage converter for K stages.
13. Self-balanced
magnetic
component-freemultistage
multistage converter
KK
stages.
FigureFigure
13. Self-balanced
andand
magnetic
component-free
converterfor
for
stages.
Energies 2017, 10, 719
11 of 28
ToEnergies
explain
operation modes of the proposed magnetic component-free K-stages converter
2017,the
10, 719
11 of 28
circuit the following is considered. The mode of operation of the converter is divided into two modes:
Energies
10, 719
11 of 28
To2017,
explain
modes
the proposed
magneticON)
component-free
converter
Mode 1 when
switchtheSboperation
and Sa act
as aofshort
circuit (turned
and open K-stages
circuit (turned
OFF)
circuit the following is considered. The mode of operation of the converter is divided into two
respectively,
Mode
when switch
Sb act as amagnetic
short circuit
(turned ON)
and converter
open circuit
Toand
explain
the 2operation
modesSaofand
the proposed
component-free
K-stages
modes: Mode 1 when switch Sb and Sa act as a short circuit (turned ON) and open circuit (turned
(turnedcircuit
OFF),the
respectively.
switch
switch
S are
in operation.
following is Hence,
considered.
The Smode
of
operation
of complementary
the converter is divided
into twoThe
a and
OFF) respectively, and Mode 2 when switch
Sa and Sb act bas a short circuit (turned ON) and open
modes:
Mode 1 when
switch
Sb andand
Sa actoperated
as a shortat
circuit
(turned
ON)
open
(turned
proposed
topology
simple
control
fixed
cycleand
of 0.5
tocircuit
provide
voltage
circuit
(turned has
OFF),
respectively.
Hence,isswitch
Sa and aswitch
Sduty
b are complementary in operation.
OFF) respectively,
and
Mode 2 when
switch
Sis
a and
Sbnot
act required
as a short to
circuit
(turned
ON) and
open an
to photovoltaic
devices.
A
complex
gate
driver
also
drive
the
switch;
instead
The proposed topology has simple control and is operated at a fixed duty cycle of 0.5 to provide
circuit
(turned OFF),
respectively.
Hence,
switch Sa and switch Sb are complementary in operation.
oscillator
is sufficient
to provide
a gated
signal.
voltage
to photovoltaic
devices.
A complex
gate driver is also not required to drive the switch;
The proposed topology has simple control and is operated at a fixed duty cycle of 0.5 to provide
is sufficient
a gated
Ininstead
Modean
1 oscillator
(Figure 14),
switch to
Sbprovide
is turned
ONsignal.
and switch Sa is turned OFF, capacitor C12 is
voltage to photovoltaic devices. A complex gate driver is also not required to drive the switch;
Modevoltage
1 (Figure
14), switch
Sb D
is11turned
ON and
a is voltage
turned OFF,
capacitor
C12 C
is12 is
charged byIninput
through
diode
and switch
S switch
when Sthe
across
capacitor
instead an oscillator is sufficient to provide a gated signal.b
charged
by
input
voltage
through
diode
D
11 and switch Sb when the voltage across capacitor C12 is
smaller than
input
voltage.14),
When
theSvoltage
across capacitors C a is+ turned
C22 is smaller
than theCvoltage
Inthe
Mode
1 (Figure
switch
b is turned ON and switch S12
OFF, capacitor
12 is
than
the
input stored
voltage.
When
the voltage
across
capacitors
C
12 + C22 is smaller than the
VC11 +smaller
V
,
then
the
energy
in
the
capacitor
C
is
transferred
to
capacitor
C
through
D1221isand
in
11
22capacitor C
charged
by input voltage through diode D11 and switch
Sb when the voltage across
voltage VC11 + Vin, then the energy stored in the capacitor C11 is transferred to capacitor C22 through
switch smaller
S . Similarly
capacitor
C(k-1)1 transfers
energyacross
to C capacitors
when the
capacitors
than the
input voltage.
When theits
voltage
C12voltage
+ C22 isacross
smaller
than the C
D21b and switch Sb. Similarly
capacitor C(k-1)1 transfers its K2
energy to CK2 when the voltage across 12
voltage
C11is
+ smaller
Vin, then than
the energy
stored
the
to capacitor
C22D
through
+ C22 +capacitors
. . . + CVK2
voltage
Vin +inV
+C
+C.11. is
. +transferred
VC(K-1)1 through
diode
C11capacitor
K1 . In this
C12 + C22 +… + CK2 is smaller than
voltage
VC21
in + VC11 + CC21 +… + VC(K-1)1 through diode DK1.
D21 output
and switch
Sb. Similarly
capacitor
C(k-1)1
transfers
its
energy
to
C
K2
when
the
voltage
across
mode the
voltage
is
equal
to
the
input
voltage
(V
)
+
V
+V
+
.
.
.
+
V
.
in
C21
CK1
In this mode the output voltage is equal to the input voltage
(VC11
in) + VC11
+VC21 +…+VCK1
.
capacitors C12 + C22 +… + CK2 is smaller than voltage Vin + VC11 + CC21 +… + VC(K-1)1 through diode DK1.
In this mode the output voltage is equal to the input voltage (Vin) + VC11+VC21 +…+VCK1.
14. Switch
b of proposed magnetic component free multistage DC-DC converter is ON.
FigureFigure
14. Switch
Sb ofSproposed
magnetic component free multistage DC-DC converter is ON.
Switch S15),
b of proposed magnetic component free multistage DC-DC converter is ON.
In Figure
Mode 14.
2 (Figure
control switch Sa is turned ON and switch Sb is turned OFF, when the
Involtage
Modeacross
2 (Figure
15), control
switch
Sa capacitor
is turnedCON
and switch Sb is
is charged
turned OFF,
when the
capacitor
C11 is smaller
than
12, then capacitor C11
by capacitor
In Mode
2 (Figure
15),
control
switch
S
a is turned
ON
and
switch
S
bCis turned
OFF,
when
the
voltageC12across
capacitor
C
is
smaller
than
capacitor
C
,
then
capacitor
is
charged
by
capacitor
through diode D1211
and switch Sa. When the voltage12across capacitor C11 11
+ C21 is smaller than
the
voltage
across
capacitor
C
11 is smaller than capacitor C12, then capacitor C11 is charged by capacitor
C12 through
Sa22., When
the voltage
across capacitor
C11
C21 is smaller
than the
voltagediode
acrossDcapacitor
C12 + C
then capacitor
C22 transfers
its energy
to +capacitor
C21 through
12 and switch
C12 through diode D12 and switch Sa. When the voltage across capacitor C11 + C21 is smaller than the
and switch
Sa. +Similarly
capacitor
CK2 C
transfers
its energy
to capacitor
CK1 through
DK2
diode
D22capacitor
voltage
across
C12
C22 , then
capacitor
its energy
to capacitor
C21 through
22 transfers
voltage across capacitor C12 + C22, then capacitor C22 transfers its energy to capacitor C21 through
the switch
voltage S
across
capacitor
C
11 + C21+…+
C
k1 is smaller
than
the
voltage
C
12 +CC
22 + C
K2. In thisD
diode when
D22 and
.
Similarly
capacitor
C
transfers
its
energy
to
capacitor
through
a
Sa. Similarly capacitor K2
CK2 transfers its energy to capacitor CK1K1
through DK2 K2
diode D22 and switch
mode
the output
voltage
is equal
to+the
input
voltage
(Vsmaller
in) + VC12 + VC22 + …+ VCK2.
when the
voltage
across
capacitor
C
C
+
.
.
.
+
C
is
than
the
voltage
C
+
CK222. In
+C
11
21
12
K2 . In
k1
when the voltage across capacitor C11 + C21+…+ Ck1 is smaller than the voltage C12 +C22 + C
this
this mode
the
output
voltage
is
equal
to
the
input
voltage
(V
)
+
V
+
V
+
.
.
.
+
V
.
in
C12
C22
CK2
mode the output voltage is equal to the input voltage (Vin) + VC12 + VC22 + …+ VCK2.
Figure 15. Switch Sa of proposed magnetic component free multistage DC-DC converter is ON.
Figure
15.Analysis
Switch
a of proposed
magnetic
component
free
multistage
DC-DC
converter
is ON.
Figure
15. Gain
Switch
Sa ofSproposed
magnetic
component
multistage
DC-DC
converter
is ON.
3.2.
Voltage
of a Multistage
Converter
withoutfree
Diode
and Switches
Loss
When the voltage drop across diodes and switches are not considered, all capacitors are
subjected to the same voltage Vin. The voltage conversion ratio or voltage gain is equal to the (K + 1)
When the voltage drop across diodes and switches are not considered, all capacitors are
i.e., number
of stages
+1 across
and also
depends
number of
Figure 16a,b
depict theare
graphs
of
When
the voltage
drop
diodes
andonswitches
arecapacitors.
not considered,
all capacitors
subjected
subjected to the same voltage Vin. The voltage conversion ratio or voltage gain is equal to the (K + 1)
the
required
number
of
devices/components
versus
the
number
of
stages
in
2-dimensional
and
in
to the same
voltage
or voltage
gain Figure
is equal
to the
(K +the
1) graphs
i.e., number
in . The
i.e., number
ofV
stages
+1 voltage
and alsoconversion
depends on ratio
number
of capacitors.
16a,b
depict
of
3-dimensional view, respectively. From Figure 16a,b it is observed that the number of
of stages
and also
depends
on number of capacitors.
Figure
16a,b
graphs of theand
required
the+1
required
number
of devices/components
versus the
number
of depict
stages the
in 2-dimensional
in
devices/components linearly increases as the number of stages is increased. Thus, with each stage
number
of devices/components
versus the
number
stagesitin is
2-dimensional
andthe
in 3-dimensional
3-dimensional
view, respectively.
From
Figureof 16a,b
observed that
number of
devices/components
linearly16a,b
increases
as the number
is increased.
Thus, with each stage
view, respectively.
From Figure
it is observed
that of
thestages
number
of devices/components
linearly
3.2. Voltage Gain Analysis of a Multistage Converter without Diode and Switches Loss
3.2. Voltage
Gain Analysis of a Multistage Converter without Diode and Switches Loss
Energies 2017, 10, 719
12 of 28
increases
as2017,
the 10,
number
of stages is increased. Thus, with each stage increase two more diodes
Energies
719
12 of 28 and
capacitors are needed. It is also observed that the number of diodes is equal to the number of capacitors.
increase two more diodes and capacitors are needed. It is also observed that the number of diodes is
equal to the number of capacitors.
VC11 = VC12 = VC21 = VC22 = VCK2 = Vin
(1)
Vo = (K + 1) × Vin
(2)
KC + 2
× Vin
2
K +2
= D
× Vin
2
Vo =
(3)
Vo
(4)
KC = KD = 0.5 K
(5)
where, KC and KD number of capacitor and diode used to design the proposed circuit. The graph
of voltage gain versus number of stages is shown in Figure 17a. It is observed that the proposed
converter with K stages provides
a K + 1 voltage conversion ratio. The graph
of the number of stage
(a)
(b)
devices/components
versus
voltage
gain
is
shown
in
Figure
17b.
It
is
observed
thatview;
the (b)
number of
Figure 16. Number of devices/components versus the number of stages (a) 2-dimensional
Energies
2017,
10,
719
12 of 28
devices/components
increases as the voltage gain requirement is increased. Thus, two
diodes
3-dimensionallinearly
view.
and two capacitors need to be connected to increase voltage gain by a factor of 1. It is also observed
increase two more diodes and capacitors are needed. It is also observed that the number of diodes is
that 2equal
K diodes
2 K of
capacitors
are
to attain
to the and
number
capacitors.
V required
=V =V
= V a=voltage
V = Vgain K + 1.
C11
C12
C21
C22
CK2
in
Vo = (K + 1) × Vin
KC + 2
× Vin
2
KD + 2
Vo =
× Vin
2
Vo =
KC = KD = 0.5 K
(1)
(2)
(3)
(4)
(5)
where, KC and KD number of capacitor and diode used to design the proposed circuit. The graph of
voltage gain versus number of stages is shown in Figure 17a. It is observed that the proposed
converter with K stages provides a K + 1 voltage conversion ratio. The graph of the number of stage
(a)
(b)
devices/components versus voltage gain is shown in Figure 17b. It is observed that the number of
Figure 16. Number linearly
of devices/components
the number
stages (a) 2-dimensional
view;
(b) two
devices/components
increases as versus
the voltage
gain ofrequirement
is increased.
Thus,
Figure 16. Number of devices/components versus the number of stages (a) 2-dimensional view;
3-dimensional
view.
diodes
and two capacitors
need to be connected to increase voltage gain by a factor of 1. It is also
(b) 3-dimensional view.
observed that 2 K diodes and 2 K capacitors are required to attain a voltage gain K + 1.
VC11 = VC12 = VC21 = VC22 = VCK2 = Vin
(1)
Vo = (K + 1) × Vin
(2)
KC + 2
× Vin
2
KD + 2
Vo =
× Vin
2
Vo =
KC = KD = 0.5 K
(3)
(4)
(5)
where, KC and KD number of capacitor and diode used to design the proposed circuit. The graph of
voltage gain versus number
that the proposed
(a) of stages is shown in Figure 17a. It is observed
(b)
converter with K stages provides a K + 1 voltage conversion ratio. The graph of the number of stage
devices/components versus voltage gain isFigure
shown
Figure 17b. It is observed that the number of
17.inCont.
devices/components linearly increases as the voltage gain requirement is increased. Thus, two
diodes and two capacitors need to be connected to increase voltage gain by a factor of 1. It is also
observed that 2 K diodes and 2 K capacitors are required to attain a voltage gain K + 1.
Energies 2017, 10, 719
13 of 28
Energies 2017, 10, 719
13 of 28
(c)
(d)
Figure 17. Relations of converter parameters: (a) graph of voltage gain versus number of stages; (b)
Figure 17. Relations of converter parameters: (a) graph of voltage gain versus number of stages;
graph of the number of devices/component versus voltage gain; (c) graph of the voltage gain (Vo/Vin),
(b) graph of the number of devices/component versus voltage gain; (c) graph of the voltage gain
number of stages (K) and duty cycle (D); (d) output voltage for stage 1 to 9 for 25 V input voltage.
(Vo /Vin ), number of stages (K) and duty cycle (D); (d) output voltage for stage 1 to 9 for 25 V
inputThe
voltage.
graph of voltage gain (Vo/Vin), number of stages (K) and duty cycle (D) is shown in Figure
17c. It is observed that two capacitors and two diodes are required to design one stage of the
proposed
graph
of output
voltage for stages 1 to 9 by considering an input voltage of
The
graphconverter.
of voltageThe
gain
(Vo /V
in ), number of stages (K) and duty cycle (D) is shown in Figure 17c.
25 V is shown in Figure 17d. It is observed that the output voltage is increased as the number of
It is observed that two capacitors and two diodes are required to design one stage of the proposed
stages increases, and each stage contributes a voltage equal to the input voltage (25 V) to an output
converter. The graph of output voltage for stages 1 to 9 by considering an input voltage of 25 V is
voltage of the proposed converter.
shown in Figure 17d. It is observed that the output voltage is increased as the number of stages
increases,
and each
contributes
a voltage
equalwith
to the
input
3.3. Voltage
Gainstage
Analysis
of the Multistage
Converter
Diode
andvoltage
Switches(25
LossV) to an output voltage of
the proposed converter.
The voltage drop across power diodes and switches is ignored in medium and high power
applications, but in low power applications it is considered. The analysis of the circuit is done with
3.3. Voltage Gain Analysis of the Multistage Converter with Diode and Switches Loss
consideration of the voltage drop across diodes and switches. For simplicity, the voltage drop across
diodes
and switches
is assumed
to bediodes
equal toand
Vd. switches is ignored in medium and high power
The
voltage
drop across
power
applications, but in low power applications it is considered. The analysis of the circuit is done with
consideration of the voltage drop across
For simplicity, the voltage drop
(6) across
VC11diodes
= VC12 −and
VD12 switches.
− VSa
diodes and switches is assumed to be equal to Vd .
VC11 = Vin − 4Vd
VC11V ==VV
VD12 − VSa
C12− −
2V
C12
in
(7)
(8)
d
Vin −
−V4V=dV − 4V
VC21 = VC12 + VC22V−C11
VC11=− V
D22
Sa
in
d
V
=
V
−
2V
in
C12
d
V = V + V − V − V − V = V − 4V
(9)
(6)
(7)
(10)
(8)
VC21 = VC12 + VC22
V −=VVC11
−−
4VVD22 − VSa = Vin − 4Vd
(11)
(9)
VC22 = Vin + VC11
− =VV
Vd D21 − VSb = Vin − 4Vd
VCK2
−−4V
C12
in
(12)
(10)
C22
in
C11
C12
CK1
D21
in
Sb
in
d
d
Vin −
4Vd is equal to Vin − 4Vd except for the (11)
CK1 =each
It is investigated that the voltageVacross
capacitor
voltage across capacitor C12. The voltage across capacitor C12 is equal to Vin − 2Vd. Thus, the proposed
VCK2 = Vin − 4V
(12)
topology is self-balanced and magnetic component-free. dThe output voltage of the converter is
by the devices’
forward
voltage
andeach
number
of devices.
Itlimited
is investigated
that the
voltage
across
capacitor
is equal to Vin − 4Vd except for the voltage
The graph
output voltage
of 2V
stages
with a practical
across capacitor
C12of. the
Theproposed
voltage converter
across capacitor
C12 is versus
equal number
to Vin −
d . Thus, the proposed
diode (Vd = 1) and ideal diode is shown in Figure 18a. The graph of the proposed converter output
topology is self-balanced and magnetic component-free. The output voltage of the converter is limited
voltage versus number of diodes or capacitors with a practical diode (Vd = 1) and an ideal diode is
by the devices’ forward voltage and number of devices.
shown in Figure 18b. From Figure 18a,b it is observed that the difference between the ideal and
The
graph of the proposed converter output voltage versus number of stages with a practical
practical output voltage increases as the number of stages, diodes and capacitor requirement is
diodeincreased.
(Vd = 1) The
anddifference
ideal diode
is shown
in Figure
18a. The
graph
of thedepends
proposed
converter
between
the ideal
and practical
output
voltage
on the
number output
of
voltage
versus
number
of
diodes
or
capacitors
with
a
practical
diode
(V
=
1)
and
an
ideal diode is
d (15).
stages of the proposed converter and it is equal to 4KVd as given in Equation
shown in Figure 18b. From Figure 18a,b it is observed that the difference between the ideal and practical
output voltage increases as the number of stages, diodes and capacitor requirement is increased. The
Energies 2017, 10, 719
14 of 28
difference between the ideal and practical output voltage depends on the number of stages of the
Energiesconverter
2017, 10, 719and it is equal to 4KV as given in Equation (15).
14 of 28
proposed
d
Energies 2017, 10, 719
VC11V= V
= V=CK1
VCK1
= Vin − 4Vd
= C21
V =
= VVC22
=V
V == V
− 4V
C11
C21
C22
CK1
CK1
in
d
VVC12C12
= V= −Vin
2V− 2Vd
VC11 = VC21 = VC22 =
VCK1 in= VCK1 =d Vin − 4Vd
V0==(K(+
K1)V
+ 1)−V4KV
in − 4KVd
V
0
in
d
V
= Vin − 2V
C12
d
(13)
(14)
(13)
(15)
(14)
V0 = (K +1)Vin − 4KVd
(a)
14 of 28
(13)
(14)
(15)
(15)
(b)
Figure 18. Comparison graph considering Vin = 24 V. (a) Graph of converter output voltage versus
Figure 18. Comparison graph
converter output voltage versus
(a) considering V = 24 V. (a) Graph of(b)
number of stages (practical and ideal diode);in
(b) graph of converter output voltage versus number of
number
of
stages
(practical
and
ideal
diode);
(b)
graph
of
converter
output
voltage versus number of
diodes
capacitors (practical
and ideal diode).
Figure
18.or
Comparison
graph considering
Vin = 24 V. (a) Graph of converter output voltage versus
diodes
or
capacitors
(practical
and
ideal
diode).
number of stages (practical and ideal diode); (b) graph of converter output voltage versus number of
4. Design
of the Capacitors
of the Proposed Converter
diodes orCalculation
capacitors (practical
and ideal diode).
4. DesignTo
Calculation
the Capacitors
Converter
explain the of
designed
calculationofofthe
theProposed
proposed converter
a 1-stage proposed converter is
4. Design Calculation of the Capacitors of the Proposed Converter
considered.
The designed
power circuit
of the 1-stage
converter
is shown
in Figure
19a. The
ON
To
explain the
calculation
of theproposed
proposed
converter
a 1-stage
proposed
converter
is
state
and
OFF
state
equivalent
circuit
of
the
1-stage
proposed
converter
is
depicted
in
Figure
19b,c
To
explain
the
designed
calculation
of
the
proposed
converter
a
1-stage
proposed
converter
is
considered. The power circuit of the 1-stage proposed converter is shown in Figure 19a. The ON
respectively,
D is the
resistance
of the
diode, is
RSshown
is the forward
of the
considered.
Thewhere
powerRcircuit
offorward
the 1-stage
proposed
converter
in Figureresistance
19a. The ON
state and OFF state equivalent circuit of the 1-stage proposed converter is depicted in Figure 19b,c
switch,
ISb is state
the current
through
theof
switch
Sb and proposed
ISa is the current
through
switch in
Sa.Figure 19b,c
state
and OFF
equivalent
circuit
the 1-stage
converter
is depicted
respectively, where RD is the forward resistance of the diode, RS is the forward resistance of the switch,
respectively, where RD is the forward resistance of the diode, RS is the forward resistance of the
ISb switch,
is the current
the switch
Sb andSbISa
isIthe
current through switch S S.a.
ISb is thethrough
current through
the switch
and
Sa is the current through switch a
(a)
(a)
(b)
(c)
Figure 19. (a) Power circuit of the 1-stage proposed converter; (b) equivalent circuit of 1-stage
(b)
(c)
proposed converter when Sb is ON; (c) equivalent circuit of 1-stage proposed converter when Sa is
ON. 19. (a) Power circuit of the 1-stage proposed converter; (b) equivalent circuit of 1-stage
Figure
Figure
19. (a) Power circuit of the 1-stage proposed converter; (b) equivalent circuit of 1-stage proposed
proposed converter when Sb is ON; (c) equivalent circuit of 1-stage proposed converter when Sa is
converter
when Sb is ON; (c) equivalent circuit of 1-stage proposed converter when Sa is ON.
ON.
Energies 2017, 10, 719
15 of 28
Initially the voltage across capacitor C12 and C11 is zero. Capacitor C12 is charged through a
resistance RD and RS from a supply voltage Vin when switch Sb is closed. The voltage across C12 does
not increase to Vin instantaneously, but builds up exponentially and not linearly.
C12 d(vC12 )
(RD + RS ) + vC12
dt
d(vC12 )
dt
Vin −vC12 = (RD +RS )C12
)
Vin =
R
d(vC12 )
Vin −vC12
=
dt
(RD +RS )C12
R
t
log(Vin − VC12 ) = − (R
VC12 = Vin (1 −
iC12 =
(16)
−t
eT
D +RS )C12
+ K, K = log Vin




(17)



), T = (RD + RS )C12
C d(vC12 )
d(C12 vC12 )
= 12
dt
dt
(18)
Vin = iC12 (RD + RS ) + vC12
(19)
Similarly:
iSb =
−t
Vin
eT
(RD + RS )
(20)
Capacitor C11 is charged through a resistance RD and RS from a capacitor C12 voltage when
switch Sa is closed. Thus, when switch Sa is closed capacitors C11 and C12 is charging and
discharging, respectively.
)
VC12 = iC11 (RD + RS ) + vC1
(21)
VC12 = iC12 (RD + RS ) + vC11
C11 d(vC11 )
(RD + RS ) + vC11
dt
d(vC11 )
dt
VC12 −vC11 = (RD +RS )C11
)
VC12 =
R
d(vC11 )
VC12 −vC11
=
(22)
dt
(RD +RS )C11
R
t
log(VC12 − VC11 ) = − (R
VC11 = VC12 (1 −
−t
eT
D +RS )C11
+ K, K = log VC12
), T = (RD + RS )C11




(23)



Similarly:
iSa =
−t
VC12
eT
(RD + RS )
(24)
In steady state and at high switching frequency, the voltage across capacitor C11 and C12 at any
instant during charging is cycled as given in Equations (25) and (26) where, VC0 and VC0 is the initial
11
12
voltage of capacitor C11 and C12 . If the initial storage voltage of C11 and C12 is positive:
−t
)
VC12 = (Vin − VC0 )(1 − e T ) + VC0
12
−t
(25)
12
VC11 = (VC12 − VC0 )(1 − e T ) + VC0
11
11
If the initial storage voltage of C11 and C12 is negative:
−t
)
VC12 = (Vin + VC0 )(1 − e T ) − VC0
12
−t
12
VC11 = (VC12 + VC0 )(1 − e T ) − VC0
11
(26)
11
The time required for the capacitor C12 to attain any value of VC12 during the charging cycle is
given in Equations (27) and (28).
Energies 2017, 10, 719
16 of 28
When the initial voltage across the capacitor is positive:
t = T log(
Vin − VC0
12
Vin − VC12
) = (RD + RS )C12 log(
Vin − VC0
12
Vin − VC12
)
(27)
)
(28)
When the initial voltage across the capacitor is negative:
t = T log(
Vin + VC0
12
Vin − VC12
) = (RD + RS )C12 log(
Vin + VC0
12
Vin − VC12
The time required for the capacitor C11 to attain any value of VC11 during the charging cycle is
given in Equations (29) and (30).
When the initial voltage across the capacitor is positive:
t = T log(
VC12 − VC0
11
VC12 − VC11
) = (RD + RS )C11 log(
VC12 − VC0
11
VC12 − VC11
)
(29)
)
(30)
When the initial voltage across the capacitor is negative:
t = T log(
VC12 + VC0
11
VC12 − VC11
C12 =
) = (RD + RS )C11 log(
1
=
2πfsXC12
C11 ==
1
2πfsXC11
VC12 + VC0
11
VC12 − VC11
1
IC12
=
VC12
2πfsVC12
2πfs
IC12
1
IC11
=
=
V
2πfsVC11
2πfs C11
IC11







(31)






Voltage and current of all the capacitors are the same during the complete switching cycle. Thus
the equal rating of all capacitors is suitable to design the proposed converter whose voltage rating is
greater than the input voltage.
5. Comparison of Proposed Converter with Recent DC-DC Inductor-less Converters
In this section the proposed circuit is compared with recent transformer-less and inductor-less
DC-DC converters (discussed in Section 2 of this article) in terms of number of controlled switches,
diodes, capacitors, and voltage gain. The requirement of the number of switches to design DC-DC
converters is tabulated in Table 2.
Table 2. Number of switches required to design different DC-DC converters.
Number of Levels/Stages
Converter
Type
1
2
3
4
5
6
7
8
N
SPSC
FCMDC
MMDC
Fibonacci
Switch Mode
MMCCC
Proposed
1
2
2
4
4
1
2
4
4
6
7
8
4
2
7
6
12
10
12
7
2
10
8
20
13
16
10
2
13
10
30
16
20
13
2
16
12
42
19
24
16
2
19
14
56
22
28
19
2
22
16
72
25
32
22
2
3N − 2
2N
N(N + 1)
3N + 1
4N
3N − 2
2
It is observed that proposed converter requires less switches compared to other recent
transformer-less and inductor-less converters. It is also observed that the requirement of switches is
independent of the number of levels of the converter (only two switches are required to design the
Energies 2017, 10, 719
17 of 28
proposed converter). It is also observed that the requirement of the number of switches to design
and MMCCC is the same. The requirement of the number of diodes and number of capacitors to
design DC-DC converters is tabulated in Tables 3 and 4, respectively. It is observed that the proposed
converter requires less diodes compared to recently proposed transformer-less and inductor-less
DC-DC converters. The maximum number of diodes is required to design the Fibonacci converter.
To design SPSC and MMCCC the number of diodes requirement is the same. It is observed that the
proposed converter requires less capacitors compared to MMDCC and the switch mode converter.
The proposed converter also requires fewer components in total compared to the other converters.
In Table 5 voltage conversion ratio of recent inductor-less DC-DC converter is tabulated.
Table 3. Number of diodes required to design the DC-DC converters.
Number of Levels
Converter
Type
1
2
3
4
5
6
7
8
N
SPSC
FCMDC
MMDC
Fibonacci
Switch Mode
MMCCC
Proposed
1
2
2
4
4
1
2
4
4
6
7
6
4
4
7
6
12
10
8
7
6
10
8
20
13
10
10
8
13
10
30
16
12
13
10
16
12
42
19
14
16
12
19
14
56
22
16
19
14
22
16
72
25
18
22
16
3N − 2
2N
N(N + 1)
3N + 1
2N + 2
3N − 2
2N
Table 4. Number of capacitors required to design the DC-DC converters.
Number of Levels
Converter
Type
1
2
3
4
5
6
7
8
N
SPSC
FCMDC
MMDC
Fibonacci
Switch Mode
MMCCC
Proposed
1
1
1
1
3
1
2
2
2
3
2
5
2
4
3
3
6
3
7
3
6
4
4
10
4
9
4
8
5
5
15
5
11
5
10
6
6
21
6
13
6
12
7
7
28
7
15
7
14
8
8
36
8
17
8
16
N
N
N(N + 1)/2
N
2N + 1
N
2N
Table 5. Voltage conversion ratio of the DC-DC converters.
Number of Levels
Converter
Type
1
2
3
4
5
SPSC
FCMDC
MMDC
Fibonacci
Switch Mode
MMCCC
Proposed
1
1
1
1
2
1
2
2
2
2
3
3
2
3
3
3
3
5
4
3
4
4
4
4
8
5
4
5
5
6
7
8
N
5
6
7
8
N
5
6
7
8
N
Not feasible to design for higher levels
6
7
8
9
N+1
5
6
7
8
N
6
7
8
9
N+1
6
7
8
N
In Figure 20a–d the proposed converter is compared with DC-DC converters (discussed in
Section 2) in terms of number of switches, diodes, capacitors and voltage gain. Graphically it is also
observed that the proposed converter provides a viable solution in terms of number of components.
In Table 6 the proposed converter is compared in terms of cost. It is calculated that the proposed
converter required less cost compared to other DC-DC converters. Only two switches are required to
design an N-stage proposed converter hence it requires a simple control circuit.
In Figure 20a–d the proposed converter is compared with DC-DC converters (discussed in
Section 2) in terms of number of switches, diodes, capacitors and voltage gain. Graphically it is also
observed that the proposed converter provides a viable solution in terms of number of components.
In Table 6 the proposed converter is compared in terms of cost. It is calculated that the proposed
Energies
2017, 10, 719
18 of 28
converter
required less cost compared to other DC-DC converters. Only two switches are required to
design an N-stage proposed converter hence it requires a simple control circuit.
(a)
(b)
(c)
(d)
Figure 20. Comparison of the proposed converter with recent transformer-less and inductor-less
Figure
20. Comparison
proposed
recent transformer-less
andnumber
inductor-less
converters
(Discussedofinthe
Section
2) (a)converter
Graph ofwith
the number
of switches versus
of
levels/stages;
(b)
graph
of
the
number
of
diodes
versus
number
of
levels/stages;
(c)
graph
of
the
converters (Discussed in Section 2) (a) Graph of the number of switches versus number of levels/stages;
number
capacitors
versus
numberversus
of levels/stages;
of the voltage
versus of
(b) graph
of ofthe
number
of diodes
number (d)
of graph
levels/stages;
(c) conversion
graph of ratio
the number
number
of
levels/stages.
(A:
SPSC,
B:
FCMDC,
C:
MMDC,
D:
Fibonacci,
E:
switch
mode,
F:
MMCCC,
capacitors versus number of levels/stages; (d) graph of the voltage conversion ratio versus number of
G: proposed converter).
levels/stages. (A: SPSC, B: FCMDC, C: MMDC, D: Fibonacci, E: switch mode, F: MMCCC, G: proposed
converter).
Table 6. Cost of the proposed and recent DC-DC converters (discussed in Section 2).
Converter
Table 6.
SPSC
FCMDC
Converter
MMDCC
Fibonacci
SPSC
Switch Mode
FCMDC
MMCCC
MMDCC
Proposed
Fibonacci
Switch Mode
MMCCC
Proposed
Cost of the Converter
Cost of the proposed and recent DC-DC
converters (discussed in Section 2).
(3N − 2) (Cost of each switch + cost of each diode) + N (cost of each capacitor)
2N (Cost of each switch + cost of each diode) + N (cost of each capacitor)
Cost
ofofthe
Converter
N(N + 1){(Cost of each switch
+ cost
each
diode) + 0.5 (cost of each capacitor)}
(3N + 1) (Cost of each switch + cost of each diode) +N (cost of each capacitor)
(3N4N−(Cost
2) (Cost
of each switch + cost of each diode) + N (cost of each capacitor)
of each switch) + 2(N + 1)(cost of each diode) + (2N + 1) (cost of each capacitor)
2N (Cost
of(Cost
eachofswitch
+ cost
ofofeach
(cost
of each
capacitor)
(3N − 2)
each switch
+ cost
eachdiode)
diode) + +
NN
(cost
of each
capacitor)
N(N + 1){(Cost
switch+2N
+ cost
eachdiode
diode)
+ of
0.5each
(cost
of each capacitor)}
2 (Costofofeach
each switch)
(costof
of each
+ cost
capacitor)
(3N + 1) (Cost of each switch + cost of each diode) +N (cost of each capacitor)
4N (Cost of each switch) + 2(N + 1)(cost of each diode) + (2N + 1) (cost of each capacitor)
(3N − 2) (Cost of each switch + cost of each diode) + N (cost of each capacitor)
2 (Cost of each switch) +2N (cost of each diode + cost of each capacitor)
6. Experimental and Simulation Results of the Proposed Self-Balanced and Magnetic
Component-Free Multistage DC-DC Converter
The proposed self-balanced and magnetic component-free multistage DC-DC converter simulation
and experimental results are discussed in this section. The proposed multistage converter has been
designed for four stages with rated power 60 W, switching frequency 100 kHz, output voltage is 100 V
and the supply voltage is 24 V. Switches Sa (here S1 ) and Sb (here S2 ) are operated complementarily
with a 50% duty cycle. High switching frequency is used to reduce the rating of the capacitor.
Component-Free
Multistage
DC-DC
Converter
6. Experimental and
Simulation
Results
of the Proposed Self-Balanced and Magnetic
Component-Free Multistage DC-DC Converter
The proposed self-balanced and magnetic component-free multistage DC-DC converter
simulation
and experimental
results are
in this
section. The proposed
multistage
The proposed
self-balanced
anddiscussed
magnetic
component-free
multistage
DC-DC converter
converter
has
been designed
for four stages
with
rated power
60 W,
switching
frequency
100 kHz,converter
output
simulation
and experimental
results
are discussed
in this
section.
The proposed
multistage
voltage
is 100
V and for
the four
supply
voltage
24 V.power
Switches
Sa (here
S1) and
Sb (here S100
2) are
operated
has been
designed
stages
withisrated
60 W,
switching
frequency
kHz,
output
Energies 2017, 10, 719
19 of 28
complementarily
a 50%
duty voltage
cycle. High
frequency
to Sreduce
of the
voltage is 100 V with
and the
supply
is 24switching
V. Switches
Sa (hereisSused
1) and
b (herethe
S2) rating
are operated
capacitor.
complementarily with a 50% duty cycle. High switching frequency is used to reduce the rating of the
The output voltage and current waveform with ideal components (voltage drop across the
capacitor.
The
output voltage and current waveform with ideal components (voltage drop across the switch
switchThe
andoutput
the diode
is zero)
shownwaveform
in Figure with
21a. Itideal
is observed
that the
settling
time
for the
voltage
and iscurrent
components
(voltage
drop
across
the
and the diode is zero) is shown in Figure 21a. It is observed that the settling time for the output voltage
output
the proposed
ideal 21a.
components
(forward
of the
diode
is
switchvoltage
and theofdiode
is zero) converter
is shown with
in Figure
It is observed
thatresistance
the settling
time
for the
of the0)proposed
converter
with
ideal
components
(forward
resistance
of the diode
0)ofisthe
less
than 2 ms.
is lessvoltage
than
2 ms.
The
effect
ofconverter
voltage
drop
the diode
is analyzed
in the is
previous
section.
output
of the
proposed
withacross
ideal components
(forward resistance
diode is
The effect
of
voltage
across
the
diode
is drop
analyzed
previous
section.
The
output
The
voltage
current
waveform
(assuming
1 the
Vthe
voltage
drop
acrossin
the
switch
andvoltage
diode)
0) isoutput
less
than
2 drop
ms.and
The
effect
of
voltage
acrossin
diode
is
analyzed
the
previous
section.and
current
waveform
(assuming
1
V
voltage
drop
across
the
switch
and
diode)
are
shown
in
Figure
are
shown
involtage
Figure 21b.
The
output
and current waveform (assuming 1 V voltage drop across the switch and diode)21b.
are shown in Figure 21b.
(a)
(b)
(a)
(b)
Figure 21. Simulation results (a) Output voltage and current waveform with ideal components and
Figure 21. Simulation results (a) Output voltage and current waveform with ideal components and Vin
VFigure
in = 24 V;
Output voltage
with
practical
components
and V
in = 24 V.
21.(b)
Simulation
resultsand
(a) current
Output waveform
voltage and
current
waveform
with ideal
components
and
= 24 V; (b) Output voltage and current waveform with practical components and Vin = 24 V.
Vin = 24 V; (b) Output voltage and current waveform with practical components and Vin = 24 V.
It is observed that the settling time for the output voltage of the proposed converter with
issettling
approximately
4 the
msfor
due
to output
the
forward
resistance
of the
diode
and
switch.
It iscomponents
observed
that
the settling
time
the
voltage
of
the proposed
converter
with
Itpractical
is observed
that the
time for
output
voltage
of the
proposed
converter
with
practical
Thus,
theispractical
waveform
from
because
theof
time
(RDswitch.
+ RS)Thus,
practical
components
is approximately
4 the
ms
due
towaveform
the forward
resistance
theconstant
diode
components
approximately
4differs
ms due
to
theideal
forward
resistance
ofofthe
diode
and and
switch.
CThus,
as explained
in waveform
Section 4. differs
The output
power
and switch
are shown
the
practical
ideal waveform
because
thevoltage
time
constant
+ in
RS)
the practical
waveform
differs from
thefrom
idealthe
waveform
because
of theoftime
constant
(RD(R+D R
S ) C as
Figure
respectively.
The4.output
voltagepower
and input
voltage and
waveform
idealare
components
C as 22a,b,
explained
in Section
The output
waveform
switchwith
voltage
shown in
explained in Section 4. The output power waveform and switch voltage are shown in Figure 22a,b,
(voltage
drop across
the switch
the voltage
diode isand
zero)
are voltage
shown in
Figure 22c.
The
output
voltage
Figure 22a,b,
respectively.
The and
output
input
waveform
with
ideal
components
respectively.
The
output
voltage
and
input
voltage
waveform
with
ideal
components
(voltage
drop
and
input drop
voltage
waveform
(assuming
a 1diode
V voltage
drop
theinswitch
are shown
in
(voltage
across
the switch
and the
is zero)
areacross
shown
Figureand
22c.diode)
The output
voltage
acrossFigure
the
switch
and
the
diode
is
zero)
are
shown
in
Figure
22c.
The
output
voltage
and
input
voltage
22d. voltage waveform (assuming a 1 V voltage drop across the switch and diode) are shown in
and input
waveform
(assuming
a 1 V voltage drop across the switch and diode) are shown in Figure 22d.
Figure
22d.
(a)
(b)
(a)
(b)
Figure 22. Cont.
Energies 2017, 10, 719
20 of 28
Energies 2017, 10, 719
20 of 28
(c)
(d)
(e)
(f)
Figure 22. Simulation results (a) Output power of proposed converter; (b) Gate pulses to control
Figure 22.
Simulation
resultsand
(a) drain
Output
power
of converter;
proposed(c)converter;
(b) Gate
pulses
to control
switches
of the converter
to source
of the
Output voltage
and input
voltage
switcheswaveform
of the converter
and
drain
to
source
of
the
converter;
(c)
Output
voltage
and
input
with ideal components; (d) Output voltage and input voltage waveform with practicalvoltage
waveform
with ideal
components;
(d) Output
waveform
practical
D31 and Dand
41; (f) input
Voltagevoltage
across diode
D12, D22,with
D32 and
components;
(e) Voltage
across diode
D11, D21, voltage
D42. (e) Voltage across diode D11 , D21 , D31 and D41 ; (f) Voltage across diode D12 , D22 , D32
components;
and D42 .
It is observed that 120 V output voltage is achieved from a 24 V input supply. Thus, ideally
the voltage gain of the proposed converter is 5, which is equal to the number of stages +1. When
the voltage drop across the diode is considered, an output voltage of 100 V is achieved from a 24 V
supply. The voltage across the switch is equal to the input supply voltage (24 V). The voltage across all
capacitors is same, which is equal to the input supply voltage (24 V) if the voltage drop across the diode
Energies 2017, 10, 719
21 of 28
It is observed that 120 V output voltage is achieved from a 24 V input supply. Thus, ideally the
Energies 2017,
10, 719
voltage
gain of the proposed converter is 5, which is equal to the number of stages +1. When the 21 of 28
voltage drop across the diode is considered, an output voltage of 100 V is achieved from a 24 V
supply. The voltage across the switch is equal to the input supply voltage (24 V). The voltage across
all capacitors
is same,
which
is equal
the input
supply
voltage
(24 V)the
if the
voltage
drop across
the The
is not considered.
The
voltage
across
all to
diodes
is same
(24
V) when
diode
is reversebiased.
diode is
not considered.
voltage22e–f.
acrossThe
all diodes
is across
same (24
when the diode
is reversevoltage across
diodes
is shown The
in Figure
voltage
theV)capacitors
is shown
in Figure 23.
biased.4-stage
The voltage
across diodes
shown inDC-DC
Figure 22e–f.
The voltage
across theexperimentally
capacitors is and
The proposed
self-balanced
and is
magnetic
converter
is investigated
shown
in 719
Figure 23. The proposed 4-stage self-balanced and magnetic DC-DC converter
is28
Energies
2017,
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the result shows a good match with the simulation results. The hardware components are
listed
in
investigated experimentally and the result shows a good match with the simulation results. The
Table 7. hardware components are listed in Table 7.
It is observed that 120 V output voltage is achieved from a 24 V input supply. Thus, ideally the
voltage gain of the proposed converter is 5, which is equal to the number of stages +1. When the
voltage drop across the diode is considered, an output voltage of 100 V is achieved from a 24 V
supply. The voltage across the switch is equal to the input supply voltage (24 V). The voltage across
all capacitors is same, which is equal to the input supply voltage (24 V) if the voltage drop across the
diode is not considered. The voltage across all diodes is same (24 V) when the diode is reversebiased. The voltage across diodes is shown in Figure 22e–f. The voltage across the capacitors is
shown in Figure 23. The proposed 4-stage self-balanced and magnetic DC-DC converter is
investigated experimentally and the result shows a good match with the simulation results. The
hardware components are listed in Table 7.
23. across
Voltagecapacitor
across capacitor
C41, ,CC
31, C21 C11, C42, C32, C22 and C12 (Top to bottom in figure).
Figure 23.Figure
Voltage
C41 , C
31
21 C11 , C42 , C32 , C22 and C12 (Top to bottom in figure).
PIC18F45K20 is used to generate pulses and TLP250 is used as driver IC. The hardware
Table
7. Hardware
prototype of the
proposed
convertercomponent
is shown indetails
Figureof
24.the proposed converter.
Sr/No
Components
Value
No. of Components
1
2
3
4
5
Switch (S1 and S2 )
Diodes
Capacitors
Load
Gate Driver IC
IRF250 (0.085 ON sate resistance)
BYQ28E
220 µF, 50 V
168 Ω, 60 W
TLP250
2
8
8
1
2
Figure 23. Voltage across capacitor C41, C31, C21 C11, C42, C32, C22 and C12 (Top to bottom in figure).
PIC18F45K20 is used to generate pulses and TLP250 is used as driver IC. The hardware prototype
PIC18F45K20 is used to generate pulses and TLP250 is used as driver IC. The hardware
of theprototype
proposed
converter is shown in Figure 24.
of the proposed converter is shown in Figure 24.
Figure 24. Hardware prototype of the proposed DC-DC converter.
Figure
Hardwareprototype
prototype of the
converter.
Figure
24.24.
Hardware
theproposed
proposedDC-DC
DC-DC
converter.
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Pulses are generated from a PIC controller and the gate driver output is shown in Figure 25a,b,
Pulses are generated from a PIC controller and the gate driver output is shown in Figure 25a,b,
respectively.
Output voltage and input voltage waveform are shown in Figure 25c. It is observed that
respectively. Output voltage and input voltage waveform are shown in Figure 25c. It is observed
100 Vthat
output
achieved
from a from
24 V ainput
supply.
100 Visoutput
is achieved
24 V input
supply.
(a)
(b)
(c)
(d)
Figure 25. (a) PIC controller output; (b) TLP 250 gate driver output; (c) Output voltage and input
Figure 25. (a) PIC controller output; (b) TLP 250 gate driver output; (c) Output voltage and input
voltage waveform; (d) Output current waveforms.
voltage waveform; (d) Output current waveforms.
Table 7. Hardware component details of the proposed converter.
The output
waveform is shown in FigureValue
25d and it is observedNo.
that
the output current is
Sr/No current
Components
of Components
0.619 A. The 1voltageSwitch
across
is shown
in Figure
26a–h. It is observed
(S1each
and S2capacitor
)
IRF250
(0.085 ON
sate resistance)
2 that the voltage
2
Diodes the same and slightlyBYQ28E
across each capacitor
is nearly
less than the input voltage 248V (an effect of the
3
Capacitors
220 μF, 50 V
8
diode). Voltage stress across each diode is shown in Figure 27a–h. It is observed that the voltage stress
4
Load
168 Ω, 60 W
1
across the diode
is approximately
voltage across the diode is
5
Gate Driver IC the same and the peak
TLP250
2 slightly less than
the input voltage (24 V) (an effect of the voltage drop). The voltages of all capacitors and all diodes
The output
waveform
is shownofinthe
Figure
25dand
and switch.
it is observed
that thestages
output(source
current side)
differ slightly
due tocurrent
the forward
resistance
diode
The lower
is 0.619are
A. charged
The voltage
across the
eachpath
capacitor
is shown
in less
Figure
26a–h.whereas
It is observed
the voltage
capacitors
through
which
contain
diodes
as thethat
number
of stages
across
each
capacitor
is
nearly
the
same
and
slightly
less
than
the
input
voltage
24
V
(an
effect
of
increases the path followed for the charging of higher stage (moving towards load) capacitors the
contain
stress acrossa each
is shown
in Figure in
27a–h.
It is observed
the voltage
morediode).
diodes.Voltage
Thus, practically
slightdiode
difference
is observed
the voltage
of thethat
capacitors.
stress across the diode is approximately the same and the peak voltage across the diode is slightly
less than the input voltage (24 V) (an effect of the voltage drop). The voltages of all capacitors and all
diodes differ slightly due to the forward resistance of the diode and switch. The lower stages (source
side) capacitors are charged through the path which contain less diodes whereas as the number of
stages increases the path followed for the charging of higher stage (moving towards load) capacitors
contain more diodes. Thus, practically a slight difference is observed in the voltage of the capacitors.
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(a) VC11 = 21.0 V
(b) VC12 = 22.3 V
(c) VC21 = 19.4 V
(d) VC22 = 20.3 V
(e) VC31 = 18.6 V
(f) VC32 = 18.8 V
(g) VC41 = 18.4 V
(h) VC42 = 18.8 V
Figure 26. Capacitors voltage (a) C11 (b) C12 (c) C21 (d) C22 (e) C31 (f) C32 (g) C41 (h) C42.
Figure 26. Capacitors voltage (a) C11 (b) C12 (c) C21 (d) C22 (e) C31 (f) C32 (g) C41 (h) C42 .
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(a) Mean VD11 = −11.8 V
(b) Mean VD12 = −10.5 V
(c) Mean VD21 = −10.5 V
(d) Mean VD22 = −10 V
(e) Mean VD31 = −9.23 V
(f) Mean VD32 = −9.69 V
(g) Mean VD41 = −8.85 V
(h) Mean VD42 = −9.24 V
Figure 27. Voltage across diodes (a) D11 (b) D12 (c) D21 (d) D22 (e) D31 (f) D32 (g) D41 (h) D42.
Figure 27. Voltage across diodes (a) D11 (b) D12 (c) D21 (d) D22 (e) D31 (f) D32 (g) D41 (h) D42 .
7. Conclusions
7. Conclusions
The self-biased and magnetic-free multistage step-up converter is articulated and designed for
unidirectional
renewable
photovoltaic multistage
applications.step-up
The proposed
converter
is well suited
for
The
self-biased
and magnetic-free
converter
is articulated
and designed
for unidirectional renewable photovoltaic applications. The proposed converter is well suited for
renewable photovoltaic applications where the voltage needs to be stepped up without using magnetic
components. The proposed converter also provides a viable solution to improve the photovoltaic
Energies 2017, 10, 719
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systems in term of modularity, cost and control. The proposed converter is suitable for the DC
link applications in DC-AC systems where capacitor voltage balancing is the main challenge. The
proposed converter also provides a viable solution for low power applications, since the inductor and
transformer are not required to design the proposed converter. Also Maximum Power Point Tracking
(MPPT) can be easily implemented to improve the efficiency of the converter. The voltage across
the switch is less; hence low voltage switches are used for designing high voltage converters. The
conspicuous features of the proposed topology are:
(i)
(ii)
(iii)
(iv)
(v)
(vi)
Magnetic component-free (transformer-less and inductor-less)
Continuous input current
Low voltage rating semiconductor devices and capacitors
Modularity
Easy to add a higher number of levels to increase the voltage
Only two control switches with alternating operation and simple control are needed.
The proposed converter has been designed with a rated power of 60 W, the input voltage is 24 V,
the output voltage is 100 V and the switching frequency is 100 kHz. High switching frequency has
been used to decrease the component size. The performance of the proposed converter is verified
through simulation and experimental results.
Author Contributions: M.S.B. and S.P. developed the proposed research concept with the complete theoretical
background study. Further hardware prototype implementation tasks are carried out the same authors. F.B. has
contributed his expertise to validate the proposal both theoretical background and hardware results obtained as
co-author. All authors involved in framing its current format of the full research paper work.
Conflicts of Interest: The authors declare no conflict of interest.
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