Download EET307: TRIAC+ lamp dimmer application msw

TRIACS
The Triac is a three-terminal bilateral bipolar semiconductor switch.
MT1
The terms “anode” and “cathode” used for unilateral device terminals
have no meaning and are replaced by MT (Main Terminal).
MT1 and MT2 are the current-carrying terminals.
G is the gate terminal used to triggering the Triac.
G
MT2
MT1 is standardised as the reference point for currents and voltages.
MT1
TRIAC p-n STRUCTURE
G
The triac is a five-layer device
The region between MT1 and MT2 is a P-N-P-N switch (SCR) in parallel
with a N-P-N-P switch (complementary SCR).
MT2
TRIAC 2 INVERSE PARALLEL SCRs EQUIVALENT
EET307 POWER ELECTRONICS 1
TRIAC
1
Prof R T Kennedy
2006-2007
TRIAC GATE TRIGGERING
The Triac differs from the SCR in that either a positive or negative gate signal will trigger conduction.
The Triac conducts in either direction and can be triggered with either a positive or negative gate
signal providing four possible triggering modes.
Quadrant 1:
MT2 → MT1 (+)
G → MT1 (+)
positive MT2 voltage and positive gate current.
Quadrant 11:
MT2 → MT1 (+)
G → MT1 (-)
positive MT2 voltage and negative gate current.
Quadrant 111: MT2 → MT1 (-)
G → MT1 (-)
negative MT2 voltage and negative gate current.
Quadrant 1V: MT2 → MT1 (-)
G → MT1 (+)
negative MT2 voltage and positive gate current.
GATE SENSITIVITY (how easy to trigger!)
Triacs are most sensitive in quadrants I and III
Triacs are slightly less sensitive in quadrant II and much less sensitive in quadrant IV
Quadrant IV is not recommended.
Optimum triac gate sensitivity is achieved when operating in Quadrants I and III due to the inherent
thyristor chip construction.
EET307 POWER ELECTRONICS 1
TRIAC
2
Prof R T Kennedy
2006-2007
TRIAC OPERATION
TRIAC CHARACTERISTIC
BLOCKING
JUNCTION
MT2 -ve
EET307 POWER ELECTRONICS 1
TRIAC
MT2 +ve
3
BLOCKING
JUNCTION
Prof R T Kennedy
2006-2007
TRIAC TERMINOLOGY
STATIC dV
Critical Rate-of-rise of OFF-state Voltage
dt
Minimum value of the rate-of-rise of principal voltage that will cause switching from off to on state.
Static dV is the minimum rate-of-rise of off-state voltage that a device will hold off, with gate open,
dt
without turning on.
COMMUTATING  dV 
 dt 
 C
Critical Rate-of-rise of Commutation Voltage
Minimum value of the rate-of-rise of principal voltage which will cause switching from the off state to
the on state immediately following on-state current conduction in the opposite quadrant.
Commutating  dV 
 dt 
 C
is the rate-of-rise of voltage across the main terminals that a Triac can support
(block without switching back on) when commutating from the on state in one half cycle to the off
state in the opposite half cycle.
Considering the structure of a triac the conduction zones, corresponding to the equivalent anti-parallel
SCRs narrowly overlap each other and the control zone and this gives rise to a problem.
Commutation Problem
During the conduction time a certain quantity of charges is injected into the structure.
During turn-off of one zone an excess charge remains, particularly in the region of the gate, and this
can in certain cases result in the firing of the other conduction zone at the moment when the supply
voltage of the circuit is reapplied across the triac. This is the problem of commutation.
The Triac switching behavior depends on
(i) The charge that remains at the moment when the current drops to zero and depends on the value of
the current which was circulating in the triac approximately 100 s before cut-off. (This time
corresponds to two or three times the life time of the minority carriers).
di
The slope of the decreasing current is called the commutating rate of change of current  
dt
 
C
(ii) The reapplied voltage at the moment when the triac turns off is called the commutating rate of
reapplied voltage 
dV 

 dt  C
A capacitive current proportional to the commutating rate of reapplied voltage appears in the same way
as the SCR but it is now dependent on the commutating rate of change of current.
C-R snubbers need to be considered with inductive loads!
EET307 POWER ELECTRONICS 1
TRIAC
4
Prof R T Kennedy
2006-2007
LATCHING CURRENT
Latching current is the minimum principal current required to maintain the Triac in the on state
immediately after switching from off to on state has occurred and the triggering signal is removed.
Latching current for Triacs are, like gate current for triggering, operation quadrant dependent.
HOLDING CURRENT
Holding current is the minimum principal current required to maintain the Triac in the on state.
TRIGGERING v LATCHING v HOLDING CURRENTS
EET307 POWER ELECTRONICS 1
TRIAC
5
Prof R T Kennedy
2006-2007
TRIAC TRIGGERING
DIAC
The construction of a DIAC is similar to an open base NPN transistor.
The bidirectional transistor-like structure exhibits a high-impedance blocking state up to a voltage
breakover point (VBO) above which the device enters a negative-resistance region.
The DIAC is a good economical trigger for firing Triacs and provides an economical, versatile and
accurate control of ac power in phase control circuits such as light dimmers and motor speed controls.
TRIAC APPLICATIONS
TRIAC AC PHASE ANGLE CONTROL
L1 C1 interference suppression
R3 C3 snubber
The L-C filter can produce oscillations that can result in Triac current < Iholding  FLICKER
SELECT a LOW HOLDING CURRENT TRIAC
EET307 POWER ELECTRONICS 1
TRIAC
6
Prof R T Kennedy
2006-2007
TRIAC- DIAC LAMP DIMMER
I in
I in

RV
V in

V in
VC
VR
Iin leads Vin by 
VC
C
VC lags Iin by 90o
VC lags Vin by 
DIAC
VBO,min
VBO,max
RV
V in
VC
DB3
C
Vin
VC
+ VBO
-VBO


EET307 POWER ELECTRONICS 1
TRIAC
7
Prof R T Kennedy
2006-2007
LAMP DIMMER ANALYSIS
DIAC
VBO,min
VBO,max
RV
V in
VC
DB3
C
VC
tan 
RV,max
VC and Vin in phase
VC lags Vin by 
CR

 0
 tan 1 ( C R))

XC 
RV,min = 0
1
C
Z  R 2  ( X C )2
VC , pk  Vin. pk 
V BO

XC
Z
VC , pk  sin 


V

 sin 1  BO 
VC , pk 
   
EET307 POWER ELECTRONICS 1
TRIAC
8
Prof R T Kennedy
2006-2007