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4. Circuit Theorems with Phasors
PROPORTIONALITY
The proportionality property states that phasor output responses are proportional
to the input phasor. Mathematically, proportionality means that
Eq.(8-28)
where X is the input phasor, Y is the output phasor, and K is the proportionality
constant. In phasor circuit analysis, the proportionality constant is generally a
complex number.
To apply the unit output method in the phasor domain, we assume that the output
is a unit phasor Y= 1
0 . By successive application of KCL, KVL, and the
element impedances, we solve for the input phasor required to produce the unit
output. Because the circuit is linear, the proportionality constant relating input
and output is
Once we have the constant K, we can find the output for any input or the input
required to produce any specified output.
The next example illustrates the unit output method for phasor circuits.
1
EXAMPLE 8-13
Use the unit output method to find the input impedance, current I1, output voltage
VC, and current I3 of the circuit in Fig. 8-20 for Vs=
SOLUTION:
The following steps implement the unit output method for the circuit in Fig. 8-20:
Fig. 8-20
1.
Assume a unit output voltage
2.
3.
4.
By Ohm's law,
By KVL,
By Ohm's law,
5.
6.
By KCL,
By KCL,
.
.
.
Given VS and I1, the input impedance is
2
The proportionality factor between the input VS and output voltage Vc is
Given K and ZIN, we can now calculate the required responses for an input
SUPERPOSITION
The superposition principle applies to phasor responses only if all of the
independent sources driving the circuit have the same frequency. That is , when
the input sources have the same frequency, we can find the phasor response
due to each source acting alone and obtain the total response by adding the
individual phasors. If the sources have different frequencies, then superposition
can still be used but its application is different. With different frequency sources,
each source must be treated in a separate steady-state analysis because the
element impedances change with frequency. The phasor response for each
source must be changed into waveforms and then superposition applied in the
time domain. In other words, the superposition principle always applies in the
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time domain. It also applies in the phasor domain when all independent sources
have the same frequency. The following examples illustrate both cases.
EXAMPLE 8-14
Fig. 8-21
Use superposition to find the steady - state voltage vR (t) in Fig. 8 - 21 for R=20
, L1 = 2mH, L2 = 6mH, C = 20
F, V s1= 100cos 5000t V , and Vs2=120cos (5000t
+30 )V.
SOLUTION:
In this example, the two sources operate at the same frequency. Fig. 8-22(a)
shows the phasor domain circuit with source no.2 turned off and replaced by a
short circuit. The three elements in parallel in Fig. 8-22(a) produce an equivalent
impedance of
4
Fig. 8-22
By voltage division, the phasor response VR1 is
5
Fig. 8-22(b) shows the phasor-domain circuit with source no.1 turned off and
source no. 2 on. The three elements in parallel in Fig. 8-22(b) produce an
equivalent impedance of
By voltage division, the response VR2 is
Since the sources have the same frequency, the total response can be found by
adding the individual phasor responses VR1 and VR2:
The time-domain function corresponding to the phasor sum is
The overall response can also be obtained by adding the time-domain functions
corresponding to the individual phasor responses VR1 and VR2:
You are encouraged to show that the two expressions for VR(t) are equivalent
using the additive property of sinusoids.
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EXAMPLE 8-15
Fig. 8-23
Use superposition to find the steady-state current i(t) in Fig. 8-23 for R=10k
,L=200mH, vS1=24cos20000t V, and vS2=8cos(60000t+30 ).
SOLUTION:
In this example the two sources operate at different frequencies. With source no.
2 off, the input phasor is Vs1 = 24
0 V at a frequency of
=20 krad/s . At this
frequency the equivalent impedance of the inductor and resistor is
The phasor current due to source no.1 is
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With source no.1 off and no.2 on, the input phasor VS2 = 8
of
30 at a frequency
= 60 krad/s. At this frequency the equivalent impedance of the inductor and
resistor is
The phasor current due to source no.2 is
The two input sources operate at different frequencies, so that phasors
responses I1 and I2 cannot be added to obtain the overall response. In this case
the overall response is obtained by adding the corresponding time-domain
functions.
THEVENIN AND NORTON EQUIVALENT CIRCUITS
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Fig. 8-24 Thevenin and Norton equivalent circuits in the phasor analysis
In the phasor domain, a two-terminal circuit containing linear elements and
sources can be replaced by the Thevenin or Norton equivalent circuits shown in
Fig. 8-24. The general concept of Thevenin's and Norton's theorems and their
restrictions are the same as in the resistive circuit studied in Chapter 3. The
important difference here is that the signals VT, IN, V, and I are phasors, and
VT=1/YN and ZL are complex numbers representing the source and load
impedances.
Finding the Thevenin or Norton equivalent of a phasor circuit involves the same
process as for resistance circuits, except that now we must manipulate complex
numbers. The thevenin and Norton circuits are equivalent to each other, so their
circuit parameters are related as follows:
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Eq.(8-29)
Algebraically, the results in Eq.(8-29) are identical to the corresponding
equations for resistance circuits. The important difference is that these equations
involve phasors and impedances rather than waveforms and resistances. These
equations point out that we can determine a Thevenin or Norton equivalent by
finding any two of the following quantities: (1) the open-circuit voltage VOC, (2) the
short-circuit current ISC, and (when there are no dependent sources) (3) the
impedance ZT looking back into the source circuit with all independent sources
turned off.
The relationships in Eq. (8-29) define source transformations that allow us to
convert a voltage source in series with an impedance into a current source in
parallel with the same impedance, or vice versa. Phasor-domain source
transformations simplify circuits and are useful in formulating general nodevoltage or mesh-current equations, discussed in the next section.
The next two examples illustrate applications of source transformation and
Thevenin equivalent circuits.
EXAMPLE 8-17
Both sources in Fig. 8-25(a) operate at a frequency of
=5000 rad/s. Find the
steady-state voltage vR(t) using source transformations.
10
SOLUTION:
Example 8-14 solves this problem using superposition. In this example we use
source transformations. We observe that the voltage sources in Fig. 8-25(a) are
connected in series with an impedance and can be converted into the following
equivalent current sources:
Fig. 8-25
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Fig. 8-25 (b) shows the circuit after these two source transformations. The two
current sources are connected in parallel and can be replaced by a single
equivalent current source:
The four passive elements are connected in parallel and can be replaced by an
equivalent impedance:
The voltage across this equivalent impedance equals VR,since one of the parallel
elements is the resistor R. Therefore, the unknown phasor voltage is
The value of VR is the same as found in Example 8-14 using superposition. The
corresponding time-domain function is
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EXAMPLE 8-18
Use Thevenin's theorem to find the current Ix in the bridge circuit shown in Fig. 826.
Fig. 8-26
SOLUTION:
Example 8-12 solves this problem using a
-to-Y transformation. In this
example, we determine Ix by find the Thevenin equivalent circuit seen by the
impedance j200. The Thevenin equivalent will be found by determining the opencircuit voltage and the lookback impedance.
Disconnecting the impedance j200 form the circuit in Fig. 8-26 produces the
circuit shown in Fig. 8-27(a). The voltage between nodes A and B is the
Thevenin voltage since removing the impedance j200 leaves an open circuit. The
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voltages at nodes A and B can each be found by voltage division. Since the
open-circuit voltage is the difference between these node voltages, we have
Fig. 8-27
Turning off the voltage source in Fig. 8-27(a) and replacing it by a short circuit
produces the situation shown in Fig. 8-27(b). The lookback impedance seen at
the interface is a series connection of two pairs of elements connected in parallel.
The equivalent impedance of the series/parallel combination is
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Given the Thevenin equivalent circuit, we treat the impedance j200 as a load
connected at the interface and calculate the resulting load current Ix as
The value of Ix found here is the same as the answer obtained in Example 8-12
using a
-to Y transformation.
2. Phasor Circuit Analysis
Phasor circuit analysis is a method of finding sinusoidal steady-state responses
directly from the circuit without using differential equations. How do we perform
phasor circuit analysis? At several points in our study we have seen that circuit
analysis is based on two kinds of constraints: (1) connection constraints
(Kirchhoff's laws), (2) device constraints (element equations). To analyze phasor
circuits, we must see how these constraints are expressed in phasor form.
Connection Constraints in Phasor Form
In the steady state all of the voltages and currents are sinusoids with the same
frequency as the driving force. Under these conditions, the application of KVL
around a loop could take the form.
Therefore, if the sum of the waveforms is zero, then the corresponding phasors
must also sum to zero.
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Clearly the same result applies to phasor currents and KCL. In other words, we
can state Kirchhoff's laws in phasor form as follows:
KVL: The algebraic sum of phasor voltages around a loop is zero.
KCL: The algebraic sum of phasor currents at a node is zero.
Device Constraints in Phasor Form
Eq.(8-12)
In the sinusoidal steady state, all of these currents and voltages are sinusoids.
Given that the signals are sinusoid, how do these i-v relationships constrain the
corresponding phasors?
This relationship holds only if the phasor voltage and current for a resistor are
related as
Eq.(8-13)
Since L is a real constant, moving it inside the real part operation does not
change things. Written this way, we see that the phasor voltage and current for
an inductor are related as
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Eq.(8-14)
Fig. 8-3: Phasor iv characteristics of the inductor
The resulting phasor diagram in Fig. 8-3 shows that the inductor voltage current
are 90
is
advanced
out of phase. The voltage phasor
by
90
counterclockwise,
which is in the direction of rotation of the complex exponential
.
When the voltage phasor is advanced counterclockwise(that is, ahead of the
rotating current phasor), we say that the voltage phasor leads the current phasor
by 90
the voltage by 90
or, equivalently, the current lags
.
The phasor voltage and current for a capacitor are related as
Solving for VC yields
17
Eq.(8-15)
Fig. 8-4: Phasor iv characteristics of the capacitor.
The resulting phasor diagram in Fig. 8-7 shows that voltage and current are
90
out of phase. In this case, the voltage
phasor is retarded by 90
clockwise, which
is in a direction opposite to rotation of the complex exponential
.
When the voltage is retarded clockwise (that is, behind the rotating current
phasor), we say that the voltage phasor lags the current phasor by
90
voltage by 90
or, equivalently, the current leads the
.
The Impedance Concept
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The IV constraints Eqs.(8-13), (8-14, and (8-15) are all of the form
V=ZI Eq.(8-16)
where Z is called the impedance of the element. Equation (8-16) is analogous to
Ohm's law in resistive circuits. Impedance is the proportionality constant relating
phasor voltage and phasor current in linear, two-terminal elements. The
impedances of the three passive elements are
Eq.(8-17)
Since impedance relates phasor voltage to phasor current, it is a complex
quantity whose units are ohms. Although impedance can be a complex number,
it is not a phasor. Phasors represent sinusoidal signals, while impedances
characterize circuit elements in the sinusoidal steady state. Finally, it is important
to remember that the generalized two-terminal device constraint in Eq.(8-16)
assumes that the passive sign convention is used to assign the reference marks
to the voltage and current.
EXAMPLE 8-5
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Fig. 8-5
The circuit in Fig. 8-5 is operating in the sinusoidal steady state with
and
. Find the impedance of the
elements in the rectangular box.
SOLUTION:
The purpose of this example is to show that we can apply basic circuit analysis
tools to phasors. The phasors representing the given signals are
and
. Using Ohm's law in phasor form, we find that
Applying KVL around loop A yields
.
. Solving form the unknown
voltage yields
V
This
voltage
appears
across
the
load
resistor
R1;
hence
. Applying KCL at node A yields
.
Given
the
phasor
voltage
across and current through the unknown element, we find the impedance to be
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3. Basic Circuit Analysis with Phasors
To perform ac circuit analysis in this way, we obviously need to develop methods
of analyzing circuits in the phasor domain.
In the preceding section, we showed that KVL and KCL applying the phasor
domain and that the phasor element constraints all have the form V=ZI.
Therefore, familiar algebraic circuit analysis tools, such as series and parallel
equivalence, voltage and current division, proportionality and superposition, and
Thevenin and Norton equivalent circuits, are applicable in the phasor domain.
We do not need new analysis techniques to handle circuits in the phasor domain.
The only difference is that circuit responses are phasors (complex numbers)
rather than dc signals (real numbers).
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Fig. 8-6: Flow diagram for phasor circuit analysis.
We can think of phasor domain circuit analysis in terms of the flow diagram in
Fig. 8-6. The analysis begins in the time domain with a linear circuit operating in
the sinusoidal steady state and involves three major steps:
Step 1: The circuit is transformed into the phasor domain by representing the
input and response sinusoids as phasor and the passive circuit elements by their
impedances.
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Step 2: Standard algebraic circuit techniques are applied to solve the phasor
domain circuit for the desired unknown phasor responses.
Step 3: The phasor responses are inverse transformed back into time-domain
sinusoids to obtain the response waveforms.
The third step assumes that the required end product is a time-domain
waveform. However, a phasor is just another representation of a sinusoid. With
some experience, we learn to think of the response as a phasor without
converting it back into a time-domain waveform.
Series Equivalence And Voltage Division
We begin the study of phasor-domain analysis with two basic analysis tools -series equivalence and voltage division. In Fig. 8-7 the two-terminal elements are
connected in series, so by KCL, the same phasor current I exists in impedances
Z1, Z2, ... ZN. Using KVL and the element constraints, the voltage across the
series connection can be written as
Eq.(8-18)
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Fig. 8-7: A series connection of impedances.
The last line in this equation points out that the phasor responses V and I do not
change when the series connected elements are replaced by an equivalent
impedance:
Eq.(8-19)
In general, the equivalent impedance ZEQ is a complex quantity of the form
where R is the real part and X is the imaginary part. The real part of Z is called
resistance and the imaginary part (X, not jX) is called reactance. Both resistance
and reactance are expressed in ohms (
frequency (
), and both can be functions of
). For passive circuits, resistance is always positive, while
reactance X can be either positive or negative. A positive X is called an inductive
reactance because the reactance of an inductor is
L, which is always positive.
A negative X is called a capacitive reactance because the reactance of a
capacitor is
, which is always negative.
Combining Eqs.(8-18) and (8-19), we can write the phasor voltage across the kth
element in the series connection as
Eq.(8-20)
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EXAMPLE 8-6
Fig. 8-8
The circuit in Fig. 8 - 8 is operating in the sinusoidal steady state with
.
(a) Transform the circuit into the phasor domain.
(b) Solve for the phasor current I.
(c) Solve for the phasor voltage across each element.
(d) Construct the waveforms corresponding to the phasors found in (b) and (c)
SOLUTION:
(a) The phasor representing the input source voltage is Vs=35 0 . The
impedances of the three passive elements are
Using these results, we obtain the phasor-domain circuit in Fig. 8-9.
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Fig. 8-9
(b) The equivalent impedance of the series connection is
The current in the series circuit is
(c) The current I exists in all three series elements, so the voltage across each
passive element is
(d) The sinusoidal steady-state waveforms corresponding to the phasors in (b)
and (c) are
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DESIGN EXAMPLE 8-7
AC Voltage Divider Design
Fig. 8-10
Design the voltage divider in Fig. 8-10 so that an input vs=15 cos 2000t produces
a steady-state output
SOLUTION:
Using voltage division, we can relate the input and output phasor as follows:
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The phasor representation of the input voltage is Vs=15 0=15+j0. Using the
identity COs(x-90 ), we write the required output phasor as Vo=2 -90 =0-j2.
The design problem is to select the impedances Z1 and Z2 so that
Solving this design constraint for Z1 yields
Fig. 8-11
Evidently, we can choose Z2 and then solve for Z1. In making this choice, we
must keep some physical realizability conditions in mind. In general, an
impedance has the form Z=R+jX. The reactance X can be either positive (an
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inductor) or negative ( a capacitor), but the resistance R must be positive. With
these constraints in mind, we select Z2=-j1000 (a capacitor) and solve for
Z1=7500+j1000 (a resistor in series with an inductor). Fig. 8-11 shows the
resulting phasor circuit. To find the values of L and C, we note that the input is
VS=15cos2000t hence, the frequency is
=2000. The inductive reactance
L=1000 requires L=0.5H , while the capacitive reactance requires -(
or C=0.5
C)-1=-1000
F.
PARALLEL EQUIVALENCE AND CURRENT DIVISION
In Fig. 8-12 the two-terminal elements are connected in parallel, so the same
phasor voltage V appears across the impedances Z1, Z2, ... ZN. Using the phasor
element constraints, the current through each impedance is Ik=V/ZK. Next, using
KCL, the total current entering the parallel connection is
Eq.(8-21)
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Fig. 8-12: Parallel connection of impedances
The same phasor responses V and I exist when the parallel connected elements
are replaced by an equivalent impedance.
Eq.(8-22)
These results can also be written in terms of admittance Y, which is defined as
the reciprocal of impedance:
The real part of Y is called conductance and the imaginary part B is called
susceptance both of which are expressed in units of siemens (S). Using
admittances to rewrite Eq.(8-21) yields
Eq.(8-23)
Hence, the equivalent admittance of the parallel connection is
30
Eq.(8-24)
Combining Eqs.(8-23) and (8-24), we find that the phasor current through the kth
element in the parallel connection is
Eq.(8-25)
Equation (8-25) is the phasor version of the current division principle. The phasor
current through any element in a parallel connection is equal to the ratio of its
admittance to the equivalent admittance of the connection times the total phasor
current entering the connection.
EXAMPLE 8-9
Fig. 8-13
The circuit in Fig. 8-13 is operating in the sinusoidal steady state with
iS(t)=50cos2000t mA.
(a) Transform the circuit into the phasor domain.
31
(b) Solve for the phasor voltage V.
(c) Solve for the phasor current through each element.
(d) Construct the waveforms corresponding to the phasors found in (b) and (c).
SOLUTION:
(a) The phasor representing the input source current is I S=0.05 0 A. The
impedances of the three passive elements are
Using these results, we obtain the phasor-domain circuit in Fig. 8-14.
Fig. 8-14
(b) The admittances of the two parallel branches are
32
The equivalent admittance of the parallel connection is
and the voltage across the parallel circuit is
(c) The current through each parallel branch is
(d) The sinusoidal steady-state waveforms corresponding to the phasors in (b)
and (c) are
33
EXAMPLE 8-10
Fig. 8-15
Find the steady-state currents i(t), and iC(t) in the circuit of Fig. 8-15 for
Vs=100cos2000t V, L=250mH, C=0.5
F, and R=3k
).
SOLUTION:
The phasor representation of the input voltage is 100
0 . The impedances of
the passive elements are
Fig. 8-16(a) shows the phasor-domain circuit.
34
Fig. 8-16
To solve for the required phasor responses, we reduce the circuit using a
combination of series and parallel equivalence. Using parallel equivalence, we
find that the capacitor and resistor can be replaced by an equivalent impedance
35
The resulting circuit reduction is shown in Fig. 8-16(b). The equivalent
impedance EZQ1 is connected in series with the impedance ZL=j500. This series
combination can be replaced by an equivalent impedance.
This step reduces the circuit to the equivalent input impedance shown in Fig. 816(c). The phasor input current in Fig. 8-16(c) is
Given the phasor current I, we use current division to find IC:
By KCL, I=IC+IR, so that remaining unknown current is
The waveforms corresponding to the phasor currents are
Y
TRANSFORMATIONS
36
Fig. 8-17: Y- and
- connected subcircuits
Circuits that cannot be reduced by series or parallel equivalence can be handled
by a
to the
-to-Y or a Y-to-
transformation. The same basic concept can be applied
- and Y-connected impedances in Fig. 8-17. Replacing a
-connected
circuit by an equivalent Y, or vice versa, changes circuit connections so that
series and parallel equivalence can again be used to reduce the circuit.
The equations for the
toy transformation are
37
Eq.(8-26)
The equations for a Y-to-
transformation are
Eq.(8-27)
Equations (8-26) and (8-27) have the same form as Eqs.(2-26) and (2-27),
except that here they involve impedances rather than resistances. Derivation of
the impedance equations uses the same approach given for resistance circuits in
Chapter 2. It is important to remember that the Y and
configurations are
defined by electrical connections and not by the geometric shapes in the circuit
diagram. That is, the circuit diagram does not have to show the circuits with
geometric Y or
shapes for the transformation equations to apply.
Applying these transformation equations in phasor circuits involves manipulating
complex numbers representing the impedances. While these manipulations are
not conceptually difficult, they do involve a computational burden that generally
outweighs any advantages gained by the resulting circuit simplification. In other
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words, there are easier ways to deal with phasor circuits that cannot be solved by
series and parallel equivalence. An important exception occurs in electrical
power systems that are made up of interconnections of Y- or
-connected
circuits. Most often these circuits are balanced.
A Y-or
-connected circuit is said to be balanced when Z1=Z2=Z3=ZY or
ZA=ZB=ZC=ZN. Under balanced conditions the transformation equations reduce to
ZY=Z /3 and Z =3ZY. We make use of the balanced circuit transformation
equations in the study of three-phase power systems in Chapter 14.
EXAMPLE 8-12
Use a
toy transformation to solve for the phasor current IX in Fig. 8-18.
Fig. 8-18
39
SOLUTION:
We cannot use basic reduction tools on the circuit in Fig. 8-18 because no
elements are connected in series or parallel. However, if we replace either the
upper delta (A, B, C) or lower delta (A, B, D) by an equivalent Y subcircuit, then
we can apply series and parallel reduction methods. We choose to transform the
upper delta because it has two equal resistors, which simplifies the
transformation equations. The sum of the impedances in the upper delta is
100+j200
. This sum is the denominator in the expression in Eq.(8-26). Using
the first expression in Eq.(8-26), we find the equivalent Y impedance connected
at node A to be
Using the second expression in Eq.(8-26), we obtain the equivalent Y impedance
connected at node B:
Using the third expression in Eq.(8-26), we obtain the equivalent Y impedance
connected at node C:
40
Fig. 8-19
Fig. 8-19 shows the revised circuit with the equivalent Y inserted in place of the
upper delta in Fig. 8-18. Note that the transformation introduces a new node
labeled N in Fig. 8-19. The revised circuit in Fig. 8-19 can be reduced by series
and parallel equivalence. The total impedance of the path NAD is 40-j100
The total impedance of the path NBD is 100+j20
.
. These paths are connected
in parallel, so the equivalent impedance between nodes N and D is
The impedance ZND is connected in series with the remaining leg of the
equivalent Y, so the equivalent impedance seen by the voltage source is
41
The input current shown in Fig. 8-19 is
Given the input current, we work backward through the equivalent circuit to find
the required current IX. To calculate IX, we need the voltage VAB between nodes A
and B. To find VAB, we first calculate the voltage VCN as
By KVL, VCN+VND=75
0 , therefore we can write
The voltage VND appears across two parallel voltage dividers. Using voltage
division, the voltages VAD and VBD are
Using KVL, the voltage VAB , the unknown current IX is found to be
42