A Low-Power High-Precision Comparator With Time-Domain Bulk-Tuned Offset Cancellation
... Section VII summarizes this work. II. TWO-STAGE DYNAMIC COMPARATOR The two-stage dynamic comparator core used in this design, depicted in Fig. 1(a), is inspired by the double-tail voltage sense amplifier [6]. Based on it, several changes are adopted. Firstly, the second stage is asynchronously clock ...
... Section VII summarizes this work. II. TWO-STAGE DYNAMIC COMPARATOR The two-stage dynamic comparator core used in this design, depicted in Fig. 1(a), is inspired by the double-tail voltage sense amplifier [6]. Based on it, several changes are adopted. Firstly, the second stage is asynchronously clock ...
Broadband, Fully-Differential, 14-/16-Bit ADC DRIVER AMPLIFIER THS770006 FEATURES
... specifically for driving 16-bit analog-to-digital converters (ADCs) at input frequencies up to 130MHz, and 14-bit ADCs at input frequencies up to 200MHz. This device provides high bandwidth, high-voltage output with low distortion and low noise, critical in high-speed data acquisition systems that r ...
... specifically for driving 16-bit analog-to-digital converters (ADCs) at input frequencies up to 130MHz, and 14-bit ADCs at input frequencies up to 200MHz. This device provides high bandwidth, high-voltage output with low distortion and low noise, critical in high-speed data acquisition systems that r ...
BR34L02FV-W
... BR34L02-W is 256×8 bit Electrically Erasable PROM (Based on Serial Presence Detect) ...
... BR34L02-W is 256×8 bit Electrically Erasable PROM (Based on Serial Presence Detect) ...
Am79C873 - AMD.com
... modes of operation: - 25 MHz nibble clock in 100 Mbps mode - 2.5 MHz nibble clock in 10 Mbps nibble mode - 10 MHz receive clock in 10 Mbps serial mode ...
... modes of operation: - 25 MHz nibble clock in 100 Mbps mode - 2.5 MHz nibble clock in 10 Mbps nibble mode - 10 MHz receive clock in 10 Mbps serial mode ...
DS1305 Serial Alarm Real-Time Clock FEATURES PIN CONFIGURATIONS
... rechargeable battery) to be used for a backup supply. The VBAT pin allows the device to be backed up by a non-rechargeable battery. The DS1305 is fully operational from 2.0V to 5.5V. Two programmable time-of-day alarms are provided by the DS1305. Each alarm can generate an interrupt on a programmabl ...
... rechargeable battery) to be used for a backup supply. The VBAT pin allows the device to be backed up by a non-rechargeable battery. The DS1305 is fully operational from 2.0V to 5.5V. Two programmable time-of-day alarms are provided by the DS1305. Each alarm can generate an interrupt on a programmabl ...
MAX9320B 1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver General Description
... designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. The MAX9320B features ultra-low propagation delay (208ps), part-to-part skew (20ps), and outpu ...
... designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. The MAX9320B features ultra-low propagation delay (208ps), part-to-part skew (20ps), and outpu ...
Solutions - University of California, Berkeley
... would we have to account for in the Ceq calculation in addition to those you used for part b)? The extra capacitances would be the gate-drain capacitances of the gates of the following inverters (might have to take into account the Miller effect), the gate-source capacitances as well as the capacita ...
... would we have to account for in the Ceq calculation in addition to those you used for part b)? The extra capacitances would be the gate-drain capacitances of the gates of the following inverters (might have to take into account the Miller effect), the gate-source capacitances as well as the capacita ...
MAX8543/MAX8544 Step-Down Controllers with Prebias Startup, Lossless Sensing, Synchronization, and OVP General Description
... x VIN output voltages at loads up to 25A. They feature adjustable switching frequency and synchronization for noise-sensitive applications. The MAX8543/MAX8544 can start with (or without) a preexisting bias on the output, without discharging the output. This feature simplifies tracking supply design ...
... x VIN output voltages at loads up to 25A. They feature adjustable switching frequency and synchronization for noise-sensitive applications. The MAX8543/MAX8544 can start with (or without) a preexisting bias on the output, without discharging the output. This feature simplifies tracking supply design ...
4.5V to 28V Input, Synchronous PWM Buck Controllers
... V+, EN/HSD, EN, HSD to GND...............................-0.3V to +30V PGND to GND .......................................................-0.3V to +0.3V VTT, REFIN, POK, OUT, FB, VL to GND...................-0.3V to +6V REF, VTTR, DL, ILIM, FSEL to GND ............-0.3V to (VVL + 0.3V) LX to PGND .. ...
... V+, EN/HSD, EN, HSD to GND...............................-0.3V to +30V PGND to GND .......................................................-0.3V to +0.3V VTT, REFIN, POK, OUT, FB, VL to GND...................-0.3V to +6V REF, VTTR, DL, ILIM, FSEL to GND ............-0.3V to (VVL + 0.3V) LX to PGND .. ...
AD5063 数据手册DataSheet 下载
... Serial Data Input. This device has a 24-bit shift register. Data is clocked into the register on the falling edge of the serial clock input. Power Supply Input. These parts can be operated from 2.7 V to 5.5 V, and VDD should be decoupled to GND. Reference Voltage Input. Analog Output Voltage from DA ...
... Serial Data Input. This device has a 24-bit shift register. Data is clocked into the register on the falling edge of the serial clock input. Power Supply Input. These parts can be operated from 2.7 V to 5.5 V, and VDD should be decoupled to GND. Reference Voltage Input. Analog Output Voltage from DA ...
MAX9060–MAX9064 Ultra-Small, Low-Power Single Comparators in 4-Bump UCSP and 5 SOT23 General Description
... of -0.3V to +5.5V independent of supply voltage. These devices maintain high impedance at the inputs even when powered down (VCC or VREF = 0V). They also feature internal filtering to provide high RF immunity. The MAX9060 and MAX9061 have open-drain outputs and draw quiescent supply current from a u ...
... of -0.3V to +5.5V independent of supply voltage. These devices maintain high impedance at the inputs even when powered down (VCC or VREF = 0V). They also feature internal filtering to provide high RF immunity. The MAX9060 and MAX9061 have open-drain outputs and draw quiescent supply current from a u ...
WM8731 Portable Internet Audio CODEC with Headphone Driver and Programmable Sample Rates DESCRIPTION
... Stereo line and mono microphone level audio inputs are provided, along with a mute function, programmable line level volume control and a bias voltage output suitable for an electret type microphone. Stereo 24-bit multi-bit sigma delta ADCs and DACs are used with oversampling digital interpolation a ...
... Stereo line and mono microphone level audio inputs are provided, along with a mute function, programmable line level volume control and a bias voltage output suitable for an electret type microphone. Stereo 24-bit multi-bit sigma delta ADCs and DACs are used with oversampling digital interpolation a ...
Compact dual output point of load converter based on the PM6680
... of 30 mV should be on the comp pin to accomplish this. Since the calculated ripple voltage is much lower than this, an additional circuit called the virtual ESR network is incorporated to provide the additional voltage. Before addressing this design, the current limit resistor values will be establi ...
... of 30 mV should be on the comp pin to accomplish this. Since the calculated ripple voltage is much lower than this, an additional circuit called the virtual ESR network is incorporated to provide the additional voltage. Before addressing this design, the current limit resistor values will be establi ...
2.0V to 5.5V, 80μA, 8-, 10-, and 12-Bit, Low
... When SYNC goes low, it enables the input shift register and data are transferred in on the falling edges of the following clocks. The DAC is updated following 16th clock cycle, unless SYNC is taken high before this edge, in which case the rising edge of SYNC acts as an interrupt and the write sequen ...
... When SYNC goes low, it enables the input shift register and data are transferred in on the falling edges of the following clocks. The DAC is updated following 16th clock cycle, unless SYNC is taken high before this edge, in which case the rising edge of SYNC acts as an interrupt and the write sequen ...
Sure Cross MultiHop Registers Parameters
... Extended Input Read The Extended Input Read is a bit field parameter that allows multiple inputs to be sampled with the same switch power parameters. If the bit field is set to 0x000F, the first four inputs are sampled after the switch power parameters are satisfied. If this parameter is set in the ...
... Extended Input Read The Extended Input Read is a bit field parameter that allows multiple inputs to be sampled with the same switch power parameters. If the bit field is set to 0x000F, the first four inputs are sampled after the switch power parameters are satisfied. If this parameter is set in the ...
Step-Down DC/DC Controller TLE 6389
... ranging from 1mA up to 2.5A. A unique PWM/PFM control scheme operates with up to a 100% duty cycle, resulting in very low dropout voltage. This control scheme eliminates minimum load requirements and reduces the supply current under light loads to 120µA, depending on dimensioning of external compone ...
... ranging from 1mA up to 2.5A. A unique PWM/PFM control scheme operates with up to a 100% duty cycle, resulting in very low dropout voltage. This control scheme eliminates minimum load requirements and reduces the supply current under light loads to 120µA, depending on dimensioning of external compone ...
Motorola ML145403, ML145404, ML145405, ML145408
... ESD PROTECTION – CAUTION ESD protection on IC devices that have their pins accessible to the outside world is essential. High static voltages applied to the pins when someone touches them either directly or in directly can cause damage to gate oxides and transistor junctions by coupling a portion of ...
... ESD PROTECTION – CAUTION ESD protection on IC devices that have their pins accessible to the outside world is essential. High static voltages applied to the pins when someone touches them either directly or in directly can cause damage to gate oxides and transistor junctions by coupling a portion of ...
Atmel ATA5021 Digital Window Watchdog Timer Features DATASHEET
... Reset-Out, Pin 5 The Reset-out pin functionality is guaranteed for supply voltage down to 1V. In case of a voltage drop, the microcontroller gets a reset up to that value. ...
... Reset-Out, Pin 5 The Reset-out pin functionality is guaranteed for supply voltage down to 1V. In case of a voltage drop, the microcontroller gets a reset up to that value. ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.