PWM5032 RadHard High Speed PWM Controller (3/15)
... enhancements in performance and functionality. The chip operates in either the voltage or current mode and can support a wide variety of converter topologies. Radiation hardened by design techniques ensure the chip’s outstanding radiation tolerance, > 1 Mrad(Si), while reducing operating current by ...
... enhancements in performance and functionality. The chip operates in either the voltage or current mode and can support a wide variety of converter topologies. Radiation hardened by design techniques ensure the chip’s outstanding radiation tolerance, > 1 Mrad(Si), while reducing operating current by ...
74LCX2244 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs
... 3-STATE outputs. The device may be employed as a memory address driver, clock driver and bus-oriented transmitter/receiver. The LCX2244 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The 26Ω series resistors help reduce output o ...
... 3-STATE outputs. The device may be employed as a memory address driver, clock driver and bus-oriented transmitter/receiver. The LCX2244 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The 26Ω series resistors help reduce output o ...
Features
... traditional CPLD architecture combining macrocells into Function Blocks (FBs) interconnected with a global routing matrix, the Xilinx Advanced Interconnect Matrix (AIM). The Function Blocks use a Programmable Logic Array (PLA) configuration which allows all product terms to be routed and shared amon ...
... traditional CPLD architecture combining macrocells into Function Blocks (FBs) interconnected with a global routing matrix, the Xilinx Advanced Interconnect Matrix (AIM). The Function Blocks use a Programmable Logic Array (PLA) configuration which allows all product terms to be routed and shared amon ...
Datasheet
... EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for i ...
... EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for i ...
1 - Concordia University
... Hwang and Fisher formally introduced MODL in 1989, and it has been shown to provide considerable hardware savings. In domino CMOS logic, as well as other non complementary MOS logic styles, there is only one output available from a given logic gate. However, it is a fact that multiple functions are ...
... Hwang and Fisher formally introduced MODL in 1989, and it has been shown to provide considerable hardware savings. In domino CMOS logic, as well as other non complementary MOS logic styles, there is only one output available from a given logic gate. However, it is a fact that multiple functions are ...
SRC4190 192kHz Stereo Asynchronous Sample Rate Converters FEATURES
... Supply Voltage, VDD .......................................................... –0.3V to +4.0V Supply Voltage, VIO ........................................................... –0.3V to +4.0V Digital Input Voltage .......................................................... –0.3V to +4.0V Operating Tempe ...
... Supply Voltage, VDD .......................................................... –0.3V to +4.0V Supply Voltage, VIO ........................................................... –0.3V to +4.0V Digital Input Voltage .......................................................... –0.3V to +4.0V Operating Tempe ...
Preliminary Datasheet Industrial DC/DC CONVERTER MGDDI-20 Ultra Wide Input : 20W POWER
... The output voltage Vo1 may be trimmed in a range of 80%/110% of the nominal output voltage via a single external ...
... The output voltage Vo1 may be trimmed in a range of 80%/110% of the nominal output voltage via a single external ...
a 60 MHz, 2000 V/ Monolithic Op Amp AD844
... only 0.02% to 0.07% lower than R1. This small error will often be less than the resistor tolerance. When R1 is fairly large (above 5 kΩ) but still much less than Rt, the closed-loop HF response is dominated by the time constant R1Ct. Under such conditions the AD844 is over-damped and will provide on ...
... only 0.02% to 0.07% lower than R1. This small error will often be less than the resistor tolerance. When R1 is fairly large (above 5 kΩ) but still much less than Rt, the closed-loop HF response is dominated by the time constant R1Ct. Under such conditions the AD844 is over-damped and will provide on ...
HIGH-SPEED DIFFERENTIAL RECEIVERS SN65LVDS33, SN65LVDS34,
... A differential line receiver commonly has a failsafe circuit to prevent it from switching on input noise. Current LVDS failsafe solutions require either external components with subsequent reductions in signal quality or integrated solutions with limited application. This family of receivers has a n ...
... A differential line receiver commonly has a failsafe circuit to prevent it from switching on input noise. Current LVDS failsafe solutions require either external components with subsequent reductions in signal quality or integrated solutions with limited application. This family of receivers has a n ...
a CMOS Single Supply Rail-to-Rail Input/Output Operational Amplifiers with Shutdown
... AD8591 and AD8594 include a single master shutdown function that reduces total supply current to less than 1 µA. All amplifier outputs are in a high impedance state when in shutdown mode. These amplifiers have very low input bias currents, making them suitable for integrators and diode amplification ...
... AD8591 and AD8594 include a single master shutdown function that reduces total supply current to less than 1 µA. All amplifier outputs are in a high impedance state when in shutdown mode. These amplifiers have very low input bias currents, making them suitable for integrators and diode amplification ...
差分放大器系列AD8324 数据手册DataSheet 下载
... head-end, the upstream PA must be capable of varying the output power by applying gain or attenuation. The ability to vary the output power of the AD8324 ensures that the signal from the cable modem will have the proper level once it arrives at the head-end. The upstream signal path commonly include ...
... head-end, the upstream PA must be capable of varying the output power by applying gain or attenuation. The ability to vary the output power of the AD8324 ensures that the signal from the cable modem will have the proper level once it arrives at the head-end. The upstream signal path commonly include ...
ZSCT1555 Precision single cell timer datasheet
... the voltage on the capacitor is 0.8 VCC. At this point the flip flop resets, the capacitor is discharged and the output is driven low. ...
... the voltage on the capacitor is 0.8 VCC. At this point the flip flop resets, the capacitor is discharged and the output is driven low. ...
AN028: Building an Auto-Ranging DMM with the ICL7103A
... The integrator and comparator time constants are each reduced by a factor of 10 at the beginning of auto-zero if auto-ranging is required. However, the ICL7103A doesn’t enter the 3 1/2 digit mode until the input data to the 7474 is clocked into the register. This occurs 900 counts after autozero beg ...
... The integrator and comparator time constants are each reduced by a factor of 10 at the beginning of auto-zero if auto-ranging is required. However, the ICL7103A doesn’t enter the 3 1/2 digit mode until the input data to the 7474 is clocked into the register. This occurs 900 counts after autozero beg ...
B Analog Signal Input
... The gain may be calculated from: m=(y2-y1)/x2-x1) where x1, y1 is one coordinate pair on the graph and x2, y2 is the other. Therefore, when you have chosen to enter non-default coordinates you are in fact setting the gain factor. This gain factor is taken along with the input signal type you have ch ...
... The gain may be calculated from: m=(y2-y1)/x2-x1) where x1, y1 is one coordinate pair on the graph and x2, y2 is the other. Therefore, when you have chosen to enter non-default coordinates you are in fact setting the gain factor. This gain factor is taken along with the input signal type you have ch ...
差分放大器系列AD8323 数据手册DataSheet 下载
... power-up or forward mode. The input amplifier (preamp) can be used single-ended or differentially. If the input is used in the differential configuration, it is imperative that the input signals are 180 degrees out of phase and of equal amplitudes. This will ensure the proper gain accuracy and harmo ...
... power-up or forward mode. The input amplifier (preamp) can be used single-ended or differentially. If the input is used in the differential configuration, it is imperative that the input signals are 180 degrees out of phase and of equal amplitudes. This will ensure the proper gain accuracy and harmo ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.